1 /*
2 * dim2_hdm.c - MediaLB DIM2 Hardware Dependent Module
3 *
4 * Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * This file is licensed under GPLv2.
12 */
13
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16 #include <linux/module.h>
17 #include <linux/printk.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/interrupt.h>
22 #include <linux/slab.h>
23 #include <linux/io.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/sched.h>
26 #include <linux/kthread.h>
27
28 #include <mostcore.h>
29 #include <networking.h>
30 #include "dim2_hal.h"
31 #include "dim2_hdm.h"
32 #include "dim2_errors.h"
33 #include "dim2_sysfs.h"
34
35 #define DMA_CHANNELS (32 - 1) /* channel 0 is a system channel */
36
37 #define MAX_BUFFERS_PACKET 32
38 #define MAX_BUFFERS_STREAMING 32
39 #define MAX_BUF_SIZE_PACKET 2048
40 #define MAX_BUF_SIZE_STREAMING (8 * 1024)
41
42 /* command line parameter to select clock speed */
43 static char *clock_speed;
44 module_param(clock_speed, charp, 0);
45 MODULE_PARM_DESC(clock_speed, "MediaLB Clock Speed");
46
47 /*
48 * #############################################################################
49 *
50 * The define below activates an utility function used by HAL-simu
51 * for calling DIM interrupt handler.
52 * It is used only for TEST PURPOSE and shall be commented before release.
53 *
54 * #############################################################################
55 */
56 /* #define ENABLE_HDM_TEST */
57
58 static DEFINE_SPINLOCK(dim_lock);
59
60 static void dim2_tasklet_fn(unsigned long data);
61 static DECLARE_TASKLET(dim2_tasklet, dim2_tasklet_fn, 0);
62
63 /**
64 * struct hdm_channel - private structure to keep channel specific data
65 * @is_initialized: identifier to know whether the channel is initialized
66 * @ch: HAL specific channel data
67 * @pending_list: list to keep MBO's before starting transfer
68 * @started_list: list to keep MBO's after starting transfer
69 * @direction: channel direction (TX or RX)
70 * @data_type: channel data type
71 */
72 struct hdm_channel {
73 char name[sizeof "caNNN"];
74 bool is_initialized;
75 struct dim_channel ch;
76 struct list_head pending_list; /* before DIM_EnqueueBuffer() */
77 struct list_head started_list; /* after DIM_EnqueueBuffer() */
78 enum most_channel_direction direction;
79 enum most_channel_data_type data_type;
80 };
81
82 /**
83 * struct dim2_hdm - private structure to keep interface specific data
84 * @hch: an array of channel specific data
85 * @most_iface: most interface structure
86 * @capabilities: an array of channel capability data
87 * @io_base: I/O register base address
88 * @irq_ahb0: dim2 AHB0 irq number
89 * @clk_speed: user selectable (through command line parameter) clock speed
90 * @netinfo_task: thread to deliver network status
91 * @netinfo_waitq: waitq for the thread to sleep
92 * @deliver_netinfo: to identify whether network status received
93 * @mac_addrs: INIC mac address
94 * @link_state: network link state
95 * @atx_idx: index of async tx channel
96 */
97 struct dim2_hdm {
98 struct hdm_channel hch[DMA_CHANNELS];
99 struct most_channel_capability capabilities[DMA_CHANNELS];
100 struct most_interface most_iface;
101 char name[16 + sizeof "dim2-"];
102 void *io_base;
103 unsigned int irq_ahb0;
104 int clk_speed;
105 struct task_struct *netinfo_task;
106 wait_queue_head_t netinfo_waitq;
107 int deliver_netinfo;
108 unsigned char mac_addrs[6];
109 unsigned char link_state;
110 int atx_idx;
111 struct medialb_bus bus;
112 };
113
114 #define iface_to_hdm(iface) container_of(iface, struct dim2_hdm, most_iface)
115
116 /* Macro to identify a network status message */
117 #define PACKET_IS_NET_INFO(p) \
118 (((p)[1] == 0x18) && ((p)[2] == 0x05) && ((p)[3] == 0x0C) && \
119 ((p)[13] == 0x3C) && ((p)[14] == 0x00) && ((p)[15] == 0x0A))
120
121 #if defined(ENABLE_HDM_TEST)
122 static struct dim2_hdm *test_dev;
123 #endif
124
dim2_sysfs_get_state_cb(void)125 bool dim2_sysfs_get_state_cb(void)
126 {
127 bool state;
128 unsigned long flags;
129
130 spin_lock_irqsave(&dim_lock, flags);
131 state = DIM_GetLockState();
132 spin_unlock_irqrestore(&dim_lock, flags);
133
134 return state;
135 }
136
137 /**
138 * DIMCB_IoRead - callback from HAL to read an I/O register
139 * @ptr32: register address
140 */
DIMCB_IoRead(u32 * ptr32)141 u32 DIMCB_IoRead(u32 *ptr32)
142 {
143 return __raw_readl(ptr32);
144 }
145
146 /**
147 * DIMCB_IoWrite - callback from HAL to write value to an I/O register
148 * @ptr32: register address
149 * @value: value to write
150 */
DIMCB_IoWrite(u32 * ptr32,u32 value)151 void DIMCB_IoWrite(u32 *ptr32, u32 value)
152 {
153 __raw_writel(value, ptr32);
154 }
155
156 /**
157 * DIMCB_OnError - callback from HAL to report miscommunication between
158 * HDM and HAL
159 * @error_id: Error ID
160 * @error_message: Error message. Some text in a free format
161 */
DIMCB_OnError(u8 error_id,const char * error_message)162 void DIMCB_OnError(u8 error_id, const char *error_message)
163 {
164 pr_err("DIMCB_OnError: error_id - %d, error_message - %s\n", error_id,
165 error_message);
166 }
167
168 /**
169 * startup_dim - initialize the dim2 interface
170 * @pdev: platform device
171 *
172 * Get the value of command line parameter "clock_speed" if given or use the
173 * default value, enable the clock and PLL, and initialize the dim2 interface.
174 */
startup_dim(struct platform_device * pdev)175 static int startup_dim(struct platform_device *pdev)
176 {
177 struct dim2_hdm *dev = platform_get_drvdata(pdev);
178 struct dim2_platform_data *pdata = pdev->dev.platform_data;
179 u8 hal_ret;
180
181 dev->clk_speed = -1;
182
183 if (clock_speed) {
184 if (!strcmp(clock_speed, "256fs"))
185 dev->clk_speed = CLK_256FS;
186 else if (!strcmp(clock_speed, "512fs"))
187 dev->clk_speed = CLK_512FS;
188 else if (!strcmp(clock_speed, "1024fs"))
189 dev->clk_speed = CLK_1024FS;
190 else if (!strcmp(clock_speed, "2048fs"))
191 dev->clk_speed = CLK_2048FS;
192 else if (!strcmp(clock_speed, "3072fs"))
193 dev->clk_speed = CLK_3072FS;
194 else if (!strcmp(clock_speed, "4096fs"))
195 dev->clk_speed = CLK_4096FS;
196 else if (!strcmp(clock_speed, "6144fs"))
197 dev->clk_speed = CLK_6144FS;
198 else if (!strcmp(clock_speed, "8192fs"))
199 dev->clk_speed = CLK_8192FS;
200 }
201
202 if (dev->clk_speed == -1) {
203 pr_info("Bad or missing clock speed parameter, using default value: 3072fs\n");
204 dev->clk_speed = CLK_3072FS;
205 } else {
206 pr_info("Selected clock speed: %s\n", clock_speed);
207 }
208 if (pdata && pdata->init) {
209 int ret = pdata->init(pdata, dev->io_base, dev->clk_speed);
210
211 if (ret)
212 return ret;
213 }
214
215 hal_ret = DIM_Startup(dev->io_base, dev->clk_speed);
216 if (hal_ret != DIM_NO_ERROR) {
217 pr_err("DIM_Startup failed: %d\n", hal_ret);
218 if (pdata && pdata->destroy)
219 pdata->destroy(pdata);
220 return -ENODEV;
221 }
222
223 return 0;
224 }
225
226 /**
227 * try_start_dim_transfer - try to transfer a buffer on a channel
228 * @hdm_ch: channel specific data
229 *
230 * Transfer a buffer from pending_list if the channel is ready
231 */
try_start_dim_transfer(struct hdm_channel * hdm_ch)232 static int try_start_dim_transfer(struct hdm_channel *hdm_ch)
233 {
234 u16 buf_size;
235 struct list_head *head = &hdm_ch->pending_list;
236 struct mbo *mbo;
237 unsigned long flags;
238 struct dim_ch_state_t st;
239
240 BUG_ON(!hdm_ch);
241 BUG_ON(!hdm_ch->is_initialized);
242
243 spin_lock_irqsave(&dim_lock, flags);
244 if (list_empty(head)) {
245 spin_unlock_irqrestore(&dim_lock, flags);
246 return -EAGAIN;
247 }
248
249 if (!DIM_GetChannelState(&hdm_ch->ch, &st)->ready) {
250 spin_unlock_irqrestore(&dim_lock, flags);
251 return -EAGAIN;
252 }
253
254 mbo = list_entry(head->next, struct mbo, list);
255 buf_size = mbo->buffer_length;
256
257 BUG_ON(mbo->bus_address == 0);
258 if (!DIM_EnqueueBuffer(&hdm_ch->ch, mbo->bus_address, buf_size)) {
259 list_del(head->next);
260 spin_unlock_irqrestore(&dim_lock, flags);
261 mbo->processed_length = 0;
262 mbo->status = MBO_E_INVAL;
263 mbo->complete(mbo);
264 return -EFAULT;
265 }
266
267 list_move_tail(head->next, &hdm_ch->started_list);
268 spin_unlock_irqrestore(&dim_lock, flags);
269
270 return 0;
271 }
272
273 /**
274 * deliver_netinfo_thread - thread to deliver network status to mostcore
275 * @data: private data
276 *
277 * Wait for network status and deliver it to mostcore once it is received
278 */
deliver_netinfo_thread(void * data)279 static int deliver_netinfo_thread(void *data)
280 {
281 struct dim2_hdm *dev = data;
282
283 while (!kthread_should_stop()) {
284 wait_event_interruptible(dev->netinfo_waitq,
285 dev->deliver_netinfo ||
286 kthread_should_stop());
287
288 if (dev->deliver_netinfo) {
289 dev->deliver_netinfo--;
290 most_deliver_netinfo(&dev->most_iface, dev->link_state,
291 dev->mac_addrs);
292 }
293 }
294
295 return 0;
296 }
297
298 /**
299 * retrieve_netinfo - retrieve network status from received buffer
300 * @dev: private data
301 * @mbo: received MBO
302 *
303 * Parse the message in buffer and get node address, link state, MAC address.
304 * Wake up a thread to deliver this status to mostcore
305 */
retrieve_netinfo(struct dim2_hdm * dev,struct mbo * mbo)306 static void retrieve_netinfo(struct dim2_hdm *dev, struct mbo *mbo)
307 {
308 u8 *data = mbo->virt_address;
309 u8 *mac = dev->mac_addrs;
310
311 pr_info("Node Address: 0x%03x\n", (u16)data[16] << 8 | data[17]);
312 dev->link_state = data[18];
313 pr_info("NIState: %d\n", dev->link_state);
314 memcpy(mac, data + 19, 6);
315 pr_info("MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",
316 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
317 dev->deliver_netinfo++;
318 wake_up_interruptible(&dev->netinfo_waitq);
319 }
320
321 /**
322 * service_done_flag - handle completed buffers
323 * @dev: private data
324 * @ch_idx: channel index
325 *
326 * Return back the completed buffers to mostcore, using completion callback
327 */
service_done_flag(struct dim2_hdm * dev,int ch_idx)328 static void service_done_flag(struct dim2_hdm *dev, int ch_idx)
329 {
330 struct hdm_channel *hdm_ch = dev->hch + ch_idx;
331 struct dim_ch_state_t st;
332 struct list_head *head;
333 struct mbo *mbo;
334 int done_buffers;
335 unsigned long flags;
336 u8 *data;
337
338 BUG_ON(!hdm_ch);
339 BUG_ON(!hdm_ch->is_initialized);
340
341 spin_lock_irqsave(&dim_lock, flags);
342
343 done_buffers = DIM_GetChannelState(&hdm_ch->ch, &st)->done_buffers;
344 if (!done_buffers) {
345 spin_unlock_irqrestore(&dim_lock, flags);
346 return;
347 }
348
349 if (!DIM_DetachBuffers(&hdm_ch->ch, done_buffers)) {
350 spin_unlock_irqrestore(&dim_lock, flags);
351 return;
352 }
353 spin_unlock_irqrestore(&dim_lock, flags);
354
355 head = &hdm_ch->started_list;
356
357 while (done_buffers) {
358 spin_lock_irqsave(&dim_lock, flags);
359 if (list_empty(head)) {
360 spin_unlock_irqrestore(&dim_lock, flags);
361 pr_crit("hard error: started_mbo list is empty whereas DIM2 has sent buffers\n");
362 break;
363 }
364
365 mbo = list_entry(head->next, struct mbo, list);
366 list_del(head->next);
367 spin_unlock_irqrestore(&dim_lock, flags);
368
369 data = mbo->virt_address;
370
371 if (hdm_ch->data_type == MOST_CH_ASYNC &&
372 hdm_ch->direction == MOST_CH_RX &&
373 PACKET_IS_NET_INFO(data)) {
374
375 retrieve_netinfo(dev, mbo);
376
377 spin_lock_irqsave(&dim_lock, flags);
378 list_add_tail(&mbo->list, &hdm_ch->pending_list);
379 spin_unlock_irqrestore(&dim_lock, flags);
380 } else {
381 if (hdm_ch->data_type == MOST_CH_CONTROL ||
382 hdm_ch->data_type == MOST_CH_ASYNC) {
383
384 u32 const data_size =
385 (u32)data[0] * 256 + data[1] + 2;
386
387 mbo->processed_length =
388 min_t(u32, data_size,
389 mbo->buffer_length);
390 } else {
391 mbo->processed_length = mbo->buffer_length;
392 }
393 mbo->status = MBO_SUCCESS;
394 mbo->complete(mbo);
395 }
396
397 done_buffers--;
398 }
399 }
400
get_active_channels(struct dim2_hdm * dev,struct dim_channel ** buffer)401 static struct dim_channel **get_active_channels(struct dim2_hdm *dev,
402 struct dim_channel **buffer)
403 {
404 int idx = 0;
405 int ch_idx;
406
407 for (ch_idx = 0; ch_idx < DMA_CHANNELS; ch_idx++) {
408 if (dev->hch[ch_idx].is_initialized)
409 buffer[idx++] = &dev->hch[ch_idx].ch;
410 }
411 buffer[idx++] = NULL;
412
413 return buffer;
414 }
415
416 /**
417 * dim2_tasklet_fn - tasklet function
418 * @data: private data
419 *
420 * Service each initialized channel, if needed
421 */
dim2_tasklet_fn(unsigned long data)422 static void dim2_tasklet_fn(unsigned long data)
423 {
424 struct dim2_hdm *dev = (struct dim2_hdm *)data;
425 unsigned long flags;
426 int ch_idx;
427
428 for (ch_idx = 0; ch_idx < DMA_CHANNELS; ch_idx++) {
429 if (!dev->hch[ch_idx].is_initialized)
430 continue;
431
432 spin_lock_irqsave(&dim_lock, flags);
433 DIM_ServiceChannel(&dev->hch[ch_idx].ch);
434 spin_unlock_irqrestore(&dim_lock, flags);
435
436 service_done_flag(dev, ch_idx);
437 while (!try_start_dim_transfer(dev->hch + ch_idx))
438 continue;
439 }
440 }
441
442 /**
443 * dim2_ahb_isr - interrupt service routine
444 * @irq: irq number
445 * @_dev: private data
446 *
447 * Acknowledge the interrupt and schedule a tasklet to service channels.
448 * Return IRQ_HANDLED.
449 */
dim2_ahb_isr(int irq,void * _dev)450 static irqreturn_t dim2_ahb_isr(int irq, void *_dev)
451 {
452 struct dim2_hdm *dev = _dev;
453 struct dim_channel *buffer[DMA_CHANNELS + 1];
454 unsigned long flags;
455
456 spin_lock_irqsave(&dim_lock, flags);
457 DIM_ServiceIrq(get_active_channels(dev, buffer));
458 spin_unlock_irqrestore(&dim_lock, flags);
459
460 #if !defined(ENABLE_HDM_TEST)
461 dim2_tasklet.data = (unsigned long)dev;
462 tasklet_schedule(&dim2_tasklet);
463 #else
464 dim2_tasklet_fn((unsigned long)dev);
465 #endif
466 return IRQ_HANDLED;
467 }
468
469 #if defined(ENABLE_HDM_TEST)
470
471 /*
472 * Utility function used by HAL-simu for calling DIM interrupt handler.
473 * It is used only for TEST PURPOSE.
474 */
raise_dim_interrupt(void)475 void raise_dim_interrupt(void)
476 {
477 (void)dim2_ahb_isr(0, test_dev);
478 }
479 #endif
480
481 /**
482 * complete_all_mbos - complete MBO's in a list
483 * @head: list head
484 *
485 * Delete all the entries in list and return back MBO's to mostcore using
486 * completion call back.
487 */
complete_all_mbos(struct list_head * head)488 static void complete_all_mbos(struct list_head *head)
489 {
490 unsigned long flags;
491 struct mbo *mbo;
492
493 for (;;) {
494 spin_lock_irqsave(&dim_lock, flags);
495 if (list_empty(head)) {
496 spin_unlock_irqrestore(&dim_lock, flags);
497 break;
498 }
499
500 mbo = list_entry(head->next, struct mbo, list);
501 list_del(head->next);
502 spin_unlock_irqrestore(&dim_lock, flags);
503
504 mbo->processed_length = 0;
505 mbo->status = MBO_E_CLOSE;
506 mbo->complete(mbo);
507 }
508 }
509
510 /**
511 * configure_channel - initialize a channel
512 * @iface: interface the channel belongs to
513 * @channel: channel to be configured
514 * @channel_config: structure that holds the configuration information
515 *
516 * Receives configuration information from mostcore and initialize
517 * the corresponding channel. Return 0 on success, negative on failure.
518 */
configure_channel(struct most_interface * most_iface,int ch_idx,struct most_channel_config * ccfg)519 static int configure_channel(struct most_interface *most_iface, int ch_idx,
520 struct most_channel_config *ccfg)
521 {
522 struct dim2_hdm *dev = iface_to_hdm(most_iface);
523 bool const is_tx = ccfg->direction == MOST_CH_TX;
524 u16 const sub_size = ccfg->subbuffer_size;
525 u16 const buf_size = ccfg->buffer_size;
526 u16 new_size;
527 unsigned long flags;
528 u8 hal_ret;
529 int const ch_addr = ch_idx * 2 + 2;
530 struct hdm_channel *const hdm_ch = dev->hch + ch_idx;
531
532 BUG_ON(ch_idx < 0 || ch_idx >= DMA_CHANNELS);
533
534 if (hdm_ch->is_initialized)
535 return -EPERM;
536
537 switch (ccfg->data_type) {
538 case MOST_CH_CONTROL:
539 new_size = DIM_NormCtrlAsyncBufferSize(buf_size);
540 if (new_size == 0) {
541 pr_err("%s: too small buffer size\n", hdm_ch->name);
542 return -EINVAL;
543 }
544 ccfg->buffer_size = new_size;
545 if (new_size != buf_size)
546 pr_warn("%s: fixed buffer size (%d -> %d)\n",
547 hdm_ch->name, buf_size, new_size);
548 spin_lock_irqsave(&dim_lock, flags);
549 hal_ret = DIM_InitControl(&hdm_ch->ch, is_tx, ch_addr,
550 buf_size);
551 break;
552 case MOST_CH_ASYNC:
553 new_size = DIM_NormCtrlAsyncBufferSize(buf_size);
554 if (new_size == 0) {
555 pr_err("%s: too small buffer size\n", hdm_ch->name);
556 return -EINVAL;
557 }
558 ccfg->buffer_size = new_size;
559 if (new_size != buf_size)
560 pr_warn("%s: fixed buffer size (%d -> %d)\n",
561 hdm_ch->name, buf_size, new_size);
562 spin_lock_irqsave(&dim_lock, flags);
563 hal_ret = DIM_InitAsync(&hdm_ch->ch, is_tx, ch_addr, buf_size);
564 break;
565 case MOST_CH_ISOC_AVP:
566 new_size = DIM_NormIsocBufferSize(buf_size, sub_size);
567 if (new_size == 0) {
568 pr_err("%s: invalid sub-buffer size or too small buffer size\n",
569 hdm_ch->name);
570 return -EINVAL;
571 }
572 ccfg->buffer_size = new_size;
573 if (new_size != buf_size)
574 pr_warn("%s: fixed buffer size (%d -> %d)\n",
575 hdm_ch->name, buf_size, new_size);
576 spin_lock_irqsave(&dim_lock, flags);
577 hal_ret = DIM_InitIsoc(&hdm_ch->ch, is_tx, ch_addr, sub_size);
578 break;
579 case MOST_CH_SYNC:
580 new_size = DIM_NormSyncBufferSize(buf_size, sub_size);
581 if (new_size == 0) {
582 pr_err("%s: invalid sub-buffer size or too small buffer size\n",
583 hdm_ch->name);
584 return -EINVAL;
585 }
586 ccfg->buffer_size = new_size;
587 if (new_size != buf_size)
588 pr_warn("%s: fixed buffer size (%d -> %d)\n",
589 hdm_ch->name, buf_size, new_size);
590 spin_lock_irqsave(&dim_lock, flags);
591 hal_ret = DIM_InitSync(&hdm_ch->ch, is_tx, ch_addr, sub_size);
592 break;
593 default:
594 pr_err("%s: configure failed, bad channel type: %d\n",
595 hdm_ch->name, ccfg->data_type);
596 return -EINVAL;
597 }
598
599 if (hal_ret != DIM_NO_ERROR) {
600 spin_unlock_irqrestore(&dim_lock, flags);
601 pr_err("%s: configure failed (%d), type: %d, is_tx: %d\n",
602 hdm_ch->name, hal_ret, ccfg->data_type, (int)is_tx);
603 return -ENODEV;
604 }
605
606 hdm_ch->data_type = ccfg->data_type;
607 hdm_ch->direction = ccfg->direction;
608 hdm_ch->is_initialized = true;
609
610 if (hdm_ch->data_type == MOST_CH_ASYNC &&
611 hdm_ch->direction == MOST_CH_TX &&
612 dev->atx_idx < 0)
613 dev->atx_idx = ch_idx;
614
615 spin_unlock_irqrestore(&dim_lock, flags);
616
617 return 0;
618 }
619
620 /**
621 * enqueue - enqueue a buffer for data transfer
622 * @iface: intended interface
623 * @channel: ID of the channel the buffer is intended for
624 * @mbo: pointer to the buffer object
625 *
626 * Push the buffer into pending_list and try to transfer one buffer from
627 * pending_list. Return 0 on success, negative on failure.
628 */
enqueue(struct most_interface * most_iface,int ch_idx,struct mbo * mbo)629 static int enqueue(struct most_interface *most_iface, int ch_idx,
630 struct mbo *mbo)
631 {
632 struct dim2_hdm *dev = iface_to_hdm(most_iface);
633 struct hdm_channel *hdm_ch = dev->hch + ch_idx;
634 unsigned long flags;
635
636 BUG_ON(ch_idx < 0 || ch_idx >= DMA_CHANNELS);
637
638 if (!hdm_ch->is_initialized)
639 return -EPERM;
640
641 if (mbo->bus_address == 0)
642 return -EFAULT;
643
644 spin_lock_irqsave(&dim_lock, flags);
645 list_add_tail(&mbo->list, &hdm_ch->pending_list);
646 spin_unlock_irqrestore(&dim_lock, flags);
647
648 (void)try_start_dim_transfer(hdm_ch);
649
650 return 0;
651 }
652
653 /**
654 * request_netinfo - triggers retrieving of network info
655 * @iface: pointer to the interface
656 * @channel_id: corresponding channel ID
657 *
658 * Send a command to INIC which triggers retrieving of network info by means of
659 * "Message exchange over MDP/MEP". Return 0 on success, negative on failure.
660 */
request_netinfo(struct most_interface * most_iface,int ch_idx)661 static void request_netinfo(struct most_interface *most_iface, int ch_idx)
662 {
663 struct dim2_hdm *dev = iface_to_hdm(most_iface);
664 struct mbo *mbo;
665 u8 *data;
666
667 if (dev->atx_idx < 0) {
668 pr_err("Async Tx Not initialized\n");
669 return;
670 }
671
672 mbo = most_get_mbo(&dev->most_iface, dev->atx_idx, NULL);
673 if (!mbo)
674 return;
675
676 mbo->buffer_length = 5;
677
678 data = mbo->virt_address;
679
680 data[0] = 0x00; /* PML High byte */
681 data[1] = 0x03; /* PML Low byte */
682 data[2] = 0x02; /* PMHL */
683 data[3] = 0x08; /* FPH */
684 data[4] = 0x40; /* FMF (FIFO cmd msg - Triggers NAOverMDP) */
685
686 most_submit_mbo(mbo);
687 }
688
689 /**
690 * poison_channel - poison buffers of a channel
691 * @iface: pointer to the interface the channel to be poisoned belongs to
692 * @channel_id: corresponding channel ID
693 *
694 * Destroy a channel and complete all the buffers in both started_list &
695 * pending_list. Return 0 on success, negative on failure.
696 */
poison_channel(struct most_interface * most_iface,int ch_idx)697 static int poison_channel(struct most_interface *most_iface, int ch_idx)
698 {
699 struct dim2_hdm *dev = iface_to_hdm(most_iface);
700 struct hdm_channel *hdm_ch = dev->hch + ch_idx;
701 unsigned long flags;
702 u8 hal_ret;
703 int ret = 0;
704
705 BUG_ON(ch_idx < 0 || ch_idx >= DMA_CHANNELS);
706
707 if (!hdm_ch->is_initialized)
708 return -EPERM;
709
710 spin_lock_irqsave(&dim_lock, flags);
711 hal_ret = DIM_DestroyChannel(&hdm_ch->ch);
712 hdm_ch->is_initialized = false;
713 if (ch_idx == dev->atx_idx)
714 dev->atx_idx = -1;
715 spin_unlock_irqrestore(&dim_lock, flags);
716 if (hal_ret != DIM_NO_ERROR) {
717 pr_err("HAL Failed to close channel %s\n", hdm_ch->name);
718 ret = -EFAULT;
719 }
720
721 complete_all_mbos(&hdm_ch->started_list);
722 complete_all_mbos(&hdm_ch->pending_list);
723
724 return ret;
725 }
726
727 /*
728 * dim2_probe - dim2 probe handler
729 * @pdev: platform device structure
730 *
731 * Register the dim2 interface with mostcore and initialize it.
732 * Return 0 on success, negative on failure.
733 */
dim2_probe(struct platform_device * pdev)734 static int dim2_probe(struct platform_device *pdev)
735 {
736 struct dim2_hdm *dev;
737 struct resource *res;
738 int ret, i;
739 struct kobject *kobj;
740
741 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
742 if (!dev)
743 return -ENOMEM;
744
745 dev->atx_idx = -1;
746
747 platform_set_drvdata(pdev, dev);
748 #if defined(ENABLE_HDM_TEST)
749 test_dev = dev;
750 #else
751 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
752 if (!res) {
753 pr_err("no memory region defined\n");
754 ret = -ENOENT;
755 goto err_free_dev;
756 }
757
758 if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
759 pr_err("failed to request mem region\n");
760 ret = -EBUSY;
761 goto err_free_dev;
762 }
763
764 dev->io_base = ioremap(res->start, resource_size(res));
765 if (!dev->io_base) {
766 pr_err("failed to ioremap\n");
767 ret = -ENOMEM;
768 goto err_release_mem;
769 }
770
771 ret = platform_get_irq(pdev, 0);
772 if (ret < 0) {
773 pr_err("failed to get irq\n");
774 goto err_unmap_io;
775 }
776 dev->irq_ahb0 = ret;
777
778 ret = request_irq(dev->irq_ahb0, dim2_ahb_isr, 0, "mlb_ahb0", dev);
779 if (ret) {
780 pr_err("failed to request IRQ: %d, err: %d\n",
781 dev->irq_ahb0, ret);
782 goto err_unmap_io;
783 }
784 #endif
785 init_waitqueue_head(&dev->netinfo_waitq);
786 dev->deliver_netinfo = 0;
787 dev->netinfo_task = kthread_run(&deliver_netinfo_thread, (void *)dev,
788 "dim2_netinfo");
789 if (IS_ERR(dev->netinfo_task)) {
790 ret = PTR_ERR(dev->netinfo_task);
791 goto err_free_irq;
792 }
793
794 for (i = 0; i < DMA_CHANNELS; i++) {
795 struct most_channel_capability *cap = dev->capabilities + i;
796 struct hdm_channel *hdm_ch = dev->hch + i;
797
798 INIT_LIST_HEAD(&hdm_ch->pending_list);
799 INIT_LIST_HEAD(&hdm_ch->started_list);
800 hdm_ch->is_initialized = false;
801 snprintf(hdm_ch->name, sizeof(hdm_ch->name), "ca%d", i * 2 + 2);
802
803 cap->name_suffix = hdm_ch->name;
804 cap->direction = MOST_CH_RX | MOST_CH_TX;
805 cap->data_type = MOST_CH_CONTROL | MOST_CH_ASYNC |
806 MOST_CH_ISOC_AVP | MOST_CH_SYNC;
807 cap->num_buffers_packet = MAX_BUFFERS_PACKET;
808 cap->buffer_size_packet = MAX_BUF_SIZE_PACKET;
809 cap->num_buffers_streaming = MAX_BUFFERS_STREAMING;
810 cap->buffer_size_streaming = MAX_BUF_SIZE_STREAMING;
811 }
812
813 {
814 const char *fmt;
815
816 if (sizeof(res->start) == sizeof(long long))
817 fmt = "dim2-%016llx";
818 else if (sizeof(res->start) == sizeof(long))
819 fmt = "dim2-%016lx";
820 else
821 fmt = "dim2-%016x";
822
823 snprintf(dev->name, sizeof(dev->name), fmt, res->start);
824 }
825
826 dev->most_iface.interface = ITYPE_MEDIALB_DIM2;
827 dev->most_iface.description = dev->name;
828 dev->most_iface.num_channels = DMA_CHANNELS;
829 dev->most_iface.channel_vector = dev->capabilities;
830 dev->most_iface.configure = configure_channel;
831 dev->most_iface.enqueue = enqueue;
832 dev->most_iface.poison_channel = poison_channel;
833 dev->most_iface.request_netinfo = request_netinfo;
834
835 kobj = most_register_interface(&dev->most_iface);
836 if (IS_ERR(kobj)) {
837 ret = PTR_ERR(kobj);
838 pr_err("failed to register MOST interface\n");
839 goto err_stop_thread;
840 }
841
842 ret = dim2_sysfs_probe(&dev->bus, kobj);
843 if (ret)
844 goto err_unreg_iface;
845
846 ret = startup_dim(pdev);
847 if (ret) {
848 pr_err("failed to initialize DIM2\n");
849 goto err_destroy_bus;
850 }
851
852 return 0;
853
854 err_destroy_bus:
855 dim2_sysfs_destroy(&dev->bus);
856 err_unreg_iface:
857 most_deregister_interface(&dev->most_iface);
858 err_stop_thread:
859 kthread_stop(dev->netinfo_task);
860 err_free_irq:
861 #if !defined(ENABLE_HDM_TEST)
862 free_irq(dev->irq_ahb0, dev);
863 err_unmap_io:
864 iounmap(dev->io_base);
865 err_release_mem:
866 release_mem_region(res->start, resource_size(res));
867 err_free_dev:
868 #endif
869 kfree(dev);
870
871 return ret;
872 }
873
874 /**
875 * dim2_remove - dim2 remove handler
876 * @pdev: platform device structure
877 *
878 * Unregister the interface from mostcore
879 */
dim2_remove(struct platform_device * pdev)880 static int dim2_remove(struct platform_device *pdev)
881 {
882 struct dim2_hdm *dev = platform_get_drvdata(pdev);
883 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
884 struct dim2_platform_data *pdata = pdev->dev.platform_data;
885 unsigned long flags;
886
887 spin_lock_irqsave(&dim_lock, flags);
888 DIM_Shutdown();
889 spin_unlock_irqrestore(&dim_lock, flags);
890
891 if (pdata && pdata->destroy)
892 pdata->destroy(pdata);
893
894 dim2_sysfs_destroy(&dev->bus);
895 most_deregister_interface(&dev->most_iface);
896 kthread_stop(dev->netinfo_task);
897 #if !defined(ENABLE_HDM_TEST)
898 free_irq(dev->irq_ahb0, dev);
899 iounmap(dev->io_base);
900 release_mem_region(res->start, resource_size(res));
901 #endif
902 kfree(dev);
903 platform_set_drvdata(pdev, NULL);
904
905 /*
906 * break link to local platform_device_id struct
907 * to prevent crash by unload platform device module
908 */
909 pdev->id_entry = NULL;
910
911 return 0;
912 }
913
914 static struct platform_device_id dim2_id[] = {
915 { "medialb_dim2" },
916 { }, /* Terminating entry */
917 };
918
919 MODULE_DEVICE_TABLE(platform, dim2_id);
920
921 static struct platform_driver dim2_driver = {
922 .probe = dim2_probe,
923 .remove = dim2_remove,
924 .id_table = dim2_id,
925 .driver = {
926 .name = "hdm_dim2",
927 },
928 };
929
930 module_platform_driver(dim2_driver);
931
932 MODULE_AUTHOR("Jain Roy Ambi <JainRoy.Ambi@microchip.com>");
933 MODULE_AUTHOR("Andrey Shvetsov <andrey.shvetsov@k2l.de>");
934 MODULE_DESCRIPTION("MediaLB DIM2 Hardware Dependent Module");
935 MODULE_LICENSE("GPL");
936