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1 /**************************************************************************
2  *
3  * Copyright  2000-2006 Alacritech, Inc.  All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above
12  *    copyright notice, this list of conditions and the following
13  *    disclaimer in the documentation and/or other materials provided
14  *    with the distribution.
15  *
16  * Alternatively, this software may be distributed under the terms of the
17  * GNU General Public License ("GPL") version 2 as published by the Free
18  * Software Foundation.
19  *
20  * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ALACRITECH, INC. OR
24  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  * The views and conclusions contained in the software and documentation
34  * are those of the authors and should not be interpreted as representing
35  * official policies, either expressed or implied, of Alacritech, Inc.
36  *
37  **************************************************************************/
38 
39 /*
40  * FILENAME: slicoss.c
41  *
42  * The SLICOSS driver for Alacritech's IS-NIC products.
43  *
44  * This driver is supposed to support:
45  *
46  *      Mojave cards (single port PCI Gigabit) both copper and fiber
47  *      Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48  *      Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49  *
50  * The driver was actually tested on Oasis and Kalahari cards.
51  *
52  *
53  * NOTE: This is the standard, non-accelerated version of Alacritech's
54  *       IS-NIC driver.
55  */
56 
57 #define KLUDGE_FOR_4GB_BOUNDARY         1
58 #define DEBUG_MICROCODE                 1
59 #define DBG                             1
60 #define SLIC_INTERRUPT_PROCESS_LIMIT	1
61 #define SLIC_OFFLOAD_IP_CHECKSUM		1
62 #define STATS_TIMER_INTERVAL			2
63 #define PING_TIMER_INTERVAL			    1
64 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
65 
66 #include <linux/kernel.h>
67 #include <linux/string.h>
68 #include <linux/errno.h>
69 #include <linux/ioport.h>
70 #include <linux/slab.h>
71 #include <linux/interrupt.h>
72 #include <linux/timer.h>
73 #include <linux/pci.h>
74 #include <linux/spinlock.h>
75 #include <linux/init.h>
76 #include <linux/bitops.h>
77 #include <linux/io.h>
78 #include <linux/netdevice.h>
79 #include <linux/crc32.h>
80 #include <linux/etherdevice.h>
81 #include <linux/skbuff.h>
82 #include <linux/delay.h>
83 #include <linux/seq_file.h>
84 #include <linux/kthread.h>
85 #include <linux/module.h>
86 
87 #include <linux/firmware.h>
88 #include <linux/types.h>
89 #include <linux/dma-mapping.h>
90 #include <linux/mii.h>
91 #include <linux/if_vlan.h>
92 #include <asm/unaligned.h>
93 
94 #include <linux/ethtool.h>
95 #include <linux/uaccess.h>
96 #include "slichw.h"
97 #include "slic.h"
98 
99 static uint slic_first_init = 1;
100 static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
101 
102 static char *slic_proc_version = "2.0.351  2006/07/14 12:26:00";
103 
104 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
105 static int intagg_delay = 100;
106 static u32 dynamic_intagg;
107 static unsigned int rcv_count;
108 
109 #define DRV_NAME          "slicoss"
110 #define DRV_VERSION       "2.0.1"
111 #define DRV_AUTHOR        "Alacritech, Inc. Engineering"
112 #define DRV_DESCRIPTION   "Alacritech SLIC Techonology(tm) "\
113 		"Non-Accelerated Driver"
114 #define DRV_COPYRIGHT     "Copyright  2000-2006 Alacritech, Inc. "\
115 		"All rights reserved."
116 #define PFX		   DRV_NAME " "
117 
118 MODULE_AUTHOR(DRV_AUTHOR);
119 MODULE_DESCRIPTION(DRV_DESCRIPTION);
120 MODULE_LICENSE("Dual BSD/GPL");
121 
122 module_param(dynamic_intagg, int, 0);
123 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
124 module_param(intagg_delay, int, 0);
125 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
126 
127 static const struct pci_device_id slic_pci_tbl[] = {
128 	{ PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
129 	{ PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
130 	{ 0 }
131 };
132 
133 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
134 
slic_reg32_write(void __iomem * reg,u32 value,bool flush)135 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
136 {
137 	writel(value, reg);
138 	if (flush)
139 		mb();
140 }
141 
slic_reg64_write(struct adapter * adapter,void __iomem * reg,u32 value,void __iomem * regh,u32 paddrh,bool flush)142 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
143 				    u32 value, void __iomem *regh, u32 paddrh,
144 				    bool flush)
145 {
146 	unsigned long flags;
147 
148 	spin_lock_irqsave(&adapter->bit64reglock, flags);
149 	writel(paddrh, regh);
150 	writel(value, reg);
151 	if (flush)
152 		mb();
153 	spin_unlock_irqrestore(&adapter->bit64reglock, flags);
154 }
155 
slic_mcast_set_bit(struct adapter * adapter,char * address)156 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
157 {
158 	unsigned char crcpoly;
159 
160 	/* Get the CRC polynomial for the mac address */
161 	/*
162 	 * we use bits 1-8 (lsb), bitwise reversed,
163 	 * msb (= lsb bit 0 before bitrev) is automatically discarded
164 	 */
165 	crcpoly = ether_crc(ETH_ALEN, address) >> 23;
166 
167 	/*
168 	 * We only have space on the SLIC for 64 entries.  Lop
169 	 * off the top two bits. (2^6 = 64)
170 	 */
171 	crcpoly &= 0x3F;
172 
173 	/* OR in the new bit into our 64 bit mask. */
174 	adapter->mcastmask |= (u64)1 << crcpoly;
175 }
176 
slic_mcast_set_mask(struct adapter * adapter)177 static void slic_mcast_set_mask(struct adapter *adapter)
178 {
179 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
180 
181 	if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
182 		/*
183 		 * Turn on all multicast addresses. We have to do this for
184 		 * promiscuous mode as well as ALLMCAST mode.  It saves the
185 		 * Microcode from having to keep state about the MAC
186 		 * configuration.
187 		 */
188 		slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
189 		slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
190 				 FLUSH);
191 	} else {
192 		/*
193 		 * Commit our multicast mast to the SLIC by writing to the
194 		 * multicast address mask registers
195 		 */
196 		slic_reg32_write(&slic_regs->slic_mcastlow,
197 			(u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
198 		slic_reg32_write(&slic_regs->slic_mcasthigh,
199 			(u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
200 	}
201 }
202 
slic_timer_ping(ulong dev)203 static void slic_timer_ping(ulong dev)
204 {
205 	struct adapter *adapter;
206 	struct sliccard *card;
207 
208 	adapter = netdev_priv((struct net_device *)dev);
209 	card = adapter->card;
210 
211 	adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
212 	add_timer(&adapter->pingtimer);
213 }
214 
slic_unmap_mmio_space(struct adapter * adapter)215 static void slic_unmap_mmio_space(struct adapter *adapter)
216 {
217 	if (adapter->slic_regs)
218 		iounmap(adapter->slic_regs);
219 	adapter->slic_regs = NULL;
220 }
221 
222 /*
223  *  slic_link_config
224  *
225  *  Write phy control to configure link duplex/speed
226  *
227  */
slic_link_config(struct adapter * adapter,u32 linkspeed,u32 linkduplex)228 static void slic_link_config(struct adapter *adapter,
229 		      u32 linkspeed, u32 linkduplex)
230 {
231 	u32 __iomem *wphy;
232 	u32 speed;
233 	u32 duplex;
234 	u32 phy_config;
235 	u32 phy_advreg;
236 	u32 phy_gctlreg;
237 
238 	if (adapter->state != ADAPT_UP)
239 		return;
240 
241 	if (linkspeed > LINK_1000MB)
242 		linkspeed = LINK_AUTOSPEED;
243 	if (linkduplex > LINK_AUTOD)
244 		linkduplex = LINK_AUTOD;
245 
246 	wphy = &adapter->slic_regs->slic_wphy;
247 
248 	if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
249 		if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
250 			/*
251 			 * We've got a fiber gigabit interface, and register
252 			 *  4 is different in fiber mode than in copper mode
253 			 */
254 
255 			/* advertise FD only @1000 Mb */
256 			phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
257 			/* enable PAUSE frames        */
258 			phy_advreg |= PAR_ASYMPAUSE_FIBER;
259 			slic_reg32_write(wphy, phy_advreg, FLUSH);
260 
261 			if (linkspeed == LINK_AUTOSPEED) {
262 				/* reset phy, enable auto-neg  */
263 				phy_config =
264 				    (MIICR_REG_PCR |
265 				     (PCR_RESET | PCR_AUTONEG |
266 				      PCR_AUTONEG_RST));
267 				slic_reg32_write(wphy, phy_config, FLUSH);
268 			} else {	/* forced 1000 Mb FD*/
269 				/*
270 				 * power down phy to break link
271 				 * this may not work)
272 				 */
273 				phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
274 				slic_reg32_write(wphy, phy_config, FLUSH);
275 				/*
276 				 * wait, Marvell says 1 sec,
277 				 * try to get away with 10 ms
278 				 */
279 				mdelay(10);
280 
281 				/*
282 				 * disable auto-neg, set speed/duplex,
283 				 * soft reset phy, powerup
284 				 */
285 				phy_config =
286 				    (MIICR_REG_PCR |
287 				     (PCR_RESET | PCR_SPEED_1000 |
288 				      PCR_DUPLEX_FULL));
289 				slic_reg32_write(wphy, phy_config, FLUSH);
290 			}
291 		} else {	/* copper gigabit */
292 
293 			/*
294 			 * Auto-Negotiate or 1000 Mb must be auto negotiated
295 			 * We've got a copper gigabit interface, and
296 			 * register 4 is different in copper mode than
297 			 * in fiber mode
298 			 */
299 			if (linkspeed == LINK_AUTOSPEED) {
300 				/* advertise 10/100 Mb modes   */
301 				phy_advreg =
302 				    (MIICR_REG_4 |
303 				     (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
304 				      | PAR_ADV10HD));
305 			} else {
306 			/*
307 			 * linkspeed == LINK_1000MB -
308 			 * don't advertise 10/100 Mb modes
309 			 */
310 				phy_advreg = MIICR_REG_4;
311 			}
312 			/* enable PAUSE frames  */
313 			phy_advreg |= PAR_ASYMPAUSE;
314 			/* required by the Cicada PHY  */
315 			phy_advreg |= PAR_802_3;
316 			slic_reg32_write(wphy, phy_advreg, FLUSH);
317 			/* advertise FD only @1000 Mb  */
318 			phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
319 			slic_reg32_write(wphy, phy_gctlreg, FLUSH);
320 
321 			if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
322 				/*
323 				 * if a Marvell PHY
324 				 * enable auto crossover
325 				 */
326 				phy_config =
327 				    (MIICR_REG_16 | (MRV_REG16_XOVERON));
328 				slic_reg32_write(wphy, phy_config, FLUSH);
329 
330 				/* reset phy, enable auto-neg  */
331 				phy_config =
332 				    (MIICR_REG_PCR |
333 				     (PCR_RESET | PCR_AUTONEG |
334 				      PCR_AUTONEG_RST));
335 				slic_reg32_write(wphy, phy_config, FLUSH);
336 			} else {	/* it's a Cicada PHY  */
337 				/* enable and restart auto-neg (don't reset)  */
338 				phy_config =
339 				    (MIICR_REG_PCR |
340 				     (PCR_AUTONEG | PCR_AUTONEG_RST));
341 				slic_reg32_write(wphy, phy_config, FLUSH);
342 			}
343 		}
344 	} else {
345 		/* Forced 10/100  */
346 		if (linkspeed == LINK_10MB)
347 			speed = 0;
348 		else
349 			speed = PCR_SPEED_100;
350 		if (linkduplex == LINK_HALFD)
351 			duplex = 0;
352 		else
353 			duplex = PCR_DUPLEX_FULL;
354 
355 		if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
356 			/*
357 			 * if a Marvell PHY
358 			 * disable auto crossover
359 			 */
360 			phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
361 			slic_reg32_write(wphy, phy_config, FLUSH);
362 		}
363 
364 		/* power down phy to break link (this may not work)  */
365 		phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
366 		slic_reg32_write(wphy, phy_config, FLUSH);
367 
368 		/* wait, Marvell says 1 sec, try to get away with 10 ms */
369 		mdelay(10);
370 
371 		if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
372 			/*
373 			 * if a Marvell PHY
374 			 * disable auto-neg, set speed,
375 			 * soft reset phy, powerup
376 			 */
377 			phy_config =
378 			    (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
379 			slic_reg32_write(wphy, phy_config, FLUSH);
380 		} else {	/* it's a Cicada PHY  */
381 			/* disable auto-neg, set speed, powerup  */
382 			phy_config = (MIICR_REG_PCR | (speed | duplex));
383 			slic_reg32_write(wphy, phy_config, FLUSH);
384 		}
385 	}
386 }
387 
slic_card_download_gbrcv(struct adapter * adapter)388 static int slic_card_download_gbrcv(struct adapter *adapter)
389 {
390 	const struct firmware *fw;
391 	const char *file = "";
392 	int ret;
393 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
394 	u32 codeaddr;
395 	u32 instruction;
396 	int index = 0;
397 	u32 rcvucodelen = 0;
398 
399 	switch (adapter->devid) {
400 	case SLIC_2GB_DEVICE_ID:
401 		file = "slicoss/oasisrcvucode.sys";
402 		break;
403 	case SLIC_1GB_DEVICE_ID:
404 		file = "slicoss/gbrcvucode.sys";
405 		break;
406 	default:
407 		return -ENOENT;
408 	}
409 
410 	ret = request_firmware(&fw, file, &adapter->pcidev->dev);
411 	if (ret) {
412 		dev_err(&adapter->pcidev->dev,
413 			"Failed to load firmware %s\n", file);
414 		return ret;
415 	}
416 
417 	rcvucodelen = *(u32 *)(fw->data + index);
418 	index += 4;
419 	switch (adapter->devid) {
420 	case SLIC_2GB_DEVICE_ID:
421 		if (rcvucodelen != OasisRcvUCodeLen) {
422 			release_firmware(fw);
423 			return -EINVAL;
424 		}
425 		break;
426 	case SLIC_1GB_DEVICE_ID:
427 		if (rcvucodelen != GBRcvUCodeLen) {
428 			release_firmware(fw);
429 			return -EINVAL;
430 		}
431 		break;
432 	}
433 	/* start download */
434 	slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
435 	/* download the rcv sequencer ucode */
436 	for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
437 		/* write out instruction address */
438 		slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
439 
440 		instruction = *(u32 *)(fw->data + index);
441 		index += 4;
442 		/* write out the instruction data low addr */
443 		slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
444 
445 		instruction = *(u8 *)(fw->data + index);
446 		index++;
447 		/* write out the instruction data high addr */
448 		slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
449 				 FLUSH);
450 	}
451 
452 	/* download finished */
453 	release_firmware(fw);
454 	slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
455 	return 0;
456 }
457 
458 MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
459 MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
460 
slic_card_download(struct adapter * adapter)461 static int slic_card_download(struct adapter *adapter)
462 {
463 	const struct firmware *fw;
464 	const char *file = "";
465 	int ret;
466 	u32 section;
467 	int thissectionsize;
468 	int codeaddr;
469 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
470 	u32 instruction;
471 	u32 baseaddress;
472 	u32 i;
473 	u32 numsects = 0;
474 	u32 sectsize[3];
475 	u32 sectstart[3];
476 	int ucode_start, index = 0;
477 
478 	switch (adapter->devid) {
479 	case SLIC_2GB_DEVICE_ID:
480 		file = "slicoss/oasisdownload.sys";
481 		break;
482 	case SLIC_1GB_DEVICE_ID:
483 		file = "slicoss/gbdownload.sys";
484 		break;
485 	default:
486 		return -ENOENT;
487 	}
488 	ret = request_firmware(&fw, file, &adapter->pcidev->dev);
489 	if (ret) {
490 		dev_err(&adapter->pcidev->dev,
491 			"Failed to load firmware %s\n", file);
492 		return ret;
493 	}
494 	numsects = *(u32 *)(fw->data + index);
495 	index += 4;
496 	for (i = 0; i < numsects; i++) {
497 		sectsize[i] = *(u32 *)(fw->data + index);
498 		index += 4;
499 	}
500 	for (i = 0; i < numsects; i++) {
501 		sectstart[i] = *(u32 *)(fw->data + index);
502 		index += 4;
503 	}
504 	ucode_start = index;
505 	instruction = *(u32 *)(fw->data + index);
506 	index += 4;
507 	for (section = 0; section < numsects; section++) {
508 		baseaddress = sectstart[section];
509 		thissectionsize = sectsize[section] >> 3;
510 
511 		for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
512 			/* Write out instruction address */
513 			slic_reg32_write(&slic_regs->slic_wcs,
514 					 baseaddress + codeaddr, FLUSH);
515 			/* Write out instruction to low addr */
516 			slic_reg32_write(&slic_regs->slic_wcs,
517 					instruction, FLUSH);
518 			instruction = *(u32 *)(fw->data + index);
519 			index += 4;
520 
521 			/* Write out instruction to high addr */
522 			slic_reg32_write(&slic_regs->slic_wcs,
523 					instruction, FLUSH);
524 			instruction = *(u32 *)(fw->data + index);
525 			index += 4;
526 		}
527 	}
528 	index = ucode_start;
529 	for (section = 0; section < numsects; section++) {
530 		instruction = *(u32 *)(fw->data + index);
531 		baseaddress = sectstart[section];
532 		if (baseaddress < 0x8000)
533 			continue;
534 		thissectionsize = sectsize[section] >> 3;
535 
536 		for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
537 			/* Write out instruction address */
538 			slic_reg32_write(&slic_regs->slic_wcs,
539 				SLIC_WCS_COMPARE | (baseaddress + codeaddr),
540 				FLUSH);
541 			/* Write out instruction to low addr */
542 			slic_reg32_write(&slic_regs->slic_wcs, instruction,
543 					 FLUSH);
544 			instruction = *(u32 *)(fw->data + index);
545 			index += 4;
546 			/* Write out instruction to high addr */
547 			slic_reg32_write(&slic_regs->slic_wcs, instruction,
548 					 FLUSH);
549 			instruction = *(u32 *)(fw->data + index);
550 			index += 4;
551 
552 			/* Check SRAM location zero. If it is non-zero. Abort.*/
553 		     /*
554 		      * failure = readl((u32 __iomem *)&slic_regs->slic_reset);
555 		      * if (failure) {
556 		      *	release_firmware(fw);
557 		      *	return -EIO;
558 		      * }
559 		      */
560 		}
561 	}
562 	release_firmware(fw);
563 	/* Everything OK, kick off the card */
564 	mdelay(10);
565 	slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
566 
567 	/*
568 	 * stall for 20 ms, long enough for ucode to init card
569 	 * and reach mainloop
570 	 */
571 	mdelay(20);
572 
573 	return 0;
574 }
575 
576 MODULE_FIRMWARE("slicoss/oasisdownload.sys");
577 MODULE_FIRMWARE("slicoss/gbdownload.sys");
578 
slic_adapter_set_hwaddr(struct adapter * adapter)579 static void slic_adapter_set_hwaddr(struct adapter *adapter)
580 {
581 	struct sliccard *card = adapter->card;
582 
583 	if ((adapter->card) && (card->config_set)) {
584 		memcpy(adapter->macaddr,
585 		       card->config.MacInfo[adapter->functionnumber].macaddrA,
586 		       sizeof(struct slic_config_mac));
587 		if (is_zero_ether_addr(adapter->currmacaddr))
588 			memcpy(adapter->currmacaddr, adapter->macaddr,
589 			       ETH_ALEN);
590 		if (adapter->netdev)
591 			memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
592 			       ETH_ALEN);
593 	}
594 }
595 
slic_intagg_set(struct adapter * adapter,u32 value)596 static void slic_intagg_set(struct adapter *adapter, u32 value)
597 {
598 	slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
599 	adapter->card->loadlevel_current = value;
600 }
601 
slic_soft_reset(struct adapter * adapter)602 static void slic_soft_reset(struct adapter *adapter)
603 {
604 	if (adapter->card->state == CARD_UP) {
605 		slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
606 		mdelay(1);
607 	}
608 
609 	slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
610 			 FLUSH);
611 	mdelay(1);
612 }
613 
slic_mac_address_config(struct adapter * adapter)614 static void slic_mac_address_config(struct adapter *adapter)
615 {
616 	u32 value;
617 	u32 value2;
618 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
619 
620 	value = ntohl(*(__be32 *)&adapter->currmacaddr[2]);
621 	slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
622 	slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
623 
624 	value2 = (u32)((adapter->currmacaddr[0] << 8 |
625 			     adapter->currmacaddr[1]) & 0xFFFF);
626 
627 	slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
628 	slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
629 
630 	/*
631 	 * Write our multicast mask out to the card.  This is done
632 	 * here in addition to the slic_mcast_addr_set routine
633 	 * because ALL_MCAST may have been enabled or disabled
634 	 */
635 	slic_mcast_set_mask(adapter);
636 }
637 
slic_mac_config(struct adapter * adapter)638 static void slic_mac_config(struct adapter *adapter)
639 {
640 	u32 value;
641 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
642 
643 	/* Setup GMAC gaps */
644 	if (adapter->linkspeed == LINK_1000MB) {
645 		value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
646 			 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
647 			 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
648 	} else {
649 		value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
650 			 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
651 			 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
652 	}
653 
654 	/* enable GMII */
655 	if (adapter->linkspeed == LINK_1000MB)
656 		value |= GMCR_GBIT;
657 
658 	/* enable fullduplex */
659 	if ((adapter->linkduplex == LINK_FULLD)
660 	    || (adapter->macopts & MAC_LOOPBACK)) {
661 		value |= GMCR_FULLD;
662 	}
663 
664 	/* write mac config */
665 	slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
666 
667 	/* setup mac addresses */
668 	slic_mac_address_config(adapter);
669 }
670 
slic_config_set(struct adapter * adapter,bool linkchange)671 static void slic_config_set(struct adapter *adapter, bool linkchange)
672 {
673 	u32 value;
674 	u32 RcrReset;
675 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
676 
677 	if (linkchange) {
678 		/* Setup MAC */
679 		slic_mac_config(adapter);
680 		RcrReset = GRCR_RESET;
681 	} else {
682 		slic_mac_address_config(adapter);
683 		RcrReset = 0;
684 	}
685 
686 	if (adapter->linkduplex == LINK_FULLD) {
687 		/* setup xmtcfg */
688 		value = (GXCR_RESET |	/* Always reset     */
689 			 GXCR_XMTEN |	/* Enable transmit  */
690 			 GXCR_PAUSEEN);	/* Enable pause     */
691 
692 		slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
693 
694 		/* Setup rcvcfg last */
695 		value = (RcrReset |	/* Reset, if linkchange */
696 			 GRCR_CTLEN |	/* Enable CTL frames    */
697 			 GRCR_ADDRAEN |	/* Address A enable     */
698 			 GRCR_RCVBAD |	/* Rcv bad frames       */
699 			 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
700 	} else {
701 		/* setup xmtcfg */
702 		value = (GXCR_RESET |	/* Always reset     */
703 			 GXCR_XMTEN);	/* Enable transmit  */
704 
705 		slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
706 
707 		/* Setup rcvcfg last */
708 		value = (RcrReset |	/* Reset, if linkchange */
709 			 GRCR_ADDRAEN |	/* Address A enable     */
710 			 GRCR_RCVBAD |	/* Rcv bad frames       */
711 			 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
712 	}
713 
714 	if (adapter->state != ADAPT_DOWN) {
715 		/* Only enable receive if we are restarting or running */
716 		value |= GRCR_RCVEN;
717 	}
718 
719 	if (adapter->macopts & MAC_PROMISC)
720 		value |= GRCR_RCVALL;
721 
722 	slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
723 }
724 
725 /*
726  *  Turn off RCV and XMT, power down PHY
727  */
slic_config_clear(struct adapter * adapter)728 static void slic_config_clear(struct adapter *adapter)
729 {
730 	u32 value;
731 	u32 phy_config;
732 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
733 
734 	/* Setup xmtcfg */
735 	value = (GXCR_RESET |	/* Always reset */
736 		 GXCR_PAUSEEN);	/* Enable pause */
737 
738 	slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
739 
740 	value = (GRCR_RESET |	/* Always reset      */
741 		 GRCR_CTLEN |	/* Enable CTL frames */
742 		 GRCR_ADDRAEN |	/* Address A enable  */
743 		 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
744 
745 	slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
746 
747 	/* power down phy */
748 	phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
749 	slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
750 }
751 
slic_mac_filter(struct adapter * adapter,struct ether_header * ether_frame)752 static bool slic_mac_filter(struct adapter *adapter,
753 			struct ether_header *ether_frame)
754 {
755 	struct net_device *netdev = adapter->netdev;
756 	u32 opts = adapter->macopts;
757 
758 	if (opts & MAC_PROMISC)
759 		return true;
760 
761 	if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
762 		if (opts & MAC_BCAST) {
763 			adapter->rcv_broadcasts++;
764 			return true;
765 		}
766 
767 		return false;
768 	}
769 
770 	if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
771 		if (opts & MAC_ALLMCAST) {
772 			adapter->rcv_multicasts++;
773 			netdev->stats.multicast++;
774 			return true;
775 		}
776 		if (opts & MAC_MCAST) {
777 			struct mcast_address *mcaddr = adapter->mcastaddrs;
778 
779 			while (mcaddr) {
780 				if (ether_addr_equal(mcaddr->address,
781 						     ether_frame->ether_dhost)) {
782 					adapter->rcv_multicasts++;
783 					netdev->stats.multicast++;
784 					return true;
785 				}
786 				mcaddr = mcaddr->next;
787 			}
788 
789 			return false;
790 		}
791 
792 		return false;
793 	}
794 	if (opts & MAC_DIRECTED) {
795 		adapter->rcv_unicasts++;
796 		return true;
797 	}
798 	return false;
799 
800 }
801 
slic_mac_set_address(struct net_device * dev,void * ptr)802 static int slic_mac_set_address(struct net_device *dev, void *ptr)
803 {
804 	struct adapter *adapter = netdev_priv(dev);
805 	struct sockaddr *addr = ptr;
806 
807 	if (netif_running(dev))
808 		return -EBUSY;
809 	if (!adapter)
810 		return -EBUSY;
811 
812 	if (!is_valid_ether_addr(addr->sa_data))
813 		return -EINVAL;
814 
815 	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
816 	memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
817 
818 	slic_config_set(adapter, true);
819 	return 0;
820 }
821 
slic_timer_load_check(ulong cardaddr)822 static void slic_timer_load_check(ulong cardaddr)
823 {
824 	struct sliccard *card = (struct sliccard *)cardaddr;
825 	struct adapter *adapter = card->master;
826 	u32 __iomem *intagg;
827 	u32 load = card->events;
828 	u32 level = 0;
829 
830 	if ((adapter) && (adapter->state == ADAPT_UP) &&
831 	    (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
832 		intagg = &adapter->slic_regs->slic_intagg;
833 		if (adapter->devid == SLIC_1GB_DEVICE_ID) {
834 			if (adapter->linkspeed == LINK_1000MB)
835 				level = 100;
836 			else {
837 				if (load > SLIC_LOAD_5)
838 					level = SLIC_INTAGG_5;
839 				else if (load > SLIC_LOAD_4)
840 					level = SLIC_INTAGG_4;
841 				else if (load > SLIC_LOAD_3)
842 					level = SLIC_INTAGG_3;
843 				else if (load > SLIC_LOAD_2)
844 					level = SLIC_INTAGG_2;
845 				else if (load > SLIC_LOAD_1)
846 					level = SLIC_INTAGG_1;
847 				else
848 					level = SLIC_INTAGG_0;
849 			}
850 			if (card->loadlevel_current != level) {
851 				card->loadlevel_current = level;
852 				slic_reg32_write(intagg, level, FLUSH);
853 			}
854 		} else {
855 			if (load > SLIC_LOAD_5)
856 				level = SLIC_INTAGG_5;
857 			else if (load > SLIC_LOAD_4)
858 				level = SLIC_INTAGG_4;
859 			else if (load > SLIC_LOAD_3)
860 				level = SLIC_INTAGG_3;
861 			else if (load > SLIC_LOAD_2)
862 				level = SLIC_INTAGG_2;
863 			else if (load > SLIC_LOAD_1)
864 				level = SLIC_INTAGG_1;
865 			else
866 				level = SLIC_INTAGG_0;
867 			if (card->loadlevel_current != level) {
868 				card->loadlevel_current = level;
869 				slic_reg32_write(intagg, level, FLUSH);
870 			}
871 		}
872 	}
873 	card->events = 0;
874 	card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
875 	add_timer(&card->loadtimer);
876 }
877 
slic_upr_queue_request(struct adapter * adapter,u32 upr_request,u32 upr_data,u32 upr_data_h,u32 upr_buffer,u32 upr_buffer_h)878 static int slic_upr_queue_request(struct adapter *adapter,
879 			   u32 upr_request,
880 			   u32 upr_data,
881 			   u32 upr_data_h,
882 			   u32 upr_buffer, u32 upr_buffer_h)
883 {
884 	struct slic_upr *upr;
885 	struct slic_upr *uprqueue;
886 
887 	upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
888 	if (!upr)
889 		return -ENOMEM;
890 
891 	upr->adapter = adapter->port;
892 	upr->upr_request = upr_request;
893 	upr->upr_data = upr_data;
894 	upr->upr_buffer = upr_buffer;
895 	upr->upr_data_h = upr_data_h;
896 	upr->upr_buffer_h = upr_buffer_h;
897 	upr->next = NULL;
898 	if (adapter->upr_list) {
899 		uprqueue = adapter->upr_list;
900 
901 		while (uprqueue->next)
902 			uprqueue = uprqueue->next;
903 		uprqueue->next = upr;
904 	} else {
905 		adapter->upr_list = upr;
906 	}
907 	return 0;
908 }
909 
slic_upr_start(struct adapter * adapter)910 static void slic_upr_start(struct adapter *adapter)
911 {
912 	struct slic_upr *upr;
913 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
914 /*
915  *  char * ptr1;
916  *  char * ptr2;
917  *  uint cmdoffset;
918  */
919 	upr = adapter->upr_list;
920 	if (!upr)
921 		return;
922 	if (adapter->upr_busy)
923 		return;
924 	adapter->upr_busy = 1;
925 
926 	switch (upr->upr_request) {
927 	case SLIC_UPR_STATS:
928 		if (upr->upr_data_h == 0) {
929 			slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
930 					 FLUSH);
931 		} else {
932 			slic_reg64_write(adapter, &slic_regs->slic_stats64,
933 					 upr->upr_data,
934 					 &slic_regs->slic_addr_upper,
935 					 upr->upr_data_h, FLUSH);
936 		}
937 		break;
938 
939 	case SLIC_UPR_RLSR:
940 		slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
941 				 &slic_regs->slic_addr_upper, upr->upr_data_h,
942 				 FLUSH);
943 		break;
944 
945 	case SLIC_UPR_RCONFIG:
946 		slic_reg64_write(adapter, &slic_regs->slic_rconfig,
947 				 upr->upr_data, &slic_regs->slic_addr_upper,
948 				 upr->upr_data_h, FLUSH);
949 		break;
950 	case SLIC_UPR_PING:
951 		slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
952 		break;
953 	}
954 }
955 
slic_upr_request(struct adapter * adapter,u32 upr_request,u32 upr_data,u32 upr_data_h,u32 upr_buffer,u32 upr_buffer_h)956 static int slic_upr_request(struct adapter *adapter,
957 		     u32 upr_request,
958 		     u32 upr_data,
959 		     u32 upr_data_h,
960 		     u32 upr_buffer, u32 upr_buffer_h)
961 {
962 	unsigned long flags;
963 	int rc;
964 
965 	spin_lock_irqsave(&adapter->upr_lock, flags);
966 	rc = slic_upr_queue_request(adapter,
967 					upr_request,
968 					upr_data,
969 					upr_data_h, upr_buffer, upr_buffer_h);
970 	if (rc)
971 		goto err_unlock_irq;
972 
973 	slic_upr_start(adapter);
974 err_unlock_irq:
975 	spin_unlock_irqrestore(&adapter->upr_lock, flags);
976 	return rc;
977 }
978 
slic_link_upr_complete(struct adapter * adapter,u32 isr)979 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
980 {
981 	u32 linkstatus = adapter->pshmem->linkstatus;
982 	uint linkup;
983 	unsigned char linkspeed;
984 	unsigned char linkduplex;
985 
986 	if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
987 		struct slic_shmem *pshmem;
988 
989 		pshmem = (struct slic_shmem *)(unsigned long)
990 			 adapter->phys_shmem;
991 #if BITS_PER_LONG == 64
992 		slic_upr_queue_request(adapter,
993 				       SLIC_UPR_RLSR,
994 				       SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
995 				       SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
996 				       0, 0);
997 #else
998 		slic_upr_queue_request(adapter,
999 				       SLIC_UPR_RLSR,
1000 				       (u32)&pshmem->linkstatus,
1001 				       SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
1002 #endif
1003 		return;
1004 	}
1005 	if (adapter->state != ADAPT_UP)
1006 		return;
1007 
1008 	linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
1009 	if (linkstatus & GIG_SPEED_1000)
1010 		linkspeed = LINK_1000MB;
1011 	else if (linkstatus & GIG_SPEED_100)
1012 		linkspeed = LINK_100MB;
1013 	else
1014 		linkspeed = LINK_10MB;
1015 
1016 	if (linkstatus & GIG_FULLDUPLEX)
1017 		linkduplex = LINK_FULLD;
1018 	else
1019 		linkduplex = LINK_HALFD;
1020 
1021 	if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1022 		return;
1023 
1024 	/* link up event, but nothing has changed */
1025 	if ((adapter->linkstate == LINK_UP) &&
1026 	    (linkup == LINK_UP) &&
1027 	    (adapter->linkspeed == linkspeed) &&
1028 	    (adapter->linkduplex == linkduplex))
1029 		return;
1030 
1031 	/* link has changed at this point */
1032 
1033 	/* link has gone from up to down */
1034 	if (linkup == LINK_DOWN) {
1035 		adapter->linkstate = LINK_DOWN;
1036 		return;
1037 	}
1038 
1039 	/* link has gone from down to up */
1040 	adapter->linkspeed = linkspeed;
1041 	adapter->linkduplex = linkduplex;
1042 
1043 	if (adapter->linkstate != LINK_UP) {
1044 		/* setup the mac */
1045 		slic_config_set(adapter, true);
1046 		adapter->linkstate = LINK_UP;
1047 		netif_start_queue(adapter->netdev);
1048 	}
1049 }
1050 
slic_upr_request_complete(struct adapter * adapter,u32 isr)1051 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1052 {
1053 	struct sliccard *card = adapter->card;
1054 	struct slic_upr *upr;
1055 	unsigned long flags;
1056 
1057 	spin_lock_irqsave(&adapter->upr_lock, flags);
1058 	upr = adapter->upr_list;
1059 	if (!upr) {
1060 		spin_unlock_irqrestore(&adapter->upr_lock, flags);
1061 		return;
1062 	}
1063 	adapter->upr_list = upr->next;
1064 	upr->next = NULL;
1065 	adapter->upr_busy = 0;
1066 	switch (upr->upr_request) {
1067 	case SLIC_UPR_STATS:
1068 		{
1069 			struct slic_stats *slicstats =
1070 			    (struct slic_stats *)&adapter->pshmem->inicstats;
1071 			struct slic_stats *newstats = slicstats;
1072 			struct slic_stats  *old = &adapter->inicstats_prev;
1073 			struct slicnet_stats *stst = &adapter->slic_stats;
1074 
1075 			if (isr & ISR_UPCERR) {
1076 				dev_err(&adapter->netdev->dev,
1077 					"SLIC_UPR_STATS command failed isr[%x]\n",
1078 					isr);
1079 
1080 				break;
1081 			}
1082 			UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1083 					newstats->xmit_tcp_segs_gb,
1084 					old->xmit_tcp_segs_gb);
1085 
1086 			UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1087 					newstats->xmit_tcp_bytes_gb,
1088 					old->xmit_tcp_bytes_gb);
1089 
1090 			UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1091 					newstats->rcv_tcp_segs_gb,
1092 					old->rcv_tcp_segs_gb);
1093 
1094 			UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1095 					newstats->rcv_tcp_bytes_gb,
1096 					old->rcv_tcp_bytes_gb);
1097 
1098 			UPDATE_STATS_GB(stst->iface.xmt_bytes,
1099 					newstats->xmit_bytes_gb,
1100 					old->xmit_bytes_gb);
1101 
1102 			UPDATE_STATS_GB(stst->iface.xmt_ucast,
1103 					newstats->xmit_unicasts_gb,
1104 					old->xmit_unicasts_gb);
1105 
1106 			UPDATE_STATS_GB(stst->iface.rcv_bytes,
1107 					newstats->rcv_bytes_gb,
1108 					old->rcv_bytes_gb);
1109 
1110 			UPDATE_STATS_GB(stst->iface.rcv_ucast,
1111 					newstats->rcv_unicasts_gb,
1112 					old->rcv_unicasts_gb);
1113 
1114 			UPDATE_STATS_GB(stst->iface.xmt_errors,
1115 					newstats->xmit_collisions_gb,
1116 					old->xmit_collisions_gb);
1117 
1118 			UPDATE_STATS_GB(stst->iface.xmt_errors,
1119 					newstats->xmit_excess_collisions_gb,
1120 					old->xmit_excess_collisions_gb);
1121 
1122 			UPDATE_STATS_GB(stst->iface.xmt_errors,
1123 					newstats->xmit_other_error_gb,
1124 					old->xmit_other_error_gb);
1125 
1126 			UPDATE_STATS_GB(stst->iface.rcv_errors,
1127 					newstats->rcv_other_error_gb,
1128 					old->rcv_other_error_gb);
1129 
1130 			UPDATE_STATS_GB(stst->iface.rcv_discards,
1131 					newstats->rcv_drops_gb,
1132 					old->rcv_drops_gb);
1133 
1134 			if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1135 				adapter->rcv_drops +=
1136 				    (newstats->rcv_drops_gb -
1137 				     old->rcv_drops_gb);
1138 			}
1139 			memcpy(old, newstats, sizeof(struct slic_stats));
1140 			break;
1141 		}
1142 	case SLIC_UPR_RLSR:
1143 		slic_link_upr_complete(adapter, isr);
1144 		break;
1145 	case SLIC_UPR_RCONFIG:
1146 		break;
1147 	case SLIC_UPR_PING:
1148 		card->pingstatus |= (isr & ISR_PINGDSMASK);
1149 		break;
1150 	}
1151 	kfree(upr);
1152 	slic_upr_start(adapter);
1153 	spin_unlock_irqrestore(&adapter->upr_lock, flags);
1154 }
1155 
slic_config_get(struct adapter * adapter,u32 config,u32 config_h)1156 static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h)
1157 {
1158 	return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h,
1159 				0, 0);
1160 }
1161 
1162 /*
1163  * Compute a checksum of the EEPROM according to RFC 1071.
1164  */
slic_eeprom_cksum(void * eeprom,unsigned len)1165 static u16 slic_eeprom_cksum(void *eeprom, unsigned len)
1166 {
1167 	u16 *wp = eeprom;
1168 	u32 checksum = 0;
1169 
1170 	while (len > 1) {
1171 		checksum += *(wp++);
1172 		len -= 2;
1173 	}
1174 
1175 	if (len > 0)
1176 		checksum += *(u8 *)wp;
1177 
1178 	while (checksum >> 16)
1179 		checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
1180 
1181 	return ~checksum;
1182 }
1183 
slic_rspqueue_free(struct adapter * adapter)1184 static void slic_rspqueue_free(struct adapter *adapter)
1185 {
1186 	int i;
1187 	struct slic_rspqueue *rspq = &adapter->rspqueue;
1188 
1189 	for (i = 0; i < rspq->num_pages; i++) {
1190 		if (rspq->vaddr[i]) {
1191 			pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1192 					    rspq->vaddr[i], rspq->paddr[i]);
1193 		}
1194 		rspq->vaddr[i] = NULL;
1195 		rspq->paddr[i] = 0;
1196 	}
1197 	rspq->offset = 0;
1198 	rspq->pageindex = 0;
1199 	rspq->rspbuf = NULL;
1200 }
1201 
slic_rspqueue_init(struct adapter * adapter)1202 static int slic_rspqueue_init(struct adapter *adapter)
1203 {
1204 	int i;
1205 	struct slic_rspqueue *rspq = &adapter->rspqueue;
1206 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
1207 	u32 paddrh = 0;
1208 
1209 	memset(rspq, 0, sizeof(struct slic_rspqueue));
1210 
1211 	rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1212 
1213 	for (i = 0; i < rspq->num_pages; i++) {
1214 		rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev,
1215 						       PAGE_SIZE,
1216 						       &rspq->paddr[i]);
1217 		if (!rspq->vaddr[i]) {
1218 			dev_err(&adapter->pcidev->dev,
1219 				"pci_alloc_consistent failed\n");
1220 			slic_rspqueue_free(adapter);
1221 			return -ENOMEM;
1222 		}
1223 
1224 		if (paddrh == 0) {
1225 			slic_reg32_write(&slic_regs->slic_rbar,
1226 				(rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1227 				DONT_FLUSH);
1228 		} else {
1229 			slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1230 				(rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1231 				&slic_regs->slic_addr_upper,
1232 				paddrh, DONT_FLUSH);
1233 		}
1234 	}
1235 	rspq->offset = 0;
1236 	rspq->pageindex = 0;
1237 	rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1238 	return 0;
1239 }
1240 
slic_rspqueue_getnext(struct adapter * adapter)1241 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1242 {
1243 	struct slic_rspqueue *rspq = &adapter->rspqueue;
1244 	struct slic_rspbuf *buf;
1245 
1246 	if (!(rspq->rspbuf->status))
1247 		return NULL;
1248 
1249 	buf = rspq->rspbuf;
1250 	if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1251 		rspq->rspbuf++;
1252 	} else {
1253 		slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1254 			(rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1255 			&adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1256 		rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
1257 		rspq->offset = 0;
1258 		rspq->rspbuf = (struct slic_rspbuf *)
1259 						rspq->vaddr[rspq->pageindex];
1260 	}
1261 
1262 	return buf;
1263 }
1264 
slic_cmdqmem_free(struct adapter * adapter)1265 static void slic_cmdqmem_free(struct adapter *adapter)
1266 {
1267 	struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1268 	int i;
1269 
1270 	for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1271 		if (cmdqmem->pages[i]) {
1272 			pci_free_consistent(adapter->pcidev,
1273 					    PAGE_SIZE,
1274 					    (void *)cmdqmem->pages[i],
1275 					    cmdqmem->dma_pages[i]);
1276 		}
1277 	}
1278 	memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1279 }
1280 
slic_cmdqmem_addpage(struct adapter * adapter)1281 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1282 {
1283 	struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1284 	u32 *pageaddr;
1285 
1286 	if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1287 		return NULL;
1288 	pageaddr = pci_alloc_consistent(adapter->pcidev,
1289 					PAGE_SIZE,
1290 					&cmdqmem->dma_pages[cmdqmem->pagecnt]);
1291 	if (!pageaddr)
1292 		return NULL;
1293 
1294 	cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1295 	cmdqmem->pagecnt++;
1296 	return pageaddr;
1297 }
1298 
slic_cmdq_free(struct adapter * adapter)1299 static void slic_cmdq_free(struct adapter *adapter)
1300 {
1301 	struct slic_hostcmd *cmd;
1302 
1303 	cmd = adapter->cmdq_all.head;
1304 	while (cmd) {
1305 		if (cmd->busy) {
1306 			struct sk_buff *tempskb;
1307 
1308 			tempskb = cmd->skb;
1309 			if (tempskb) {
1310 				cmd->skb = NULL;
1311 				dev_kfree_skb_irq(tempskb);
1312 			}
1313 		}
1314 		cmd = cmd->next_all;
1315 	}
1316 	memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1317 	memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1318 	memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1319 	slic_cmdqmem_free(adapter);
1320 }
1321 
slic_cmdq_addcmdpage(struct adapter * adapter,u32 * page)1322 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1323 {
1324 	struct slic_hostcmd *cmd;
1325 	struct slic_hostcmd *prev;
1326 	struct slic_hostcmd *tail;
1327 	struct slic_cmdqueue *cmdq;
1328 	int cmdcnt;
1329 	void *cmdaddr;
1330 	ulong phys_addr;
1331 	u32 phys_addrl;
1332 	u32 phys_addrh;
1333 	struct slic_handle *pslic_handle;
1334 	unsigned long flags;
1335 
1336 	cmdaddr = page;
1337 	cmd = cmdaddr;
1338 	cmdcnt = 0;
1339 
1340 	phys_addr = virt_to_bus((void *)page);
1341 	phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1342 	phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1343 
1344 	prev = NULL;
1345 	tail = cmd;
1346 	while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1347 	       (adapter->slic_handle_ix < 256)) {
1348 		/* Allocate and initialize a SLIC_HANDLE for this command */
1349 		spin_lock_irqsave(&adapter->handle_lock, flags);
1350 		pslic_handle  =  adapter->pfree_slic_handles;
1351 		adapter->pfree_slic_handles = pslic_handle->next;
1352 		spin_unlock_irqrestore(&adapter->handle_lock, flags);
1353 		pslic_handle->type = SLIC_HANDLE_CMD;
1354 		pslic_handle->address = (void *)cmd;
1355 		pslic_handle->offset = (ushort)adapter->slic_handle_ix++;
1356 		pslic_handle->other_handle = NULL;
1357 		pslic_handle->next = NULL;
1358 
1359 		cmd->pslic_handle = pslic_handle;
1360 		cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1361 		cmd->busy = false;
1362 		cmd->paddrl = phys_addrl;
1363 		cmd->paddrh = phys_addrh;
1364 		cmd->next_all = prev;
1365 		cmd->next = prev;
1366 		prev = cmd;
1367 		phys_addrl += SLIC_HOSTCMD_SIZE;
1368 		cmdaddr += SLIC_HOSTCMD_SIZE;
1369 
1370 		cmd = cmdaddr;
1371 		cmdcnt++;
1372 	}
1373 
1374 	cmdq = &adapter->cmdq_all;
1375 	cmdq->count += cmdcnt;	/*  SLIC_CMDQ_CMDSINPAGE;   mooktodo */
1376 	tail->next_all = cmdq->head;
1377 	cmdq->head = prev;
1378 	cmdq = &adapter->cmdq_free;
1379 	spin_lock_irqsave(&cmdq->lock, flags);
1380 	cmdq->count += cmdcnt;	/*  SLIC_CMDQ_CMDSINPAGE;   mooktodo */
1381 	tail->next = cmdq->head;
1382 	cmdq->head = prev;
1383 	spin_unlock_irqrestore(&cmdq->lock, flags);
1384 }
1385 
slic_cmdq_init(struct adapter * adapter)1386 static int slic_cmdq_init(struct adapter *adapter)
1387 {
1388 	int i;
1389 	u32 *pageaddr;
1390 
1391 	memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1392 	memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1393 	memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1394 	spin_lock_init(&adapter->cmdq_all.lock);
1395 	spin_lock_init(&adapter->cmdq_free.lock);
1396 	spin_lock_init(&adapter->cmdq_done.lock);
1397 	memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1398 	adapter->slic_handle_ix = 1;
1399 	for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1400 		pageaddr = slic_cmdqmem_addpage(adapter);
1401 		if (!pageaddr) {
1402 			slic_cmdq_free(adapter);
1403 			return -ENOMEM;
1404 		}
1405 		slic_cmdq_addcmdpage(adapter, pageaddr);
1406 	}
1407 	adapter->slic_handle_ix = 1;
1408 
1409 	return 0;
1410 }
1411 
slic_cmdq_reset(struct adapter * adapter)1412 static void slic_cmdq_reset(struct adapter *adapter)
1413 {
1414 	struct slic_hostcmd *hcmd;
1415 	struct sk_buff *skb;
1416 	u32 outstanding;
1417 	unsigned long flags;
1418 
1419 	spin_lock_irqsave(&adapter->cmdq_free.lock, flags);
1420 	spin_lock(&adapter->cmdq_done.lock);
1421 	outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1422 	outstanding -= adapter->cmdq_free.count;
1423 	hcmd = adapter->cmdq_all.head;
1424 	while (hcmd) {
1425 		if (hcmd->busy) {
1426 			skb = hcmd->skb;
1427 			hcmd->busy = 0;
1428 			hcmd->skb = NULL;
1429 			dev_kfree_skb_irq(skb);
1430 		}
1431 		hcmd = hcmd->next_all;
1432 	}
1433 	adapter->cmdq_free.count = 0;
1434 	adapter->cmdq_free.head = NULL;
1435 	adapter->cmdq_free.tail = NULL;
1436 	adapter->cmdq_done.count = 0;
1437 	adapter->cmdq_done.head = NULL;
1438 	adapter->cmdq_done.tail = NULL;
1439 	adapter->cmdq_free.head = adapter->cmdq_all.head;
1440 	hcmd = adapter->cmdq_all.head;
1441 	while (hcmd) {
1442 		adapter->cmdq_free.count++;
1443 		hcmd->next = hcmd->next_all;
1444 		hcmd = hcmd->next_all;
1445 	}
1446 	if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1447 		dev_err(&adapter->netdev->dev,
1448 			"free_count %d != all count %d\n",
1449 			adapter->cmdq_free.count, adapter->cmdq_all.count);
1450 	}
1451 	spin_unlock(&adapter->cmdq_done.lock);
1452 	spin_unlock_irqrestore(&adapter->cmdq_free.lock, flags);
1453 }
1454 
slic_cmdq_getdone(struct adapter * adapter)1455 static void slic_cmdq_getdone(struct adapter *adapter)
1456 {
1457 	struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1458 	struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1459 	unsigned long flags;
1460 
1461 	spin_lock_irqsave(&done_cmdq->lock, flags);
1462 
1463 	free_cmdq->head = done_cmdq->head;
1464 	free_cmdq->count = done_cmdq->count;
1465 	done_cmdq->head = NULL;
1466 	done_cmdq->tail = NULL;
1467 	done_cmdq->count = 0;
1468 	spin_unlock_irqrestore(&done_cmdq->lock, flags);
1469 }
1470 
slic_cmdq_getfree(struct adapter * adapter)1471 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1472 {
1473 	struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1474 	struct slic_hostcmd *cmd = NULL;
1475 	unsigned long flags;
1476 
1477 lock_and_retry:
1478 	spin_lock_irqsave(&cmdq->lock, flags);
1479 retry:
1480 	cmd = cmdq->head;
1481 	if (cmd) {
1482 		cmdq->head = cmd->next;
1483 		cmdq->count--;
1484 		spin_unlock_irqrestore(&cmdq->lock, flags);
1485 	} else {
1486 		slic_cmdq_getdone(adapter);
1487 		cmd = cmdq->head;
1488 		if (cmd) {
1489 			goto retry;
1490 		} else {
1491 			u32 *pageaddr;
1492 
1493 			spin_unlock_irqrestore(&cmdq->lock, flags);
1494 			pageaddr = slic_cmdqmem_addpage(adapter);
1495 			if (pageaddr) {
1496 				slic_cmdq_addcmdpage(adapter, pageaddr);
1497 				goto lock_and_retry;
1498 			}
1499 		}
1500 	}
1501 	return cmd;
1502 }
1503 
slic_cmdq_putdone_irq(struct adapter * adapter,struct slic_hostcmd * cmd)1504 static void slic_cmdq_putdone_irq(struct adapter *adapter,
1505 				struct slic_hostcmd *cmd)
1506 {
1507 	struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1508 
1509 	spin_lock(&cmdq->lock);
1510 	cmd->busy = 0;
1511 	cmd->next = cmdq->head;
1512 	cmdq->head = cmd;
1513 	cmdq->count++;
1514 	if ((adapter->xmitq_full) && (cmdq->count > 10))
1515 		netif_wake_queue(adapter->netdev);
1516 	spin_unlock(&cmdq->lock);
1517 }
1518 
slic_rcvqueue_fill(struct adapter * adapter)1519 static int slic_rcvqueue_fill(struct adapter *adapter)
1520 {
1521 	void *paddr;
1522 	u32 paddrl;
1523 	u32 paddrh;
1524 	struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1525 	int i = 0;
1526 	struct device *dev = &adapter->netdev->dev;
1527 
1528 	while (i < SLIC_RCVQ_FILLENTRIES) {
1529 		struct slic_rcvbuf *rcvbuf;
1530 		struct sk_buff *skb;
1531 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1532 retry_rcvqfill:
1533 #endif
1534 		skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1535 		if (skb) {
1536 			paddr = (void *)(unsigned long)
1537 				pci_map_single(adapter->pcidev,
1538 					       skb->data,
1539 					       SLIC_RCVQ_RCVBUFSIZE,
1540 					       PCI_DMA_FROMDEVICE);
1541 			paddrl = SLIC_GET_ADDR_LOW(paddr);
1542 			paddrh = SLIC_GET_ADDR_HIGH(paddr);
1543 
1544 			skb->len = SLIC_RCVBUF_HEADSIZE;
1545 			rcvbuf = (struct slic_rcvbuf *)skb->head;
1546 			rcvbuf->status = 0;
1547 			skb->next = NULL;
1548 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1549 			if (paddrl == 0) {
1550 				dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1551 					__func__);
1552 				dev_err(dev, "skb[%p] PROBLEM\n", skb);
1553 				dev_err(dev, "         skbdata[%p]\n",
1554 						skb->data);
1555 				dev_err(dev, "         skblen[%x]\n", skb->len);
1556 				dev_err(dev, "         paddr[%p]\n", paddr);
1557 				dev_err(dev, "         paddrl[%x]\n", paddrl);
1558 				dev_err(dev, "         paddrh[%x]\n", paddrh);
1559 				dev_err(dev, "         rcvq->head[%p]\n",
1560 						rcvq->head);
1561 				dev_err(dev, "         rcvq->tail[%p]\n",
1562 						rcvq->tail);
1563 				dev_err(dev, "         rcvq->count[%x]\n",
1564 						rcvq->count);
1565 				dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1566 				goto retry_rcvqfill;
1567 			}
1568 #else
1569 			if (paddrl == 0) {
1570 				dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1571 					__func__);
1572 				dev_err(dev, "skb[%p] PROBLEM\n", skb);
1573 				dev_err(dev, "         skbdata[%p]\n",
1574 						skb->data);
1575 				dev_err(dev, "         skblen[%x]\n", skb->len);
1576 				dev_err(dev, "         paddr[%p]\n", paddr);
1577 				dev_err(dev, "         paddrl[%x]\n", paddrl);
1578 				dev_err(dev, "         paddrh[%x]\n", paddrh);
1579 				dev_err(dev, "         rcvq->head[%p]\n",
1580 						rcvq->head);
1581 				dev_err(dev, "         rcvq->tail[%p]\n",
1582 						rcvq->tail);
1583 				dev_err(dev, "         rcvq->count[%x]\n",
1584 						rcvq->count);
1585 				dev_err(dev, "GIVE TO CARD ANYWAY\n");
1586 			}
1587 #endif
1588 			if (paddrh == 0) {
1589 				slic_reg32_write(&adapter->slic_regs->slic_hbar,
1590 						 (u32)paddrl, DONT_FLUSH);
1591 			} else {
1592 				slic_reg64_write(adapter,
1593 					&adapter->slic_regs->slic_hbar64,
1594 					paddrl,
1595 					&adapter->slic_regs->slic_addr_upper,
1596 					paddrh, DONT_FLUSH);
1597 			}
1598 			if (rcvq->head)
1599 				rcvq->tail->next = skb;
1600 			else
1601 				rcvq->head = skb;
1602 			rcvq->tail = skb;
1603 			rcvq->count++;
1604 			i++;
1605 		} else {
1606 			dev_err(&adapter->netdev->dev,
1607 				"slic_rcvqueue_fill could only get [%d] skbuffs\n",
1608 				i);
1609 			break;
1610 		}
1611 	}
1612 	return i;
1613 }
1614 
slic_rcvqueue_free(struct adapter * adapter)1615 static void slic_rcvqueue_free(struct adapter *adapter)
1616 {
1617 	struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1618 	struct sk_buff *skb;
1619 
1620 	while (rcvq->head) {
1621 		skb = rcvq->head;
1622 		rcvq->head = rcvq->head->next;
1623 		dev_kfree_skb(skb);
1624 	}
1625 	rcvq->tail = NULL;
1626 	rcvq->head = NULL;
1627 	rcvq->count = 0;
1628 }
1629 
slic_rcvqueue_init(struct adapter * adapter)1630 static int slic_rcvqueue_init(struct adapter *adapter)
1631 {
1632 	int i, count;
1633 	struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1634 
1635 	rcvq->tail = NULL;
1636 	rcvq->head = NULL;
1637 	rcvq->size = SLIC_RCVQ_ENTRIES;
1638 	rcvq->errors = 0;
1639 	rcvq->count = 0;
1640 	i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES;
1641 	count = 0;
1642 	while (i) {
1643 		count += slic_rcvqueue_fill(adapter);
1644 		i--;
1645 	}
1646 	if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1647 		slic_rcvqueue_free(adapter);
1648 		return -ENOMEM;
1649 	}
1650 	return 0;
1651 }
1652 
slic_rcvqueue_getnext(struct adapter * adapter)1653 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1654 {
1655 	struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1656 	struct sk_buff *skb;
1657 	struct slic_rcvbuf *rcvbuf;
1658 	int count;
1659 
1660 	if (rcvq->count) {
1661 		skb = rcvq->head;
1662 		rcvbuf = (struct slic_rcvbuf *)skb->head;
1663 
1664 		if (rcvbuf->status & IRHDDR_SVALID) {
1665 			rcvq->head = rcvq->head->next;
1666 			skb->next = NULL;
1667 			rcvq->count--;
1668 		} else {
1669 			skb = NULL;
1670 		}
1671 	} else {
1672 		dev_err(&adapter->netdev->dev,
1673 			"RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1674 		skb = NULL;
1675 	}
1676 	while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1677 		count = slic_rcvqueue_fill(adapter);
1678 		if (!count)
1679 			break;
1680 	}
1681 	if (skb)
1682 		rcvq->errors = 0;
1683 	return skb;
1684 }
1685 
slic_rcvqueue_reinsert(struct adapter * adapter,struct sk_buff * skb)1686 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1687 {
1688 	struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1689 	void *paddr;
1690 	u32 paddrl;
1691 	u32 paddrh;
1692 	struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1693 	struct device *dev;
1694 
1695 	paddr = (void *)(unsigned long)
1696 		pci_map_single(adapter->pcidev, skb->head,
1697 			       SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1698 	rcvbuf->status = 0;
1699 	skb->next = NULL;
1700 
1701 	paddrl = SLIC_GET_ADDR_LOW(paddr);
1702 	paddrh = SLIC_GET_ADDR_HIGH(paddr);
1703 
1704 	if (paddrl == 0) {
1705 		dev = &adapter->netdev->dev;
1706 		dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1707 			__func__);
1708 		dev_err(dev, "skb[%p] PROBLEM\n", skb);
1709 		dev_err(dev, "         skbdata[%p]\n", skb->data);
1710 		dev_err(dev, "         skblen[%x]\n", skb->len);
1711 		dev_err(dev, "         paddr[%p]\n", paddr);
1712 		dev_err(dev, "         paddrl[%x]\n", paddrl);
1713 		dev_err(dev, "         paddrh[%x]\n", paddrh);
1714 		dev_err(dev, "         rcvq->head[%p]\n", rcvq->head);
1715 		dev_err(dev, "         rcvq->tail[%p]\n", rcvq->tail);
1716 		dev_err(dev, "         rcvq->count[%x]\n", rcvq->count);
1717 	}
1718 	if (paddrh == 0) {
1719 		slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1720 				 DONT_FLUSH);
1721 	} else {
1722 		slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1723 				 paddrl, &adapter->slic_regs->slic_addr_upper,
1724 				 paddrh, DONT_FLUSH);
1725 	}
1726 	if (rcvq->head)
1727 		rcvq->tail->next = skb;
1728 	else
1729 		rcvq->head = skb;
1730 	rcvq->tail = skb;
1731 	rcvq->count++;
1732 	return rcvq->count;
1733 }
1734 
1735 /*
1736  * slic_link_event_handler -
1737  *
1738  * Initiate a link configuration sequence.  The link configuration begins
1739  * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1740  * SLIC.  Since the command finishes asynchronously, the slic_upr_comlete
1741  * routine will follow it up witha UP configuration write command, which
1742  * will also complete asynchronously.
1743  *
1744  */
slic_link_event_handler(struct adapter * adapter)1745 static int slic_link_event_handler(struct adapter *adapter)
1746 {
1747 	int status;
1748 	struct slic_shmem *pshmem;
1749 
1750 	if (adapter->state != ADAPT_UP) {
1751 		/* Adapter is not operational.  Ignore.  */
1752 		return -ENODEV;
1753 	}
1754 
1755 	pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
1756 
1757 #if BITS_PER_LONG == 64
1758 	status = slic_upr_request(adapter,
1759 				  SLIC_UPR_RLSR,
1760 				  SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1761 				  SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1762 				  0, 0);
1763 #else
1764 	status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1765 		(u32)&pshmem->linkstatus,	/* no 4GB wrap guaranteed */
1766 				  0, 0, 0);
1767 #endif
1768 	return status;
1769 }
1770 
slic_init_cleanup(struct adapter * adapter)1771 static void slic_init_cleanup(struct adapter *adapter)
1772 {
1773 	if (adapter->intrregistered) {
1774 		adapter->intrregistered = 0;
1775 		free_irq(adapter->netdev->irq, adapter->netdev);
1776 
1777 	}
1778 	if (adapter->pshmem) {
1779 		pci_free_consistent(adapter->pcidev,
1780 				    sizeof(struct slic_shmem),
1781 				    adapter->pshmem, adapter->phys_shmem);
1782 		adapter->pshmem = NULL;
1783 		adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
1784 	}
1785 
1786 	if (adapter->pingtimerset) {
1787 		adapter->pingtimerset = 0;
1788 		del_timer(&adapter->pingtimer);
1789 	}
1790 
1791 	slic_rspqueue_free(adapter);
1792 	slic_cmdq_free(adapter);
1793 	slic_rcvqueue_free(adapter);
1794 }
1795 
1796 /*
1797  *  Allocate a mcast_address structure to hold the multicast address.
1798  *  Link it in.
1799  */
slic_mcast_add_list(struct adapter * adapter,char * address)1800 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1801 {
1802 	struct mcast_address *mcaddr, *mlist;
1803 
1804 	/* Check to see if it already exists */
1805 	mlist = adapter->mcastaddrs;
1806 	while (mlist) {
1807 		if (ether_addr_equal(mlist->address, address))
1808 			return 0;
1809 		mlist = mlist->next;
1810 	}
1811 
1812 	/* Doesn't already exist.  Allocate a structure to hold it */
1813 	mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1814 	if (mcaddr == NULL)
1815 		return 1;
1816 
1817 	ether_addr_copy(mcaddr->address, address);
1818 
1819 	mcaddr->next = adapter->mcastaddrs;
1820 	adapter->mcastaddrs = mcaddr;
1821 
1822 	return 0;
1823 }
1824 
slic_mcast_set_list(struct net_device * dev)1825 static void slic_mcast_set_list(struct net_device *dev)
1826 {
1827 	struct adapter *adapter = netdev_priv(dev);
1828 	int status = 0;
1829 	char *addresses;
1830 	struct netdev_hw_addr *ha;
1831 
1832 	netdev_for_each_mc_addr(ha, dev) {
1833 		addresses = (char *)&ha->addr;
1834 		status = slic_mcast_add_list(adapter, addresses);
1835 		if (status != 0)
1836 			break;
1837 		slic_mcast_set_bit(adapter, addresses);
1838 	}
1839 
1840 	if (adapter->devflags_prev != dev->flags) {
1841 		adapter->macopts = MAC_DIRECTED;
1842 		if (dev->flags) {
1843 			if (dev->flags & IFF_BROADCAST)
1844 				adapter->macopts |= MAC_BCAST;
1845 			if (dev->flags & IFF_PROMISC)
1846 				adapter->macopts |= MAC_PROMISC;
1847 			if (dev->flags & IFF_ALLMULTI)
1848 				adapter->macopts |= MAC_ALLMCAST;
1849 			if (dev->flags & IFF_MULTICAST)
1850 				adapter->macopts |= MAC_MCAST;
1851 		}
1852 		adapter->devflags_prev = dev->flags;
1853 		slic_config_set(adapter, true);
1854 	} else {
1855 		if (status == 0)
1856 			slic_mcast_set_mask(adapter);
1857 	}
1858 }
1859 
1860 #define  XMIT_FAIL_LINK_STATE               1
1861 #define  XMIT_FAIL_ZERO_LENGTH              2
1862 #define  XMIT_FAIL_HOSTCMD_FAIL             3
1863 
slic_xmit_build_request(struct adapter * adapter,struct slic_hostcmd * hcmd,struct sk_buff * skb)1864 static void slic_xmit_build_request(struct adapter *adapter,
1865 			     struct slic_hostcmd *hcmd, struct sk_buff *skb)
1866 {
1867 	struct slic_host64_cmd *ihcmd;
1868 	ulong phys_addr;
1869 
1870 	ihcmd = &hcmd->cmd64;
1871 
1872 	ihcmd->flags = adapter->port << IHFLG_IFSHFT;
1873 	ihcmd->command = IHCMD_XMT_REQ;
1874 	ihcmd->u.slic_buffers.totlen = skb->len;
1875 	phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
1876 			PCI_DMA_TODEVICE);
1877 	ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
1878 	ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
1879 	ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1880 #if BITS_PER_LONG == 64
1881 	hcmd->cmdsize = (u32)((((u64)&ihcmd->u.slic_buffers.bufs[1] -
1882 				     (u64)hcmd) + 31) >> 5);
1883 #else
1884 	hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
1885 				       (u32)hcmd) + 31) >> 5;
1886 #endif
1887 }
1888 
slic_xmit_fail(struct adapter * adapter,struct sk_buff * skb,void * cmd,u32 skbtype,u32 status)1889 static void slic_xmit_fail(struct adapter *adapter,
1890 		    struct sk_buff *skb,
1891 		    void *cmd, u32 skbtype, u32 status)
1892 {
1893 	if (adapter->xmitq_full)
1894 		netif_stop_queue(adapter->netdev);
1895 	if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1896 		switch (status) {
1897 		case XMIT_FAIL_LINK_STATE:
1898 			dev_err(&adapter->netdev->dev,
1899 				"reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
1900 				skb, skb->pkt_type,
1901 				SLIC_LINKSTATE(adapter->linkstate),
1902 				SLIC_ADAPTER_STATE(adapter->state),
1903 				adapter->state,
1904 				SLIC_CARD_STATE(adapter->card->state),
1905 				adapter->card->state);
1906 			break;
1907 		case XMIT_FAIL_ZERO_LENGTH:
1908 			dev_err(&adapter->netdev->dev,
1909 				"xmit_start skb->len == 0 skb[%p] type[%x]\n",
1910 				skb, skb->pkt_type);
1911 			break;
1912 		case XMIT_FAIL_HOSTCMD_FAIL:
1913 			dev_err(&adapter->netdev->dev,
1914 				"xmit_start skb[%p] type[%x] No host commands available\n",
1915 				skb, skb->pkt_type);
1916 			break;
1917 		}
1918 	}
1919 	dev_kfree_skb(skb);
1920 	adapter->netdev->stats.tx_dropped++;
1921 }
1922 
slic_rcv_handle_error(struct adapter * adapter,struct slic_rcvbuf * rcvbuf)1923 static void slic_rcv_handle_error(struct adapter *adapter,
1924 					struct slic_rcvbuf *rcvbuf)
1925 {
1926 	struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1927 	struct net_device *netdev = adapter->netdev;
1928 
1929 	if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1930 		if (hdr->frame_status14 & VRHSTAT_802OE)
1931 			adapter->if_events.oflow802++;
1932 		if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1933 			adapter->if_events.Tprtoflow++;
1934 		if (hdr->frame_status_b14 & VRHSTATB_802UE)
1935 			adapter->if_events.uflow802++;
1936 		if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1937 			adapter->if_events.rcvearly++;
1938 			netdev->stats.rx_fifo_errors++;
1939 		}
1940 		if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1941 			adapter->if_events.Bufov++;
1942 			netdev->stats.rx_over_errors++;
1943 		}
1944 		if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1945 			adapter->if_events.Carre++;
1946 			netdev->stats.tx_carrier_errors++;
1947 		}
1948 		if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1949 			adapter->if_events.Longe++;
1950 		if (hdr->frame_status_b14 & VRHSTATB_PREA)
1951 			adapter->if_events.Invp++;
1952 		if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1953 			adapter->if_events.Crc++;
1954 			netdev->stats.rx_crc_errors++;
1955 		}
1956 		if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1957 			adapter->if_events.Drbl++;
1958 		if (hdr->frame_status_b14 & VRHSTATB_CODE)
1959 			adapter->if_events.Code++;
1960 		if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1961 			adapter->if_events.TpCsum++;
1962 		if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1963 			adapter->if_events.TpHlen++;
1964 		if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1965 			adapter->if_events.IpCsum++;
1966 		if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1967 			adapter->if_events.IpLen++;
1968 		if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1969 			adapter->if_events.IpHlen++;
1970 	} else {
1971 		if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1972 			u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1973 
1974 			if (xerr == VGBSTAT_XCSERR)
1975 				adapter->if_events.TpCsum++;
1976 			if (xerr == VGBSTAT_XUFLOW)
1977 				adapter->if_events.Tprtoflow++;
1978 			if (xerr == VGBSTAT_XHLEN)
1979 				adapter->if_events.TpHlen++;
1980 		}
1981 		if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1982 			u32 nerr =
1983 			    (hdr->
1984 			     frame_statusGB >> VGBSTAT_NERRSHFT) &
1985 			    VGBSTAT_NERRMSK;
1986 			if (nerr == VGBSTAT_NCSERR)
1987 				adapter->if_events.IpCsum++;
1988 			if (nerr == VGBSTAT_NUFLOW)
1989 				adapter->if_events.IpLen++;
1990 			if (nerr == VGBSTAT_NHLEN)
1991 				adapter->if_events.IpHlen++;
1992 		}
1993 		if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1994 			u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1995 
1996 			if (lerr == VGBSTAT_LDEARLY)
1997 				adapter->if_events.rcvearly++;
1998 			if (lerr == VGBSTAT_LBOFLO)
1999 				adapter->if_events.Bufov++;
2000 			if (lerr == VGBSTAT_LCODERR)
2001 				adapter->if_events.Code++;
2002 			if (lerr == VGBSTAT_LDBLNBL)
2003 				adapter->if_events.Drbl++;
2004 			if (lerr == VGBSTAT_LCRCERR)
2005 				adapter->if_events.Crc++;
2006 			if (lerr == VGBSTAT_LOFLO)
2007 				adapter->if_events.oflow802++;
2008 			if (lerr == VGBSTAT_LUFLO)
2009 				adapter->if_events.uflow802++;
2010 		}
2011 	}
2012 }
2013 
2014 #define TCP_OFFLOAD_FRAME_PUSHFLAG  0x10000000
2015 #define M_FAST_PATH                 0x0040
2016 
slic_rcv_handler(struct adapter * adapter)2017 static void slic_rcv_handler(struct adapter *adapter)
2018 {
2019 	struct net_device *netdev = adapter->netdev;
2020 	struct sk_buff *skb;
2021 	struct slic_rcvbuf *rcvbuf;
2022 	u32 frames = 0;
2023 
2024 	while ((skb = slic_rcvqueue_getnext(adapter))) {
2025 		u32 rx_bytes;
2026 
2027 		rcvbuf = (struct slic_rcvbuf *)skb->head;
2028 		adapter->card->events++;
2029 		if (rcvbuf->status & IRHDDR_ERR) {
2030 			adapter->rx_errors++;
2031 			slic_rcv_handle_error(adapter, rcvbuf);
2032 			slic_rcvqueue_reinsert(adapter, skb);
2033 			continue;
2034 		}
2035 
2036 		if (!slic_mac_filter(adapter, (struct ether_header *)
2037 					rcvbuf->data)) {
2038 			slic_rcvqueue_reinsert(adapter, skb);
2039 			continue;
2040 		}
2041 		skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2042 		rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2043 		skb_put(skb, rx_bytes);
2044 		netdev->stats.rx_packets++;
2045 		netdev->stats.rx_bytes += rx_bytes;
2046 #if SLIC_OFFLOAD_IP_CHECKSUM
2047 		skb->ip_summed = CHECKSUM_UNNECESSARY;
2048 #endif
2049 
2050 		skb->dev = adapter->netdev;
2051 		skb->protocol = eth_type_trans(skb, skb->dev);
2052 		netif_rx(skb);
2053 
2054 		++frames;
2055 #if SLIC_INTERRUPT_PROCESS_LIMIT
2056 		if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2057 			adapter->rcv_interrupt_yields++;
2058 			break;
2059 		}
2060 #endif
2061 	}
2062 	adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
2063 }
2064 
slic_xmit_complete(struct adapter * adapter)2065 static void slic_xmit_complete(struct adapter *adapter)
2066 {
2067 	struct slic_hostcmd *hcmd;
2068 	struct slic_rspbuf *rspbuf;
2069 	u32 frames = 0;
2070 	struct slic_handle_word slic_handle_word;
2071 
2072 	do {
2073 		rspbuf = slic_rspqueue_getnext(adapter);
2074 		if (!rspbuf)
2075 			break;
2076 		adapter->xmit_completes++;
2077 		adapter->card->events++;
2078 		/*
2079 		 * Get the complete host command buffer
2080 		 */
2081 		slic_handle_word.handle_token = rspbuf->hosthandle;
2082 		hcmd =
2083 			adapter->slic_handles[slic_handle_word.handle_index].
2084 									address;
2085 /*      hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
2086 		if (hcmd->type == SLIC_CMD_DUMB) {
2087 			if (hcmd->skb)
2088 				dev_kfree_skb_irq(hcmd->skb);
2089 			slic_cmdq_putdone_irq(adapter, hcmd);
2090 		}
2091 		rspbuf->status = 0;
2092 		rspbuf->hosthandle = 0;
2093 		frames++;
2094 	} while (1);
2095 	adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2096 }
2097 
slic_interrupt_card_up(u32 isr,struct adapter * adapter,struct net_device * dev)2098 static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2099 			struct net_device *dev)
2100 {
2101 	if (isr & ~ISR_IO) {
2102 		if (isr & ISR_ERR) {
2103 			adapter->error_interrupts++;
2104 			if (isr & ISR_RMISS) {
2105 				int count;
2106 				int pre_count;
2107 				int errors;
2108 
2109 				struct slic_rcvqueue *rcvq =
2110 					&adapter->rcvqueue;
2111 
2112 				adapter->error_rmiss_interrupts++;
2113 
2114 				if (!rcvq->errors)
2115 					rcv_count = rcvq->count;
2116 				pre_count = rcvq->count;
2117 				errors = rcvq->errors;
2118 
2119 				while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2120 					count = slic_rcvqueue_fill(adapter);
2121 					if (!count)
2122 						break;
2123 				}
2124 			} else if (isr & ISR_XDROP) {
2125 				dev_err(&dev->dev,
2126 						"isr & ISR_ERR [%x] ISR_XDROP\n",
2127 						isr);
2128 			} else {
2129 				dev_err(&dev->dev,
2130 						"isr & ISR_ERR [%x]\n",
2131 						isr);
2132 			}
2133 		}
2134 
2135 		if (isr & ISR_LEVENT) {
2136 			adapter->linkevent_interrupts++;
2137 			if (slic_link_event_handler(adapter))
2138 				adapter->linkevent_interrupts--;
2139 		}
2140 
2141 		if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2142 		    (isr & ISR_UPCBSY)) {
2143 			adapter->upr_interrupts++;
2144 			slic_upr_request_complete(adapter, isr);
2145 		}
2146 	}
2147 
2148 	if (isr & ISR_RCV) {
2149 		adapter->rcv_interrupts++;
2150 		slic_rcv_handler(adapter);
2151 	}
2152 
2153 	if (isr & ISR_CMD) {
2154 		adapter->xmit_interrupts++;
2155 		slic_xmit_complete(adapter);
2156 	}
2157 }
2158 
slic_interrupt(int irq,void * dev_id)2159 static irqreturn_t slic_interrupt(int irq, void *dev_id)
2160 {
2161 	struct net_device *dev = dev_id;
2162 	struct adapter *adapter = netdev_priv(dev);
2163 	u32 isr;
2164 
2165 	if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2166 		slic_reg32_write(&adapter->slic_regs->slic_icr,
2167 				 ICR_INT_MASK, FLUSH);
2168 		isr = adapter->isrcopy = adapter->pshmem->isr;
2169 		adapter->pshmem->isr = 0;
2170 		adapter->num_isrs++;
2171 		switch (adapter->card->state) {
2172 		case CARD_UP:
2173 			slic_interrupt_card_up(isr, adapter, dev);
2174 			break;
2175 
2176 		case CARD_DOWN:
2177 			if ((isr & ISR_UPC) ||
2178 			    (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2179 				adapter->upr_interrupts++;
2180 				slic_upr_request_complete(adapter, isr);
2181 			}
2182 			break;
2183 		}
2184 
2185 		adapter->isrcopy = 0;
2186 		adapter->all_reg_writes += 2;
2187 		adapter->isr_reg_writes++;
2188 		slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2189 	} else {
2190 		adapter->false_interrupts++;
2191 	}
2192 	return IRQ_HANDLED;
2193 }
2194 
2195 #define NORMAL_ETHFRAME     0
2196 
slic_xmit_start(struct sk_buff * skb,struct net_device * dev)2197 static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2198 {
2199 	struct sliccard *card;
2200 	struct adapter *adapter = netdev_priv(dev);
2201 	struct slic_hostcmd *hcmd = NULL;
2202 	u32 status = 0;
2203 	void *offloadcmd = NULL;
2204 
2205 	card = adapter->card;
2206 	if ((adapter->linkstate != LINK_UP) ||
2207 	    (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2208 		status = XMIT_FAIL_LINK_STATE;
2209 		goto xmit_fail;
2210 
2211 	} else if (skb->len == 0) {
2212 		status = XMIT_FAIL_ZERO_LENGTH;
2213 		goto xmit_fail;
2214 	}
2215 
2216 	hcmd = slic_cmdq_getfree(adapter);
2217 	if (!hcmd) {
2218 		adapter->xmitq_full = 1;
2219 		status = XMIT_FAIL_HOSTCMD_FAIL;
2220 		goto xmit_fail;
2221 	}
2222 	hcmd->skb = skb;
2223 	hcmd->busy = 1;
2224 	hcmd->type = SLIC_CMD_DUMB;
2225 	slic_xmit_build_request(adapter, hcmd, skb);
2226 	dev->stats.tx_packets++;
2227 	dev->stats.tx_bytes += skb->len;
2228 
2229 #ifdef DEBUG_DUMP
2230 	if (adapter->kill_card) {
2231 		struct slic_host64_cmd ihcmd;
2232 
2233 		ihcmd = &hcmd->cmd64;
2234 
2235 		ihcmd->flags |= 0x40;
2236 		adapter->kill_card = 0;	/* only do this once */
2237 	}
2238 #endif
2239 	if (hcmd->paddrh == 0) {
2240 		slic_reg32_write(&adapter->slic_regs->slic_cbar,
2241 				 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2242 	} else {
2243 		slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2244 				 (hcmd->paddrl | hcmd->cmdsize),
2245 				 &adapter->slic_regs->slic_addr_upper,
2246 				 hcmd->paddrh, DONT_FLUSH);
2247 	}
2248 xmit_done:
2249 	return NETDEV_TX_OK;
2250 xmit_fail:
2251 	slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
2252 	goto xmit_done;
2253 }
2254 
slic_adapter_freeresources(struct adapter * adapter)2255 static void slic_adapter_freeresources(struct adapter *adapter)
2256 {
2257 	slic_init_cleanup(adapter);
2258 	adapter->error_interrupts = 0;
2259 	adapter->rcv_interrupts = 0;
2260 	adapter->xmit_interrupts = 0;
2261 	adapter->linkevent_interrupts = 0;
2262 	adapter->upr_interrupts = 0;
2263 	adapter->num_isrs = 0;
2264 	adapter->xmit_completes = 0;
2265 	adapter->rcv_broadcasts = 0;
2266 	adapter->rcv_multicasts = 0;
2267 	adapter->rcv_unicasts = 0;
2268 }
2269 
slic_adapter_allocresources(struct adapter * adapter,unsigned long * flags)2270 static int slic_adapter_allocresources(struct adapter *adapter,
2271 				       unsigned long *flags)
2272 {
2273 	if (!adapter->intrregistered) {
2274 		int retval;
2275 
2276 		spin_unlock_irqrestore(&slic_global.driver_lock, *flags);
2277 
2278 		retval = request_irq(adapter->netdev->irq,
2279 				     &slic_interrupt,
2280 				     IRQF_SHARED,
2281 				     adapter->netdev->name, adapter->netdev);
2282 
2283 		spin_lock_irqsave(&slic_global.driver_lock, *flags);
2284 
2285 		if (retval) {
2286 			dev_err(&adapter->netdev->dev,
2287 				"request_irq (%s) FAILED [%x]\n",
2288 				adapter->netdev->name, retval);
2289 			return retval;
2290 		}
2291 		adapter->intrregistered = 1;
2292 	}
2293 	return 0;
2294 }
2295 
2296 /*
2297  *  slic_if_init
2298  *
2299  *  Perform initialization of our slic interface.
2300  *
2301  */
slic_if_init(struct adapter * adapter,unsigned long * flags)2302 static int slic_if_init(struct adapter *adapter, unsigned long *flags)
2303 {
2304 	struct sliccard *card = adapter->card;
2305 	struct net_device *dev = adapter->netdev;
2306 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
2307 	struct slic_shmem *pshmem;
2308 	int rc;
2309 
2310 	/* adapter should be down at this point */
2311 	if (adapter->state != ADAPT_DOWN) {
2312 		dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2313 			__func__);
2314 		rc = -EIO;
2315 		goto err;
2316 	}
2317 
2318 	adapter->devflags_prev = dev->flags;
2319 	adapter->macopts = MAC_DIRECTED;
2320 	if (dev->flags) {
2321 		if (dev->flags & IFF_BROADCAST)
2322 			adapter->macopts |= MAC_BCAST;
2323 		if (dev->flags & IFF_PROMISC)
2324 			adapter->macopts |= MAC_PROMISC;
2325 		if (dev->flags & IFF_ALLMULTI)
2326 			adapter->macopts |= MAC_ALLMCAST;
2327 		if (dev->flags & IFF_MULTICAST)
2328 			adapter->macopts |= MAC_MCAST;
2329 	}
2330 	rc = slic_adapter_allocresources(adapter, flags);
2331 	if (rc) {
2332 		dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n",
2333 			rc);
2334 		slic_adapter_freeresources(adapter);
2335 		goto err;
2336 	}
2337 
2338 	if (!adapter->queues_initialized) {
2339 		rc = slic_rspqueue_init(adapter);
2340 		if (rc)
2341 			goto err;
2342 		rc = slic_cmdq_init(adapter);
2343 		if (rc)
2344 			goto err;
2345 		rc = slic_rcvqueue_init(adapter);
2346 		if (rc)
2347 			goto err;
2348 		adapter->queues_initialized = 1;
2349 	}
2350 
2351 	slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2352 	mdelay(1);
2353 
2354 	if (!adapter->isp_initialized) {
2355 		unsigned long flags;
2356 
2357 		pshmem = (struct slic_shmem *)(unsigned long)
2358 			 adapter->phys_shmem;
2359 
2360 		spin_lock_irqsave(&adapter->bit64reglock, flags);
2361 
2362 #if BITS_PER_LONG == 64
2363 		slic_reg32_write(&slic_regs->slic_addr_upper,
2364 				 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2365 		slic_reg32_write(&slic_regs->slic_isp,
2366 				 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2367 #else
2368 		slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2369 		slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr,
2370 				FLUSH);
2371 #endif
2372 		spin_unlock_irqrestore(&adapter->bit64reglock, flags);
2373 		adapter->isp_initialized = 1;
2374 	}
2375 
2376 	adapter->state = ADAPT_UP;
2377 	if (!card->loadtimerset) {
2378 		setup_timer(&card->loadtimer, &slic_timer_load_check,
2379 			    (ulong)card);
2380 		card->loadtimer.expires =
2381 		    jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2382 		add_timer(&card->loadtimer);
2383 
2384 		card->loadtimerset = 1;
2385 	}
2386 
2387 	if (!adapter->pingtimerset) {
2388 		setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
2389 		adapter->pingtimer.expires =
2390 		    jiffies + (PING_TIMER_INTERVAL * HZ);
2391 		add_timer(&adapter->pingtimer);
2392 		adapter->pingtimerset = 1;
2393 		adapter->card->pingstatus = ISR_PINGMASK;
2394 	}
2395 
2396 	/*
2397 	 *    clear any pending events, then enable interrupts
2398 	 */
2399 	adapter->isrcopy = 0;
2400 	adapter->pshmem->isr = 0;
2401 	slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2402 	slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2403 
2404 	slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2405 	rc = slic_link_event_handler(adapter);
2406 	if (rc) {
2407 		/* disable interrupts then clear pending events */
2408 		slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2409 		slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2410 		if (adapter->pingtimerset) {
2411 			del_timer(&adapter->pingtimer);
2412 			adapter->pingtimerset = 0;
2413 		}
2414 		if (card->loadtimerset) {
2415 			del_timer(&card->loadtimer);
2416 			card->loadtimerset = 0;
2417 		}
2418 		adapter->state = ADAPT_DOWN;
2419 		slic_adapter_freeresources(adapter);
2420 	}
2421 
2422 err:
2423 	return rc;
2424 }
2425 
slic_entry_open(struct net_device * dev)2426 static int slic_entry_open(struct net_device *dev)
2427 {
2428 	struct adapter *adapter = netdev_priv(dev);
2429 	struct sliccard *card = adapter->card;
2430 	unsigned long flags;
2431 	int status;
2432 
2433 	netif_stop_queue(adapter->netdev);
2434 
2435 	spin_lock_irqsave(&slic_global.driver_lock, flags);
2436 	if (!adapter->activated) {
2437 		card->adapters_activated++;
2438 		slic_global.num_slic_ports_active++;
2439 		adapter->activated = 1;
2440 	}
2441 	status = slic_if_init(adapter, &flags);
2442 
2443 	if (status != 0) {
2444 		if (adapter->activated) {
2445 			card->adapters_activated--;
2446 			slic_global.num_slic_ports_active--;
2447 			adapter->activated = 0;
2448 		}
2449 		goto spin_unlock;
2450 	}
2451 	if (!card->master)
2452 		card->master = adapter;
2453 
2454 spin_unlock:
2455 	spin_unlock_irqrestore(&slic_global.driver_lock, flags);
2456 	return status;
2457 }
2458 
slic_card_cleanup(struct sliccard * card)2459 static void slic_card_cleanup(struct sliccard *card)
2460 {
2461 	if (card->loadtimerset) {
2462 		card->loadtimerset = 0;
2463 		del_timer_sync(&card->loadtimer);
2464 	}
2465 
2466 	kfree(card);
2467 }
2468 
slic_entry_remove(struct pci_dev * pcidev)2469 static void slic_entry_remove(struct pci_dev *pcidev)
2470 {
2471 	struct net_device *dev = pci_get_drvdata(pcidev);
2472 	struct adapter *adapter = netdev_priv(dev);
2473 	struct sliccard *card;
2474 	struct mcast_address *mcaddr, *mlist;
2475 
2476 	unregister_netdev(dev);
2477 
2478 	slic_adapter_freeresources(adapter);
2479 	slic_unmap_mmio_space(adapter);
2480 
2481 	/* free multicast addresses */
2482 	mlist = adapter->mcastaddrs;
2483 	while (mlist) {
2484 		mcaddr = mlist;
2485 		mlist = mlist->next;
2486 		kfree(mcaddr);
2487 	}
2488 	card = adapter->card;
2489 	card->adapters_allocated--;
2490 	adapter->allocated = 0;
2491 	if (!card->adapters_allocated) {
2492 		struct sliccard *curr_card = slic_global.slic_card;
2493 
2494 		if (curr_card == card) {
2495 			slic_global.slic_card = card->next;
2496 		} else {
2497 			while (curr_card->next != card)
2498 				curr_card = curr_card->next;
2499 			curr_card->next = card->next;
2500 		}
2501 		slic_global.num_slic_cards--;
2502 		slic_card_cleanup(card);
2503 	}
2504 	free_netdev(dev);
2505 	pci_release_regions(pcidev);
2506 	pci_disable_device(pcidev);
2507 }
2508 
slic_entry_halt(struct net_device * dev)2509 static int slic_entry_halt(struct net_device *dev)
2510 {
2511 	struct adapter *adapter = netdev_priv(dev);
2512 	struct sliccard *card = adapter->card;
2513 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
2514 	unsigned long flags;
2515 
2516 	spin_lock_irqsave(&slic_global.driver_lock, flags);
2517 	netif_stop_queue(adapter->netdev);
2518 	adapter->state = ADAPT_DOWN;
2519 	adapter->linkstate = LINK_DOWN;
2520 	adapter->upr_list = NULL;
2521 	adapter->upr_busy = 0;
2522 	adapter->devflags_prev = 0;
2523 	slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2524 	adapter->all_reg_writes++;
2525 	adapter->icr_reg_writes++;
2526 	slic_config_clear(adapter);
2527 	if (adapter->activated) {
2528 		card->adapters_activated--;
2529 		slic_global.num_slic_ports_active--;
2530 		adapter->activated = 0;
2531 	}
2532 #ifdef AUTOMATIC_RESET
2533 	slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
2534 #endif
2535 	/*
2536 	 *  Reset the adapter's cmd queues
2537 	 */
2538 	slic_cmdq_reset(adapter);
2539 
2540 #ifdef AUTOMATIC_RESET
2541 	if (!card->adapters_activated)
2542 		slic_card_init(card, adapter);
2543 #endif
2544 
2545 	spin_unlock_irqrestore(&slic_global.driver_lock, flags);
2546 	return 0;
2547 }
2548 
slic_get_stats(struct net_device * dev)2549 static struct net_device_stats *slic_get_stats(struct net_device *dev)
2550 {
2551 	struct adapter *adapter = netdev_priv(dev);
2552 
2553 	dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
2554 	dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
2555 	dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
2556 	dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
2557 	dev->stats.tx_heartbeat_errors = 0;
2558 	dev->stats.tx_aborted_errors = 0;
2559 	dev->stats.tx_window_errors = 0;
2560 	dev->stats.tx_fifo_errors = 0;
2561 	dev->stats.rx_frame_errors = 0;
2562 	dev->stats.rx_length_errors = 0;
2563 
2564 	return &dev->stats;
2565 }
2566 
slic_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)2567 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2568 {
2569 	struct adapter *adapter = netdev_priv(dev);
2570 	struct ethtool_cmd edata;
2571 	struct ethtool_cmd ecmd;
2572 	u32 data[7];
2573 	u32 intagg;
2574 
2575 	switch (cmd) {
2576 	case SIOCSLICSETINTAGG:
2577 		if (copy_from_user(data, rq->ifr_data, 28))
2578 			return -EFAULT;
2579 		intagg = data[0];
2580 		dev_err(&dev->dev, "set interrupt aggregation to %d\n",
2581 			intagg);
2582 		slic_intagg_set(adapter, intagg);
2583 		return 0;
2584 
2585 	case SIOCETHTOOL:
2586 		if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
2587 			return -EFAULT;
2588 
2589 		if (ecmd.cmd == ETHTOOL_GSET) {
2590 			memset(&edata, 0, sizeof(edata));
2591 			edata.supported = (SUPPORTED_10baseT_Half |
2592 					   SUPPORTED_10baseT_Full |
2593 					   SUPPORTED_100baseT_Half |
2594 					   SUPPORTED_100baseT_Full |
2595 					   SUPPORTED_Autoneg | SUPPORTED_MII);
2596 			edata.port = PORT_MII;
2597 			edata.transceiver = XCVR_INTERNAL;
2598 			edata.phy_address = 0;
2599 			if (adapter->linkspeed == LINK_100MB)
2600 				edata.speed = SPEED_100;
2601 			else if (adapter->linkspeed == LINK_10MB)
2602 				edata.speed = SPEED_10;
2603 			else
2604 				edata.speed = 0;
2605 
2606 			if (adapter->linkduplex == LINK_FULLD)
2607 				edata.duplex = DUPLEX_FULL;
2608 			else
2609 				edata.duplex = DUPLEX_HALF;
2610 
2611 			edata.autoneg = AUTONEG_ENABLE;
2612 			edata.maxtxpkt = 1;
2613 			edata.maxrxpkt = 1;
2614 			if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
2615 				return -EFAULT;
2616 
2617 		} else if (ecmd.cmd == ETHTOOL_SSET) {
2618 			if (!capable(CAP_NET_ADMIN))
2619 				return -EPERM;
2620 
2621 			if (adapter->linkspeed == LINK_100MB)
2622 				edata.speed = SPEED_100;
2623 			else if (adapter->linkspeed == LINK_10MB)
2624 				edata.speed = SPEED_10;
2625 			else
2626 				edata.speed = 0;
2627 
2628 			if (adapter->linkduplex == LINK_FULLD)
2629 				edata.duplex = DUPLEX_FULL;
2630 			else
2631 				edata.duplex = DUPLEX_HALF;
2632 
2633 			edata.autoneg = AUTONEG_ENABLE;
2634 			edata.maxtxpkt = 1;
2635 			edata.maxrxpkt = 1;
2636 			if ((ecmd.speed != edata.speed) ||
2637 			    (ecmd.duplex != edata.duplex)) {
2638 				u32 speed;
2639 				u32 duplex;
2640 
2641 				if (ecmd.speed == SPEED_10)
2642 					speed = 0;
2643 				else
2644 					speed = PCR_SPEED_100;
2645 				if (ecmd.duplex == DUPLEX_FULL)
2646 					duplex = PCR_DUPLEX_FULL;
2647 				else
2648 					duplex = 0;
2649 				slic_link_config(adapter, speed, duplex);
2650 				if (slic_link_event_handler(adapter))
2651 					return -EFAULT;
2652 			}
2653 		}
2654 		return 0;
2655 	default:
2656 		return -EOPNOTSUPP;
2657 	}
2658 }
2659 
slic_config_pci(struct pci_dev * pcidev)2660 static void slic_config_pci(struct pci_dev *pcidev)
2661 {
2662 	u16 pci_command;
2663 	u16 new_command;
2664 
2665 	pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
2666 
2667 	new_command = pci_command | PCI_COMMAND_MASTER
2668 	    | PCI_COMMAND_MEMORY
2669 	    | PCI_COMMAND_INVALIDATE
2670 	    | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
2671 	if (pci_command != new_command)
2672 		pci_write_config_word(pcidev, PCI_COMMAND, new_command);
2673 }
2674 
slic_card_init(struct sliccard * card,struct adapter * adapter)2675 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2676 {
2677 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
2678 	struct slic_eeprom *peeprom;
2679 	struct oslic_eeprom *pOeeprom;
2680 	dma_addr_t phys_config;
2681 	u32 phys_configh;
2682 	u32 phys_configl;
2683 	u32 i = 0;
2684 	struct slic_shmem *pshmem;
2685 	int status;
2686 	uint macaddrs = card->card_size;
2687 	ushort eecodesize;
2688 	ushort dramsize;
2689 	ushort ee_chksum;
2690 	ushort calc_chksum;
2691 	struct slic_config_mac *pmac;
2692 	unsigned char fruformat;
2693 	unsigned char oemfruformat;
2694 	struct atk_fru *patkfru;
2695 	union oemfru *poemfru;
2696 	unsigned long flags;
2697 
2698 	/* Reset everything except PCI configuration space */
2699 	slic_soft_reset(adapter);
2700 
2701 	/* Download the microcode */
2702 	status = slic_card_download(adapter);
2703 	if (status)
2704 		return status;
2705 
2706 	if (!card->config_set) {
2707 		peeprom = pci_alloc_consistent(adapter->pcidev,
2708 					       sizeof(struct slic_eeprom),
2709 					       &phys_config);
2710 
2711 		phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2712 		phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2713 
2714 		if (!peeprom) {
2715 			dev_err(&adapter->pcidev->dev,
2716 				"Failed to allocate DMA memory for EEPROM.\n");
2717 			return -ENOMEM;
2718 		}
2719 
2720 		memset(peeprom, 0, sizeof(struct slic_eeprom));
2721 
2722 		slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2723 		mdelay(1);
2724 		pshmem = (struct slic_shmem *)(unsigned long)
2725 			 adapter->phys_shmem;
2726 
2727 		spin_lock_irqsave(&adapter->bit64reglock, flags);
2728 		slic_reg32_write(&slic_regs->slic_addr_upper,
2729 				 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2730 		slic_reg32_write(&slic_regs->slic_isp,
2731 				 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2732 		spin_unlock_irqrestore(&adapter->bit64reglock, flags);
2733 
2734 		status = slic_config_get(adapter, phys_configl, phys_configh);
2735 		if (status) {
2736 			dev_err(&adapter->pcidev->dev,
2737 				"Failed to fetch config data from device.\n");
2738 			goto card_init_err;
2739 		}
2740 
2741 		for (;;) {
2742 			if (adapter->pshmem->isr) {
2743 				if (adapter->pshmem->isr & ISR_UPC) {
2744 					adapter->pshmem->isr = 0;
2745 					slic_reg64_write(adapter,
2746 						&slic_regs->slic_isp, 0,
2747 						&slic_regs->slic_addr_upper,
2748 						0, FLUSH);
2749 					slic_reg32_write(&slic_regs->slic_isr,
2750 							 0, FLUSH);
2751 
2752 					slic_upr_request_complete(adapter, 0);
2753 					break;
2754 				}
2755 
2756 				adapter->pshmem->isr = 0;
2757 				slic_reg32_write(&slic_regs->slic_isr,
2758 						 0, FLUSH);
2759 			} else {
2760 				mdelay(1);
2761 				i++;
2762 				if (i > 5000) {
2763 					dev_err(&adapter->pcidev->dev,
2764 						"Fetch of config data timed out.\n");
2765 					slic_reg64_write(adapter,
2766 						&slic_regs->slic_isp, 0,
2767 						&slic_regs->slic_addr_upper,
2768 						0, FLUSH);
2769 					status = -EINVAL;
2770 					goto card_init_err;
2771 				}
2772 			}
2773 		}
2774 
2775 		switch (adapter->devid) {
2776 		/* Oasis card */
2777 		case SLIC_2GB_DEVICE_ID:
2778 			/* extract EEPROM data and pointers to EEPROM data */
2779 			pOeeprom = (struct oslic_eeprom *)peeprom;
2780 			eecodesize = pOeeprom->EecodeSize;
2781 			dramsize = pOeeprom->DramSize;
2782 			pmac = pOeeprom->MacInfo;
2783 			fruformat = pOeeprom->FruFormat;
2784 			patkfru = &pOeeprom->AtkFru;
2785 			oemfruformat = pOeeprom->OemFruFormat;
2786 			poemfru = &pOeeprom->OemFru;
2787 			macaddrs = 2;
2788 			/*
2789 			 * Minor kludge for Oasis card
2790 			 * get 2 MAC addresses from the
2791 			 * EEPROM to ensure that function 1
2792 			 * gets the Port 1 MAC address
2793 			 */
2794 			break;
2795 		default:
2796 			/* extract EEPROM data and pointers to EEPROM data */
2797 			eecodesize = peeprom->EecodeSize;
2798 			dramsize = peeprom->DramSize;
2799 			pmac = peeprom->u2.mac.MacInfo;
2800 			fruformat = peeprom->FruFormat;
2801 			patkfru = &peeprom->AtkFru;
2802 			oemfruformat = peeprom->OemFruFormat;
2803 			poemfru = &peeprom->OemFru;
2804 			break;
2805 		}
2806 
2807 		card->config.EepromValid = false;
2808 
2809 		/*  see if the EEPROM is valid by checking it's checksum */
2810 		if ((eecodesize <= MAX_EECODE_SIZE) &&
2811 		    (eecodesize >= MIN_EECODE_SIZE)) {
2812 
2813 			ee_chksum =
2814 			    *(u16 *)((char *)peeprom + (eecodesize - 2));
2815 			/*
2816 			 *  calculate the EEPROM checksum
2817 			 */
2818 			calc_chksum = slic_eeprom_cksum(peeprom,
2819 							eecodesize - 2);
2820 			/*
2821 			 *  if the ucdoe chksum flag bit worked,
2822 			 *  we wouldn't need this
2823 			 */
2824 			if (ee_chksum == calc_chksum)
2825 				card->config.EepromValid = true;
2826 		}
2827 		/*  copy in the DRAM size */
2828 		card->config.DramSize = dramsize;
2829 
2830 		/*  copy in the MAC address(es) */
2831 		for (i = 0; i < macaddrs; i++) {
2832 			memcpy(&card->config.MacInfo[i],
2833 			       &pmac[i], sizeof(struct slic_config_mac));
2834 		}
2835 
2836 		/*  copy the Alacritech FRU information */
2837 		card->config.FruFormat = fruformat;
2838 		memcpy(&card->config.AtkFru, patkfru,
2839 						sizeof(struct atk_fru));
2840 
2841 		pci_free_consistent(adapter->pcidev,
2842 				    sizeof(struct slic_eeprom),
2843 				    peeprom, phys_config);
2844 
2845 		if (!card->config.EepromValid) {
2846 			slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2847 					 &slic_regs->slic_addr_upper,
2848 					 0, FLUSH);
2849 			dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
2850 			return -EINVAL;
2851 		}
2852 
2853 		card->config_set = 1;
2854 	}
2855 
2856 	status = slic_card_download_gbrcv(adapter);
2857 	if (status)
2858 		return status;
2859 
2860 	if (slic_global.dynamic_intagg)
2861 		slic_intagg_set(adapter, 0);
2862 	else
2863 		slic_intagg_set(adapter, intagg_delay);
2864 
2865 	/*
2866 	 *  Initialize ping status to "ok"
2867 	 */
2868 	card->pingstatus = ISR_PINGMASK;
2869 
2870 	/*
2871 	 * Lastly, mark our card state as up and return success
2872 	 */
2873 	card->state = CARD_UP;
2874 	card->reset_in_progress = 0;
2875 
2876 	return 0;
2877 
2878 card_init_err:
2879 	pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom),
2880 			    peeprom, phys_config);
2881 	return status;
2882 }
2883 
slic_init_driver(void)2884 static void slic_init_driver(void)
2885 {
2886 	if (slic_first_init) {
2887 		slic_first_init = 0;
2888 		spin_lock_init(&slic_global.driver_lock);
2889 	}
2890 }
2891 
slic_init_adapter(struct net_device * netdev,struct pci_dev * pcidev,const struct pci_device_id * pci_tbl_entry,void __iomem * memaddr,int chip_idx)2892 static void slic_init_adapter(struct net_device *netdev,
2893 			      struct pci_dev *pcidev,
2894 			      const struct pci_device_id *pci_tbl_entry,
2895 			      void __iomem *memaddr, int chip_idx)
2896 {
2897 	ushort index;
2898 	struct slic_handle *pslic_handle;
2899 	struct adapter *adapter = netdev_priv(netdev);
2900 
2901 /*	adapter->pcidev = pcidev;*/
2902 	adapter->vendid = pci_tbl_entry->vendor;
2903 	adapter->devid = pci_tbl_entry->device;
2904 	adapter->subsysid = pci_tbl_entry->subdevice;
2905 	adapter->busnumber = pcidev->bus->number;
2906 	adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
2907 	adapter->functionnumber = (pcidev->devfn & 0x7);
2908 	adapter->slic_regs = memaddr;
2909 	adapter->irq = pcidev->irq;
2910 /*	adapter->netdev = netdev;*/
2911 	adapter->chipid = chip_idx;
2912 	adapter->port = 0;	/*adapter->functionnumber;*/
2913 	adapter->cardindex = adapter->port;
2914 	spin_lock_init(&adapter->upr_lock);
2915 	spin_lock_init(&adapter->bit64reglock);
2916 	spin_lock_init(&adapter->adapter_lock);
2917 	spin_lock_init(&adapter->reset_lock);
2918 	spin_lock_init(&adapter->handle_lock);
2919 
2920 	adapter->card_size = 1;
2921 	/*
2922 	 * Initialize slic_handle array
2923 	 */
2924 	/*
2925 	 * Start with 1.  0 is an invalid host handle.
2926 	 */
2927 	for (index = 1, pslic_handle = &adapter->slic_handles[1];
2928 	     index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
2929 
2930 		pslic_handle->token.handle_index = index;
2931 		pslic_handle->type = SLIC_HANDLE_FREE;
2932 		pslic_handle->next = adapter->pfree_slic_handles;
2933 		adapter->pfree_slic_handles = pslic_handle;
2934 	}
2935 	adapter->pshmem = (struct slic_shmem *)
2936 					pci_alloc_consistent(adapter->pcidev,
2937 					sizeof(struct slic_shmem),
2938 					&adapter->
2939 					phys_shmem);
2940 	if (adapter->pshmem)
2941 		memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
2942 }
2943 
2944 static const struct net_device_ops slic_netdev_ops = {
2945 	.ndo_open		= slic_entry_open,
2946 	.ndo_stop		= slic_entry_halt,
2947 	.ndo_start_xmit		= slic_xmit_start,
2948 	.ndo_do_ioctl		= slic_ioctl,
2949 	.ndo_set_mac_address	= slic_mac_set_address,
2950 	.ndo_get_stats		= slic_get_stats,
2951 	.ndo_set_rx_mode	= slic_mcast_set_list,
2952 	.ndo_validate_addr	= eth_validate_addr,
2953 	.ndo_change_mtu		= eth_change_mtu,
2954 };
2955 
slic_card_locate(struct adapter * adapter)2956 static u32 slic_card_locate(struct adapter *adapter)
2957 {
2958 	struct sliccard *card = slic_global.slic_card;
2959 	struct physcard *physcard = slic_global.phys_card;
2960 	ushort card_hostid;
2961 	u16 __iomem *hostid_reg;
2962 	uint i;
2963 	uint rdhostid_offset = 0;
2964 
2965 	switch (adapter->devid) {
2966 	case SLIC_2GB_DEVICE_ID:
2967 		rdhostid_offset = SLIC_RDHOSTID_2GB;
2968 		break;
2969 	case SLIC_1GB_DEVICE_ID:
2970 		rdhostid_offset = SLIC_RDHOSTID_1GB;
2971 		break;
2972 	default:
2973 		return -ENODEV;
2974 	}
2975 
2976 	hostid_reg =
2977 	    (u16 __iomem *)(((u8 __iomem *)(adapter->slic_regs)) +
2978 	    rdhostid_offset);
2979 
2980 	/* read the 16 bit hostid from SRAM */
2981 	card_hostid = (ushort)readw(hostid_reg);
2982 
2983 	/* Initialize a new card structure if need be */
2984 	if (card_hostid == SLIC_HOSTID_DEFAULT) {
2985 		card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2986 		if (card == NULL)
2987 			return -ENOMEM;
2988 
2989 		card->next = slic_global.slic_card;
2990 		slic_global.slic_card = card;
2991 		card->busnumber = adapter->busnumber;
2992 		card->slotnumber = adapter->slotnumber;
2993 
2994 		/* Find an available cardnum */
2995 		for (i = 0; i < SLIC_MAX_CARDS; i++) {
2996 			if (slic_global.cardnuminuse[i] == 0) {
2997 				slic_global.cardnuminuse[i] = 1;
2998 				card->cardnum = i;
2999 				break;
3000 			}
3001 		}
3002 		slic_global.num_slic_cards++;
3003 	} else {
3004 		/* Card exists, find the card this adapter belongs to */
3005 		while (card) {
3006 			if (card->cardnum == card_hostid)
3007 				break;
3008 			card = card->next;
3009 		}
3010 	}
3011 
3012 	if (!card)
3013 		return -ENXIO;
3014 	/* Put the adapter in the card's adapter list */
3015 	if (!card->adapter[adapter->port]) {
3016 		card->adapter[adapter->port] = adapter;
3017 		adapter->card = card;
3018 	}
3019 
3020 	card->card_size = 1;	/* one port per *logical* card */
3021 
3022 	while (physcard) {
3023 		for (i = 0; i < SLIC_MAX_PORTS; i++) {
3024 			if (physcard->adapter[i])
3025 				break;
3026 		}
3027 		if (i == SLIC_MAX_PORTS)
3028 			break;
3029 
3030 		if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3031 			break;
3032 		physcard = physcard->next;
3033 	}
3034 	if (!physcard) {
3035 		/* no structure allocated for this physical card yet */
3036 		physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
3037 		if (!physcard) {
3038 			if (card_hostid == SLIC_HOSTID_DEFAULT)
3039 				kfree(card);
3040 			return -ENOMEM;
3041 		}
3042 
3043 		physcard->next = slic_global.phys_card;
3044 		slic_global.phys_card = physcard;
3045 		physcard->adapters_allocd = 1;
3046 	} else {
3047 		physcard->adapters_allocd++;
3048 	}
3049 	/* Note - this is ZERO relative */
3050 	adapter->physport = physcard->adapters_allocd - 1;
3051 
3052 	physcard->adapter[adapter->physport] = adapter;
3053 	adapter->physcard = physcard;
3054 
3055 	return 0;
3056 }
3057 
slic_entry_probe(struct pci_dev * pcidev,const struct pci_device_id * pci_tbl_entry)3058 static int slic_entry_probe(struct pci_dev *pcidev,
3059 			       const struct pci_device_id *pci_tbl_entry)
3060 {
3061 	static int cards_found;
3062 	static int did_version;
3063 	int err = -ENODEV;
3064 	struct net_device *netdev;
3065 	struct adapter *adapter;
3066 	void __iomem *memmapped_ioaddr = NULL;
3067 	ulong mmio_start = 0;
3068 	ulong mmio_len = 0;
3069 	struct sliccard *card = NULL;
3070 	int pci_using_dac = 0;
3071 
3072 	slic_global.dynamic_intagg = dynamic_intagg;
3073 
3074 	err = pci_enable_device(pcidev);
3075 
3076 	if (err)
3077 		return err;
3078 
3079 	if (did_version++ == 0) {
3080 		dev_info(&pcidev->dev, "%s\n", slic_banner);
3081 		dev_info(&pcidev->dev, "%s\n", slic_proc_version);
3082 	}
3083 
3084 	if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3085 		pci_using_dac = 1;
3086 		err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
3087 		if (err) {
3088 			dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
3089 			goto err_out_disable_pci;
3090 		}
3091 	} else {
3092 		err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3093 		if (err) {
3094 			dev_err(&pcidev->dev, "no usable DMA configuration\n");
3095 			goto err_out_disable_pci;
3096 		}
3097 		pci_using_dac = 0;
3098 		pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3099 	}
3100 
3101 	err = pci_request_regions(pcidev, DRV_NAME);
3102 	if (err) {
3103 		dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3104 		goto err_out_disable_pci;
3105 	}
3106 
3107 	pci_set_master(pcidev);
3108 
3109 	netdev = alloc_etherdev(sizeof(struct adapter));
3110 	if (!netdev) {
3111 		err = -ENOMEM;
3112 		goto err_out_exit_slic_probe;
3113 	}
3114 
3115 	SET_NETDEV_DEV(netdev, &pcidev->dev);
3116 
3117 	pci_set_drvdata(pcidev, netdev);
3118 	adapter = netdev_priv(netdev);
3119 	adapter->netdev = netdev;
3120 	adapter->pcidev = pcidev;
3121 	if (pci_using_dac)
3122 		netdev->features |= NETIF_F_HIGHDMA;
3123 
3124 	mmio_start = pci_resource_start(pcidev, 0);
3125 	mmio_len = pci_resource_len(pcidev, 0);
3126 
3127 /*	memmapped_ioaddr =  (u32)ioremap_nocache(mmio_start, mmio_len);*/
3128 	memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3129 	if (!memmapped_ioaddr) {
3130 		dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3131 			mmio_len, mmio_start);
3132 		err = -ENOMEM;
3133 		goto err_out_free_netdev;
3134 	}
3135 
3136 	slic_config_pci(pcidev);
3137 
3138 	slic_init_driver();
3139 
3140 	slic_init_adapter(netdev,
3141 			  pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3142 
3143 	err = slic_card_locate(adapter);
3144 	if (err) {
3145 		dev_err(&pcidev->dev, "cannot locate card\n");
3146 		goto err_out_unmap;
3147 	}
3148 
3149 	card = adapter->card;
3150 
3151 	if (!adapter->allocated) {
3152 		card->adapters_allocated++;
3153 		adapter->allocated = 1;
3154 	}
3155 
3156 	err = slic_card_init(card, adapter);
3157 	if (err)
3158 		goto err_out_unmap;
3159 
3160 	slic_adapter_set_hwaddr(adapter);
3161 
3162 	netdev->base_addr = (unsigned long)memmapped_ioaddr;
3163 	netdev->irq = adapter->irq;
3164 	netdev->netdev_ops = &slic_netdev_ops;
3165 
3166 	strcpy(netdev->name, "eth%d");
3167 	err = register_netdev(netdev);
3168 	if (err) {
3169 		dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3170 		goto err_out_unmap;
3171 	}
3172 
3173 	cards_found++;
3174 
3175 	return 0;
3176 
3177 err_out_unmap:
3178 	iounmap(memmapped_ioaddr);
3179 err_out_free_netdev:
3180 	free_netdev(netdev);
3181 err_out_exit_slic_probe:
3182 	pci_release_regions(pcidev);
3183 err_out_disable_pci:
3184 	pci_disable_device(pcidev);
3185 	return err;
3186 }
3187 
3188 static struct pci_driver slic_driver = {
3189 	.name = DRV_NAME,
3190 	.id_table = slic_pci_tbl,
3191 	.probe = slic_entry_probe,
3192 	.remove = slic_entry_remove,
3193 };
3194 
slic_module_init(void)3195 static int __init slic_module_init(void)
3196 {
3197 	slic_init_driver();
3198 
3199 	return pci_register_driver(&slic_driver);
3200 }
3201 
slic_module_cleanup(void)3202 static void __exit slic_module_cleanup(void)
3203 {
3204 	pci_unregister_driver(&slic_driver);
3205 }
3206 
3207 module_init(slic_module_init);
3208 module_exit(slic_module_cleanup);
3209