1 /*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20 #define pr_fmt(fmt) "software IO TLB: " fmt
21
22 #include <linux/cache.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/mm.h>
25 #include <linux/export.h>
26 #include <linux/spinlock.h>
27 #include <linux/string.h>
28 #include <linux/swiotlb.h>
29 #include <linux/pfn.h>
30 #include <linux/types.h>
31 #include <linux/ctype.h>
32 #include <linux/highmem.h>
33 #include <linux/gfp.h>
34 #include <linux/scatterlist.h>
35
36 #include <asm/io.h>
37 #include <asm/dma.h>
38
39 #include <linux/init.h>
40 #include <linux/bootmem.h>
41 #include <linux/iommu-helper.h>
42
43 #define CREATE_TRACE_POINTS
44 #include <trace/events/swiotlb.h>
45
46 #define OFFSET(val,align) ((unsigned long) \
47 ( (val) & ( (align) - 1)))
48
49 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
50
51 /*
52 * Minimum IO TLB size to bother booting with. Systems with mainly
53 * 64bit capable cards will only lightly use the swiotlb. If we can't
54 * allocate a contiguous 1MB, we're probably in trouble anyway.
55 */
56 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
57
58 int swiotlb_force;
59
60 /*
61 * Used to do a quick range check in swiotlb_tbl_unmap_single and
62 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
63 * API.
64 */
65 static phys_addr_t io_tlb_start, io_tlb_end;
66
67 /*
68 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
69 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
70 */
71 static unsigned long io_tlb_nslabs;
72
73 /*
74 * When the IOMMU overflows we return a fallback buffer. This sets the size.
75 */
76 static unsigned long io_tlb_overflow = 32*1024;
77
78 static phys_addr_t io_tlb_overflow_buffer;
79
80 /*
81 * This is a free list describing the number of free entries available from
82 * each index
83 */
84 static unsigned int *io_tlb_list;
85 static unsigned int io_tlb_index;
86
87 /*
88 * We need to save away the original address corresponding to a mapped entry
89 * for the sync operations.
90 */
91 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
92 static phys_addr_t *io_tlb_orig_addr;
93
94 /*
95 * Protect the above data structures in the map and unmap calls
96 */
97 static DEFINE_SPINLOCK(io_tlb_lock);
98
99 static int late_alloc;
100
101 static int __init
setup_io_tlb_npages(char * str)102 setup_io_tlb_npages(char *str)
103 {
104 if (isdigit(*str)) {
105 io_tlb_nslabs = simple_strtoul(str, &str, 0);
106 /* avoid tail segment of size < IO_TLB_SEGSIZE */
107 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
108 }
109 if (*str == ',')
110 ++str;
111 if (!strcmp(str, "force"))
112 swiotlb_force = 1;
113
114 return 0;
115 }
116 early_param("swiotlb", setup_io_tlb_npages);
117 /* make io_tlb_overflow tunable too? */
118
swiotlb_nr_tbl(void)119 unsigned long swiotlb_nr_tbl(void)
120 {
121 return io_tlb_nslabs;
122 }
123 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
124
125 /* default to 64MB */
126 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
swiotlb_size_or_default(void)127 unsigned long swiotlb_size_or_default(void)
128 {
129 unsigned long size;
130
131 size = io_tlb_nslabs << IO_TLB_SHIFT;
132
133 return size ? size : (IO_TLB_DEFAULT_SIZE);
134 }
135
136 /* Note that this doesn't work with highmem page */
swiotlb_virt_to_bus(struct device * hwdev,volatile void * address)137 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
138 volatile void *address)
139 {
140 return phys_to_dma(hwdev, virt_to_phys(address));
141 }
142
143 static bool no_iotlb_memory;
144
swiotlb_print_info(void)145 void swiotlb_print_info(void)
146 {
147 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
148
149 if (no_iotlb_memory) {
150 pr_warn("No low mem\n");
151 return;
152 }
153
154 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
155 (unsigned long long)io_tlb_start,
156 (unsigned long long)io_tlb_end,
157 bytes >> 20);
158 }
159
swiotlb_init_with_tbl(char * tlb,unsigned long nslabs,int verbose)160 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
161 {
162 void *v_overflow_buffer;
163 unsigned long i, bytes;
164
165 bytes = nslabs << IO_TLB_SHIFT;
166
167 io_tlb_nslabs = nslabs;
168 io_tlb_start = __pa(tlb);
169 io_tlb_end = io_tlb_start + bytes;
170
171 /*
172 * Get the overflow emergency buffer
173 */
174 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
175 PAGE_ALIGN(io_tlb_overflow),
176 PAGE_SIZE);
177 if (!v_overflow_buffer)
178 return -ENOMEM;
179
180 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
181
182 /*
183 * Allocate and initialize the free list array. This array is used
184 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
185 * between io_tlb_start and io_tlb_end.
186 */
187 io_tlb_list = memblock_virt_alloc(
188 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
189 PAGE_SIZE);
190 io_tlb_orig_addr = memblock_virt_alloc(
191 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
192 PAGE_SIZE);
193 for (i = 0; i < io_tlb_nslabs; i++) {
194 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
195 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
196 }
197 io_tlb_index = 0;
198 no_iotlb_memory = false;
199
200 if (verbose)
201 swiotlb_print_info();
202
203 return 0;
204 }
205
206 /*
207 * Statically reserve bounce buffer space and initialize bounce buffer data
208 * structures for the software IO TLB used to implement the DMA API.
209 */
210 void __init
swiotlb_init(int verbose)211 swiotlb_init(int verbose)
212 {
213 size_t default_size = IO_TLB_DEFAULT_SIZE;
214 unsigned char *vstart;
215 unsigned long bytes;
216
217 if (!io_tlb_nslabs) {
218 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
219 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
220 }
221
222 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
223
224 /* Get IO TLB memory from the low pages */
225 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
226 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
227 return;
228
229 if (io_tlb_start) {
230 memblock_free_early(io_tlb_start,
231 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
232 io_tlb_start = 0;
233 }
234 pr_warn("Cannot allocate buffer");
235 no_iotlb_memory = true;
236 }
237
238 /*
239 * Systems with larger DMA zones (those that don't support ISA) can
240 * initialize the swiotlb later using the slab allocator if needed.
241 * This should be just like above, but with some error catching.
242 */
243 int
swiotlb_late_init_with_default_size(size_t default_size)244 swiotlb_late_init_with_default_size(size_t default_size)
245 {
246 unsigned long bytes, req_nslabs = io_tlb_nslabs;
247 unsigned char *vstart = NULL;
248 unsigned int order;
249 int rc = 0;
250
251 if (!io_tlb_nslabs) {
252 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
253 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
254 }
255
256 /*
257 * Get IO TLB memory from the low pages
258 */
259 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
260 io_tlb_nslabs = SLABS_PER_PAGE << order;
261 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
262
263 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
264 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
265 order);
266 if (vstart)
267 break;
268 order--;
269 }
270
271 if (!vstart) {
272 io_tlb_nslabs = req_nslabs;
273 return -ENOMEM;
274 }
275 if (order != get_order(bytes)) {
276 pr_warn("only able to allocate %ld MB\n",
277 (PAGE_SIZE << order) >> 20);
278 io_tlb_nslabs = SLABS_PER_PAGE << order;
279 }
280 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
281 if (rc)
282 free_pages((unsigned long)vstart, order);
283 return rc;
284 }
285
286 int
swiotlb_late_init_with_tbl(char * tlb,unsigned long nslabs)287 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
288 {
289 unsigned long i, bytes;
290 unsigned char *v_overflow_buffer;
291
292 bytes = nslabs << IO_TLB_SHIFT;
293
294 io_tlb_nslabs = nslabs;
295 io_tlb_start = virt_to_phys(tlb);
296 io_tlb_end = io_tlb_start + bytes;
297
298 memset(tlb, 0, bytes);
299
300 /*
301 * Get the overflow emergency buffer
302 */
303 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
304 get_order(io_tlb_overflow));
305 if (!v_overflow_buffer)
306 goto cleanup2;
307
308 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
309
310 /*
311 * Allocate and initialize the free list array. This array is used
312 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
313 * between io_tlb_start and io_tlb_end.
314 */
315 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
316 get_order(io_tlb_nslabs * sizeof(int)));
317 if (!io_tlb_list)
318 goto cleanup3;
319
320 io_tlb_orig_addr = (phys_addr_t *)
321 __get_free_pages(GFP_KERNEL,
322 get_order(io_tlb_nslabs *
323 sizeof(phys_addr_t)));
324 if (!io_tlb_orig_addr)
325 goto cleanup4;
326
327 for (i = 0; i < io_tlb_nslabs; i++) {
328 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
329 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
330 }
331 io_tlb_index = 0;
332 no_iotlb_memory = false;
333
334 swiotlb_print_info();
335
336 late_alloc = 1;
337
338 return 0;
339
340 cleanup4:
341 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
342 sizeof(int)));
343 io_tlb_list = NULL;
344 cleanup3:
345 free_pages((unsigned long)v_overflow_buffer,
346 get_order(io_tlb_overflow));
347 io_tlb_overflow_buffer = 0;
348 cleanup2:
349 io_tlb_end = 0;
350 io_tlb_start = 0;
351 io_tlb_nslabs = 0;
352 return -ENOMEM;
353 }
354
swiotlb_free(void)355 void __init swiotlb_free(void)
356 {
357 if (!io_tlb_orig_addr)
358 return;
359
360 if (late_alloc) {
361 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
362 get_order(io_tlb_overflow));
363 free_pages((unsigned long)io_tlb_orig_addr,
364 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
365 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
366 sizeof(int)));
367 free_pages((unsigned long)phys_to_virt(io_tlb_start),
368 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
369 } else {
370 memblock_free_late(io_tlb_overflow_buffer,
371 PAGE_ALIGN(io_tlb_overflow));
372 memblock_free_late(__pa(io_tlb_orig_addr),
373 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
374 memblock_free_late(__pa(io_tlb_list),
375 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
376 memblock_free_late(io_tlb_start,
377 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
378 }
379 io_tlb_nslabs = 0;
380 }
381
is_swiotlb_buffer(phys_addr_t paddr)382 int is_swiotlb_buffer(phys_addr_t paddr)
383 {
384 return paddr >= io_tlb_start && paddr < io_tlb_end;
385 }
386
387 /*
388 * Bounce: copy the swiotlb buffer back to the original dma location
389 */
swiotlb_bounce(phys_addr_t orig_addr,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir)390 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
391 size_t size, enum dma_data_direction dir)
392 {
393 unsigned long pfn = PFN_DOWN(orig_addr);
394 unsigned char *vaddr = phys_to_virt(tlb_addr);
395
396 if (PageHighMem(pfn_to_page(pfn))) {
397 /* The buffer does not have a mapping. Map it in and copy */
398 unsigned int offset = orig_addr & ~PAGE_MASK;
399 char *buffer;
400 unsigned int sz = 0;
401 unsigned long flags;
402
403 while (size) {
404 sz = min_t(size_t, PAGE_SIZE - offset, size);
405
406 local_irq_save(flags);
407 buffer = kmap_atomic(pfn_to_page(pfn));
408 if (dir == DMA_TO_DEVICE)
409 memcpy(vaddr, buffer + offset, sz);
410 else
411 memcpy(buffer + offset, vaddr, sz);
412 kunmap_atomic(buffer);
413 local_irq_restore(flags);
414
415 size -= sz;
416 pfn++;
417 vaddr += sz;
418 offset = 0;
419 }
420 } else if (dir == DMA_TO_DEVICE) {
421 memcpy(vaddr, phys_to_virt(orig_addr), size);
422 } else {
423 memcpy(phys_to_virt(orig_addr), vaddr, size);
424 }
425 }
426
swiotlb_tbl_map_single(struct device * hwdev,dma_addr_t tbl_dma_addr,phys_addr_t orig_addr,size_t size,enum dma_data_direction dir)427 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
428 dma_addr_t tbl_dma_addr,
429 phys_addr_t orig_addr, size_t size,
430 enum dma_data_direction dir)
431 {
432 unsigned long flags;
433 phys_addr_t tlb_addr;
434 unsigned int nslots, stride, index, wrap;
435 int i;
436 unsigned long mask;
437 unsigned long offset_slots;
438 unsigned long max_slots;
439
440 if (no_iotlb_memory)
441 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
442
443 mask = dma_get_seg_boundary(hwdev);
444
445 tbl_dma_addr &= mask;
446
447 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
448
449 /*
450 * Carefully handle integer overflow which can occur when mask == ~0UL.
451 */
452 max_slots = mask + 1
453 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
454 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
455
456 /*
457 * For mappings greater than or equal to a page, we limit the stride
458 * (and hence alignment) to a page size.
459 */
460 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
461 if (size >= PAGE_SIZE)
462 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
463 else
464 stride = 1;
465
466 BUG_ON(!nslots);
467
468 /*
469 * Find suitable number of IO TLB entries size that will fit this
470 * request and allocate a buffer from that IO TLB pool.
471 */
472 spin_lock_irqsave(&io_tlb_lock, flags);
473 index = ALIGN(io_tlb_index, stride);
474 if (index >= io_tlb_nslabs)
475 index = 0;
476 wrap = index;
477
478 do {
479 while (iommu_is_span_boundary(index, nslots, offset_slots,
480 max_slots)) {
481 index += stride;
482 if (index >= io_tlb_nslabs)
483 index = 0;
484 if (index == wrap)
485 goto not_found;
486 }
487
488 /*
489 * If we find a slot that indicates we have 'nslots' number of
490 * contiguous buffers, we allocate the buffers from that slot
491 * and mark the entries as '0' indicating unavailable.
492 */
493 if (io_tlb_list[index] >= nslots) {
494 int count = 0;
495
496 for (i = index; i < (int) (index + nslots); i++)
497 io_tlb_list[i] = 0;
498 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
499 io_tlb_list[i] = ++count;
500 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
501
502 /*
503 * Update the indices to avoid searching in the next
504 * round.
505 */
506 io_tlb_index = ((index + nslots) < io_tlb_nslabs
507 ? (index + nslots) : 0);
508
509 goto found;
510 }
511 index += stride;
512 if (index >= io_tlb_nslabs)
513 index = 0;
514 } while (index != wrap);
515
516 not_found:
517 spin_unlock_irqrestore(&io_tlb_lock, flags);
518 if (printk_ratelimit())
519 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
520 return SWIOTLB_MAP_ERROR;
521 found:
522 spin_unlock_irqrestore(&io_tlb_lock, flags);
523
524 /*
525 * Save away the mapping from the original address to the DMA address.
526 * This is needed when we sync the memory. Then we sync the buffer if
527 * needed.
528 */
529 for (i = 0; i < nslots; i++)
530 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
531 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
532 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
533
534 return tlb_addr;
535 }
536 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
537
538 /*
539 * Allocates bounce buffer and returns its kernel virtual address.
540 */
541
542 static phys_addr_t
map_single(struct device * hwdev,phys_addr_t phys,size_t size,enum dma_data_direction dir)543 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
544 enum dma_data_direction dir)
545 {
546 dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
547
548 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
549 }
550
551 /*
552 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
553 */
swiotlb_tbl_unmap_single(struct device * hwdev,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir)554 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
555 size_t size, enum dma_data_direction dir)
556 {
557 unsigned long flags;
558 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
559 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
560 phys_addr_t orig_addr = io_tlb_orig_addr[index];
561
562 /*
563 * First, sync the memory before unmapping the entry
564 */
565 if (orig_addr != INVALID_PHYS_ADDR &&
566 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
567 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
568
569 /*
570 * Return the buffer to the free list by setting the corresponding
571 * entries to indicate the number of contiguous entries available.
572 * While returning the entries to the free list, we merge the entries
573 * with slots below and above the pool being returned.
574 */
575 spin_lock_irqsave(&io_tlb_lock, flags);
576 {
577 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
578 io_tlb_list[index + nslots] : 0);
579 /*
580 * Step 1: return the slots to the free list, merging the
581 * slots with superceeding slots
582 */
583 for (i = index + nslots - 1; i >= index; i--) {
584 io_tlb_list[i] = ++count;
585 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
586 }
587 /*
588 * Step 2: merge the returned slots with the preceding slots,
589 * if available (non zero)
590 */
591 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
592 io_tlb_list[i] = ++count;
593 }
594 spin_unlock_irqrestore(&io_tlb_lock, flags);
595 }
596 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
597
swiotlb_tbl_sync_single(struct device * hwdev,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir,enum dma_sync_target target)598 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
599 size_t size, enum dma_data_direction dir,
600 enum dma_sync_target target)
601 {
602 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
603 phys_addr_t orig_addr = io_tlb_orig_addr[index];
604
605 if (orig_addr == INVALID_PHYS_ADDR)
606 return;
607 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
608
609 switch (target) {
610 case SYNC_FOR_CPU:
611 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
612 swiotlb_bounce(orig_addr, tlb_addr,
613 size, DMA_FROM_DEVICE);
614 else
615 BUG_ON(dir != DMA_TO_DEVICE);
616 break;
617 case SYNC_FOR_DEVICE:
618 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
619 swiotlb_bounce(orig_addr, tlb_addr,
620 size, DMA_TO_DEVICE);
621 else
622 BUG_ON(dir != DMA_FROM_DEVICE);
623 break;
624 default:
625 BUG();
626 }
627 }
628 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
629
630 void *
swiotlb_alloc_coherent(struct device * hwdev,size_t size,dma_addr_t * dma_handle,gfp_t flags)631 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
632 dma_addr_t *dma_handle, gfp_t flags)
633 {
634 dma_addr_t dev_addr;
635 void *ret;
636 int order = get_order(size);
637 u64 dma_mask = DMA_BIT_MASK(32);
638
639 if (hwdev && hwdev->coherent_dma_mask)
640 dma_mask = hwdev->coherent_dma_mask;
641
642 ret = (void *)__get_free_pages(flags, order);
643 if (ret) {
644 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
645 if (dev_addr + size - 1 > dma_mask) {
646 /*
647 * The allocated memory isn't reachable by the device.
648 */
649 free_pages((unsigned long) ret, order);
650 ret = NULL;
651 }
652 }
653 if (!ret) {
654 /*
655 * We are either out of memory or the device can't DMA to
656 * GFP_DMA memory; fall back on map_single(), which
657 * will grab memory from the lowest available address range.
658 */
659 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
660 if (paddr == SWIOTLB_MAP_ERROR)
661 goto err_warn;
662
663 ret = phys_to_virt(paddr);
664 dev_addr = phys_to_dma(hwdev, paddr);
665
666 /* Confirm address can be DMA'd by device */
667 if (dev_addr + size - 1 > dma_mask) {
668 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
669 (unsigned long long)dma_mask,
670 (unsigned long long)dev_addr);
671
672 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
673 swiotlb_tbl_unmap_single(hwdev, paddr,
674 size, DMA_TO_DEVICE);
675 goto err_warn;
676 }
677 }
678
679 *dma_handle = dev_addr;
680 memset(ret, 0, size);
681
682 return ret;
683
684 err_warn:
685 pr_warn("coherent allocation failed for device %s size=%zu\n",
686 dev_name(hwdev), size);
687 dump_stack();
688
689 return NULL;
690 }
691 EXPORT_SYMBOL(swiotlb_alloc_coherent);
692
693 void
swiotlb_free_coherent(struct device * hwdev,size_t size,void * vaddr,dma_addr_t dev_addr)694 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
695 dma_addr_t dev_addr)
696 {
697 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
698
699 WARN_ON(irqs_disabled());
700 if (!is_swiotlb_buffer(paddr))
701 free_pages((unsigned long)vaddr, get_order(size));
702 else
703 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
704 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
705 }
706 EXPORT_SYMBOL(swiotlb_free_coherent);
707
708 static void
swiotlb_full(struct device * dev,size_t size,enum dma_data_direction dir,int do_panic)709 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
710 int do_panic)
711 {
712 /*
713 * Ran out of IOMMU space for this operation. This is very bad.
714 * Unfortunately the drivers cannot handle this operation properly.
715 * unless they check for dma_mapping_error (most don't)
716 * When the mapping is small enough return a static buffer to limit
717 * the damage, or panic when the transfer is too big.
718 */
719 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
720 "device %s\n", size, dev ? dev_name(dev) : "?");
721
722 if (size <= io_tlb_overflow || !do_panic)
723 return;
724
725 if (dir == DMA_BIDIRECTIONAL)
726 panic("DMA: Random memory could be DMA accessed\n");
727 if (dir == DMA_FROM_DEVICE)
728 panic("DMA: Random memory could be DMA written\n");
729 if (dir == DMA_TO_DEVICE)
730 panic("DMA: Random memory could be DMA read\n");
731 }
732
733 /*
734 * Map a single buffer of the indicated size for DMA in streaming mode. The
735 * physical address to use is returned.
736 *
737 * Once the device is given the dma address, the device owns this memory until
738 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
739 */
swiotlb_map_page(struct device * dev,struct page * page,unsigned long offset,size_t size,enum dma_data_direction dir,struct dma_attrs * attrs)740 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
741 unsigned long offset, size_t size,
742 enum dma_data_direction dir,
743 struct dma_attrs *attrs)
744 {
745 phys_addr_t map, phys = page_to_phys(page) + offset;
746 dma_addr_t dev_addr = phys_to_dma(dev, phys);
747
748 BUG_ON(dir == DMA_NONE);
749 /*
750 * If the address happens to be in the device's DMA window,
751 * we can safely return the device addr and not worry about bounce
752 * buffering it.
753 */
754 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
755 return dev_addr;
756
757 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
758
759 /* Oh well, have to allocate and map a bounce buffer. */
760 map = map_single(dev, phys, size, dir);
761 if (map == SWIOTLB_MAP_ERROR) {
762 swiotlb_full(dev, size, dir, 1);
763 return phys_to_dma(dev, io_tlb_overflow_buffer);
764 }
765
766 dev_addr = phys_to_dma(dev, map);
767
768 /* Ensure that the address returned is DMA'ble */
769 if (!dma_capable(dev, dev_addr, size)) {
770 swiotlb_tbl_unmap_single(dev, map, size, dir);
771 return phys_to_dma(dev, io_tlb_overflow_buffer);
772 }
773
774 return dev_addr;
775 }
776 EXPORT_SYMBOL_GPL(swiotlb_map_page);
777
778 /*
779 * Unmap a single streaming mode DMA translation. The dma_addr and size must
780 * match what was provided for in a previous swiotlb_map_page call. All
781 * other usages are undefined.
782 *
783 * After this call, reads by the cpu to the buffer are guaranteed to see
784 * whatever the device wrote there.
785 */
unmap_single(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir)786 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
787 size_t size, enum dma_data_direction dir)
788 {
789 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
790
791 BUG_ON(dir == DMA_NONE);
792
793 if (is_swiotlb_buffer(paddr)) {
794 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
795 return;
796 }
797
798 if (dir != DMA_FROM_DEVICE)
799 return;
800
801 /*
802 * phys_to_virt doesn't work with hihgmem page but we could
803 * call dma_mark_clean() with hihgmem page here. However, we
804 * are fine since dma_mark_clean() is null on POWERPC. We can
805 * make dma_mark_clean() take a physical address if necessary.
806 */
807 dma_mark_clean(phys_to_virt(paddr), size);
808 }
809
swiotlb_unmap_page(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir,struct dma_attrs * attrs)810 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
811 size_t size, enum dma_data_direction dir,
812 struct dma_attrs *attrs)
813 {
814 unmap_single(hwdev, dev_addr, size, dir);
815 }
816 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
817
818 /*
819 * Make physical memory consistent for a single streaming mode DMA translation
820 * after a transfer.
821 *
822 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
823 * using the cpu, yet do not wish to teardown the dma mapping, you must
824 * call this function before doing so. At the next point you give the dma
825 * address back to the card, you must first perform a
826 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
827 */
828 static void
swiotlb_sync_single(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir,enum dma_sync_target target)829 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
830 size_t size, enum dma_data_direction dir,
831 enum dma_sync_target target)
832 {
833 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
834
835 BUG_ON(dir == DMA_NONE);
836
837 if (is_swiotlb_buffer(paddr)) {
838 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
839 return;
840 }
841
842 if (dir != DMA_FROM_DEVICE)
843 return;
844
845 dma_mark_clean(phys_to_virt(paddr), size);
846 }
847
848 void
swiotlb_sync_single_for_cpu(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir)849 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
850 size_t size, enum dma_data_direction dir)
851 {
852 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
853 }
854 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
855
856 void
swiotlb_sync_single_for_device(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir)857 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
858 size_t size, enum dma_data_direction dir)
859 {
860 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
861 }
862 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
863
864 /*
865 * Map a set of buffers described by scatterlist in streaming mode for DMA.
866 * This is the scatter-gather version of the above swiotlb_map_page
867 * interface. Here the scatter gather list elements are each tagged with the
868 * appropriate dma address and length. They are obtained via
869 * sg_dma_{address,length}(SG).
870 *
871 * NOTE: An implementation may be able to use a smaller number of
872 * DMA address/length pairs than there are SG table elements.
873 * (for example via virtual mapping capabilities)
874 * The routine returns the number of addr/length pairs actually
875 * used, at most nents.
876 *
877 * Device ownership issues as mentioned above for swiotlb_map_page are the
878 * same here.
879 */
880 int
swiotlb_map_sg_attrs(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir,struct dma_attrs * attrs)881 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
882 enum dma_data_direction dir, struct dma_attrs *attrs)
883 {
884 struct scatterlist *sg;
885 int i;
886
887 BUG_ON(dir == DMA_NONE);
888
889 for_each_sg(sgl, sg, nelems, i) {
890 phys_addr_t paddr = sg_phys(sg);
891 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
892
893 if (swiotlb_force ||
894 !dma_capable(hwdev, dev_addr, sg->length)) {
895 phys_addr_t map = map_single(hwdev, sg_phys(sg),
896 sg->length, dir);
897 if (map == SWIOTLB_MAP_ERROR) {
898 /* Don't panic here, we expect map_sg users
899 to do proper error handling. */
900 swiotlb_full(hwdev, sg->length, dir, 0);
901 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
902 attrs);
903 sg_dma_len(sgl) = 0;
904 return 0;
905 }
906 sg->dma_address = phys_to_dma(hwdev, map);
907 } else
908 sg->dma_address = dev_addr;
909 sg_dma_len(sg) = sg->length;
910 }
911 return nelems;
912 }
913 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
914
915 int
swiotlb_map_sg(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir)916 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
917 enum dma_data_direction dir)
918 {
919 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
920 }
921 EXPORT_SYMBOL(swiotlb_map_sg);
922
923 /*
924 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
925 * concerning calls here are the same as for swiotlb_unmap_page() above.
926 */
927 void
swiotlb_unmap_sg_attrs(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir,struct dma_attrs * attrs)928 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
929 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
930 {
931 struct scatterlist *sg;
932 int i;
933
934 BUG_ON(dir == DMA_NONE);
935
936 for_each_sg(sgl, sg, nelems, i)
937 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
938
939 }
940 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
941
942 void
swiotlb_unmap_sg(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir)943 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
944 enum dma_data_direction dir)
945 {
946 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
947 }
948 EXPORT_SYMBOL(swiotlb_unmap_sg);
949
950 /*
951 * Make physical memory consistent for a set of streaming mode DMA translations
952 * after a transfer.
953 *
954 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
955 * and usage.
956 */
957 static void
swiotlb_sync_sg(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir,enum dma_sync_target target)958 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
959 int nelems, enum dma_data_direction dir,
960 enum dma_sync_target target)
961 {
962 struct scatterlist *sg;
963 int i;
964
965 for_each_sg(sgl, sg, nelems, i)
966 swiotlb_sync_single(hwdev, sg->dma_address,
967 sg_dma_len(sg), dir, target);
968 }
969
970 void
swiotlb_sync_sg_for_cpu(struct device * hwdev,struct scatterlist * sg,int nelems,enum dma_data_direction dir)971 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
972 int nelems, enum dma_data_direction dir)
973 {
974 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
975 }
976 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
977
978 void
swiotlb_sync_sg_for_device(struct device * hwdev,struct scatterlist * sg,int nelems,enum dma_data_direction dir)979 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
980 int nelems, enum dma_data_direction dir)
981 {
982 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
983 }
984 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
985
986 int
swiotlb_dma_mapping_error(struct device * hwdev,dma_addr_t dma_addr)987 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
988 {
989 return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
990 }
991 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
992
993 /*
994 * Return whether the given device DMA address mask can be supported
995 * properly. For example, if your device can only drive the low 24-bits
996 * during bus mastering, then you would pass 0x00ffffff as the mask to
997 * this function.
998 */
999 int
swiotlb_dma_supported(struct device * hwdev,u64 mask)1000 swiotlb_dma_supported(struct device *hwdev, u64 mask)
1001 {
1002 return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
1003 }
1004 EXPORT_SYMBOL(swiotlb_dma_supported);
1005