1 /*
2 * ALSA driver for RME Digi9652 audio interfaces
3 *
4 * Copyright (c) 1999 IEM - Winfried Ritsch
5 * Copyright (c) 1999-2001 Paul Davis
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/pci.h>
27 #include <linux/module.h>
28 #include <linux/io.h>
29 #include <linux/nospec.h>
30
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/pcm.h>
34 #include <sound/info.h>
35 #include <sound/asoundef.h>
36 #include <sound/initval.h>
37
38 #include <asm/current.h>
39
40 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
41 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
42 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
43 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */
44
45 module_param_array(index, int, NULL, 0444);
46 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
47 module_param_array(id, charp, NULL, 0444);
48 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
49 module_param_array(enable, bool, NULL, 0444);
50 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
51 module_param_array(precise_ptr, bool, NULL, 0444);
52 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
53 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
54 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
55 MODULE_LICENSE("GPL");
56 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
57 "{RME,Hammerfall-Light}}");
58
59 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
60 capture, one for playback. Both the ADAT and S/PDIF channels appear
61 to the host CPU in the same block of memory. There is no functional
62 difference between them in terms of access.
63
64 The Hammerfall Light is identical to the Hammerfall, except that it
65 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
66 */
67
68 #define RME9652_NCHANNELS 26
69 #define RME9636_NCHANNELS 18
70
71 /* Preferred sync source choices - used by "sync_pref" control switch */
72
73 #define RME9652_SYNC_FROM_SPDIF 0
74 #define RME9652_SYNC_FROM_ADAT1 1
75 #define RME9652_SYNC_FROM_ADAT2 2
76 #define RME9652_SYNC_FROM_ADAT3 3
77
78 /* Possible sources of S/PDIF input */
79
80 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
81 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
82 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
83
84 /* ------------- Status-Register bits --------------------- */
85
86 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
87 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
88 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
89 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
90 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
91 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
92 /* bits 6-15 encode h/w buffer pointer position */
93 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
94 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
95 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
96 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
97 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
98 #define RME9652_tc_out (1<<21) /* time-code out bit */
99 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
100 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
101 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
102 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
103 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
104 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
105 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
106
107 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
108 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
109 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
110 #define rme9652_decode_spdif_rate(x) ((x)>>22)
111
112 /* Bit 6..15 : h/w buffer pointer */
113
114 #define RME9652_buf_pos 0x000FFC0
115
116 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
117 Rev G EEPROMS and Rev 1.5 cards or later.
118 */
119
120 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
121
122 /* amount of io space we remap for register access. i'm not sure we
123 even need this much, but 1K is nice round number :)
124 */
125
126 #define RME9652_IO_EXTENT 1024
127
128 #define RME9652_init_buffer 0
129 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
130 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
131 #define RME9652_control_register 64
132 #define RME9652_irq_clear 96
133 #define RME9652_time_code 100 /* useful if used with alesis adat */
134 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
135
136 /* Read-only registers */
137
138 /* Writing to any of the register locations writes to the status
139 register. We'll use the first location as our point of access.
140 */
141
142 #define RME9652_status_register 0
143
144 /* --------- Control-Register Bits ---------------- */
145
146
147 #define RME9652_start_bit (1<<0) /* start record/play */
148 /* bits 1-3 encode buffersize/latency */
149 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
150 #define RME9652_IE (1<<5) /* Interrupt Enable */
151 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
152 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
153 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
154 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
155 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
156 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
157 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
158 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
159 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
160 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
161 #define RME9652_SyncPref_ADAT2 (1<<16)
162 #define RME9652_SyncPref_ADAT3 (1<<17)
163 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
164 #define RME9652_SPDIF_SELECT (1<<19)
165 #define RME9652_SPDIF_CLOCK (1<<20)
166 #define RME9652_SPDIF_WRITE (1<<21)
167 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
168
169 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
170
171 #define RME9652_latency 0x0e
172 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
173 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
174 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
175 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
176 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
177 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
178
179 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
180 #define RME9652_SyncPref_ADAT1 0
181 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
182
183 /* the size of a substream (1 mono data stream) */
184
185 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
186 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
187
188 /* the size of the area we need to allocate for DMA transfers. the
189 size is the same regardless of the number of channels - the
190 9636 still uses the same memory area.
191
192 Note that we allocate 1 more channel than is apparently needed
193 because the h/w seems to write 1 byte beyond the end of the last
194 page. Sigh.
195 */
196
197 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
198 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
199
200 struct snd_rme9652 {
201 int dev;
202
203 spinlock_t lock;
204 int irq;
205 unsigned long port;
206 void __iomem *iobase;
207
208 int precise_ptr;
209
210 u32 control_register; /* cached value */
211 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
212
213 u32 creg_spdif;
214 u32 creg_spdif_stream;
215
216 char *card_name; /* hammerfall or hammerfall light names */
217
218 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
219 size_t prev_hw_offset; /* previous hw offset */
220 size_t max_jitter; /* maximum jitter in frames for
221 hw pointer */
222 size_t period_bytes; /* guess what this is */
223
224 unsigned char ds_channels;
225 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
226
227 struct snd_dma_buffer playback_dma_buf;
228 struct snd_dma_buffer capture_dma_buf;
229
230 unsigned char *capture_buffer; /* suitably aligned address */
231 unsigned char *playback_buffer; /* suitably aligned address */
232
233 pid_t capture_pid;
234 pid_t playback_pid;
235
236 struct snd_pcm_substream *capture_substream;
237 struct snd_pcm_substream *playback_substream;
238 int running;
239
240 int passthru; /* non-zero if doing pass-thru */
241 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
242
243 int last_spdif_sample_rate; /* so that we can catch externally ... */
244 int last_adat_sample_rate; /* ... induced rate changes */
245
246 char *channel_map;
247
248 struct snd_card *card;
249 struct snd_pcm *pcm;
250 struct pci_dev *pci;
251 struct snd_kcontrol *spdif_ctl;
252
253 };
254
255 /* These tables map the ALSA channels 1..N to the channels that we
256 need to use in order to find the relevant channel buffer. RME
257 refer to this kind of mapping as between "the ADAT channel and
258 the DMA channel." We index it using the logical audio channel,
259 and the value is the DMA channel (i.e. channel buffer number)
260 where the data for that channel can be read/written from/to.
261 */
262
263 static char channel_map_9652_ss[26] = {
264 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
265 18, 19, 20, 21, 22, 23, 24, 25
266 };
267
268 static char channel_map_9636_ss[26] = {
269 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
270 /* channels 16 and 17 are S/PDIF */
271 24, 25,
272 /* channels 18-25 don't exist */
273 -1, -1, -1, -1, -1, -1, -1, -1
274 };
275
276 static char channel_map_9652_ds[26] = {
277 /* ADAT channels are remapped */
278 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
279 /* channels 12 and 13 are S/PDIF */
280 24, 25,
281 /* others don't exist */
282 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
283 };
284
285 static char channel_map_9636_ds[26] = {
286 /* ADAT channels are remapped */
287 1, 3, 5, 7, 9, 11, 13, 15,
288 /* channels 8 and 9 are S/PDIF */
289 24, 25,
290 /* others don't exist */
291 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
292 };
293
snd_hammerfall_get_buffer(struct pci_dev * pci,struct snd_dma_buffer * dmab,size_t size)294 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
295 {
296 dmab->dev.type = SNDRV_DMA_TYPE_DEV;
297 dmab->dev.dev = snd_dma_pci_data(pci);
298 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
299 size, dmab) < 0)
300 return -ENOMEM;
301 return 0;
302 }
303
snd_hammerfall_free_buffer(struct snd_dma_buffer * dmab,struct pci_dev * pci)304 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
305 {
306 if (dmab->area)
307 snd_dma_free_pages(dmab);
308 }
309
310
311 static const struct pci_device_id snd_rme9652_ids[] = {
312 {
313 .vendor = 0x10ee,
314 .device = 0x3fc4,
315 .subvendor = PCI_ANY_ID,
316 .subdevice = PCI_ANY_ID,
317 }, /* RME Digi9652 */
318 { 0, },
319 };
320
321 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
322
rme9652_write(struct snd_rme9652 * rme9652,int reg,int val)323 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
324 {
325 writel(val, rme9652->iobase + reg);
326 }
327
rme9652_read(struct snd_rme9652 * rme9652,int reg)328 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
329 {
330 return readl(rme9652->iobase + reg);
331 }
332
snd_rme9652_use_is_exclusive(struct snd_rme9652 * rme9652)333 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
334 {
335 unsigned long flags;
336 int ret = 1;
337
338 spin_lock_irqsave(&rme9652->lock, flags);
339 if ((rme9652->playback_pid != rme9652->capture_pid) &&
340 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
341 ret = 0;
342 }
343 spin_unlock_irqrestore(&rme9652->lock, flags);
344 return ret;
345 }
346
rme9652_adat_sample_rate(struct snd_rme9652 * rme9652)347 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
348 {
349 if (rme9652_running_double_speed(rme9652)) {
350 return (rme9652_read(rme9652, RME9652_status_register) &
351 RME9652_fs48) ? 96000 : 88200;
352 } else {
353 return (rme9652_read(rme9652, RME9652_status_register) &
354 RME9652_fs48) ? 48000 : 44100;
355 }
356 }
357
rme9652_compute_period_size(struct snd_rme9652 * rme9652)358 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
359 {
360 unsigned int i;
361
362 i = rme9652->control_register & RME9652_latency;
363 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
364 rme9652->hw_offsetmask =
365 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
366 rme9652->max_jitter = 80;
367 }
368
rme9652_hw_pointer(struct snd_rme9652 * rme9652)369 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
370 {
371 int status;
372 unsigned int offset, frag;
373 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
374 snd_pcm_sframes_t delta;
375
376 status = rme9652_read(rme9652, RME9652_status_register);
377 if (!rme9652->precise_ptr)
378 return (status & RME9652_buffer_id) ? period_size : 0;
379 offset = status & RME9652_buf_pos;
380
381 /* The hardware may give a backward movement for up to 80 frames
382 Martin Kirst <martin.kirst@freenet.de> knows the details.
383 */
384
385 delta = rme9652->prev_hw_offset - offset;
386 delta &= 0xffff;
387 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
388 offset = rme9652->prev_hw_offset;
389 else
390 rme9652->prev_hw_offset = offset;
391 offset &= rme9652->hw_offsetmask;
392 offset /= 4;
393 frag = status & RME9652_buffer_id;
394
395 if (offset < period_size) {
396 if (offset > rme9652->max_jitter) {
397 if (frag)
398 dev_err(rme9652->card->dev,
399 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
400 status, offset);
401 } else if (!frag)
402 return 0;
403 offset -= rme9652->max_jitter;
404 if ((int)offset < 0)
405 offset += period_size * 2;
406 } else {
407 if (offset > period_size + rme9652->max_jitter) {
408 if (!frag)
409 dev_err(rme9652->card->dev,
410 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
411 status, offset);
412 } else if (frag)
413 return period_size;
414 offset -= rme9652->max_jitter;
415 }
416
417 return offset;
418 }
419
rme9652_reset_hw_pointer(struct snd_rme9652 * rme9652)420 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
421 {
422 int i;
423
424 /* reset the FIFO pointer to zero. We do this by writing to 8
425 registers, each of which is a 32bit wide register, and set
426 them all to zero. Note that s->iobase is a pointer to
427 int32, not pointer to char.
428 */
429
430 for (i = 0; i < 8; i++) {
431 rme9652_write(rme9652, i * 4, 0);
432 udelay(10);
433 }
434 rme9652->prev_hw_offset = 0;
435 }
436
rme9652_start(struct snd_rme9652 * s)437 static inline void rme9652_start(struct snd_rme9652 *s)
438 {
439 s->control_register |= (RME9652_IE | RME9652_start_bit);
440 rme9652_write(s, RME9652_control_register, s->control_register);
441 }
442
rme9652_stop(struct snd_rme9652 * s)443 static inline void rme9652_stop(struct snd_rme9652 *s)
444 {
445 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
446 rme9652_write(s, RME9652_control_register, s->control_register);
447 }
448
rme9652_set_interrupt_interval(struct snd_rme9652 * s,unsigned int frames)449 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
450 unsigned int frames)
451 {
452 int restart = 0;
453 int n;
454
455 spin_lock_irq(&s->lock);
456
457 if ((restart = s->running)) {
458 rme9652_stop(s);
459 }
460
461 frames >>= 7;
462 n = 0;
463 while (frames) {
464 n++;
465 frames >>= 1;
466 }
467
468 s->control_register &= ~RME9652_latency;
469 s->control_register |= rme9652_encode_latency(n);
470
471 rme9652_write(s, RME9652_control_register, s->control_register);
472
473 rme9652_compute_period_size(s);
474
475 if (restart)
476 rme9652_start(s);
477
478 spin_unlock_irq(&s->lock);
479
480 return 0;
481 }
482
rme9652_set_rate(struct snd_rme9652 * rme9652,int rate)483 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
484 {
485 int restart;
486 int reject_if_open = 0;
487 int xrate;
488
489 if (!snd_rme9652_use_is_exclusive (rme9652)) {
490 return -EBUSY;
491 }
492
493 /* Changing from a "single speed" to a "double speed" rate is
494 not allowed if any substreams are open. This is because
495 such a change causes a shift in the location of
496 the DMA buffers and a reduction in the number of available
497 buffers.
498
499 Note that a similar but essentially insoluble problem
500 exists for externally-driven rate changes. All we can do
501 is to flag rate changes in the read/write routines.
502 */
503
504 spin_lock_irq(&rme9652->lock);
505 xrate = rme9652_adat_sample_rate(rme9652);
506
507 switch (rate) {
508 case 44100:
509 if (xrate > 48000) {
510 reject_if_open = 1;
511 }
512 rate = 0;
513 break;
514 case 48000:
515 if (xrate > 48000) {
516 reject_if_open = 1;
517 }
518 rate = RME9652_freq;
519 break;
520 case 88200:
521 if (xrate < 48000) {
522 reject_if_open = 1;
523 }
524 rate = RME9652_DS;
525 break;
526 case 96000:
527 if (xrate < 48000) {
528 reject_if_open = 1;
529 }
530 rate = RME9652_DS | RME9652_freq;
531 break;
532 default:
533 spin_unlock_irq(&rme9652->lock);
534 return -EINVAL;
535 }
536
537 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
538 spin_unlock_irq(&rme9652->lock);
539 return -EBUSY;
540 }
541
542 if ((restart = rme9652->running)) {
543 rme9652_stop(rme9652);
544 }
545 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
546 rme9652->control_register |= rate;
547 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
548
549 if (restart) {
550 rme9652_start(rme9652);
551 }
552
553 if (rate & RME9652_DS) {
554 if (rme9652->ss_channels == RME9652_NCHANNELS) {
555 rme9652->channel_map = channel_map_9652_ds;
556 } else {
557 rme9652->channel_map = channel_map_9636_ds;
558 }
559 } else {
560 if (rme9652->ss_channels == RME9652_NCHANNELS) {
561 rme9652->channel_map = channel_map_9652_ss;
562 } else {
563 rme9652->channel_map = channel_map_9636_ss;
564 }
565 }
566
567 spin_unlock_irq(&rme9652->lock);
568 return 0;
569 }
570
rme9652_set_thru(struct snd_rme9652 * rme9652,int channel,int enable)571 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
572 {
573 int i;
574
575 rme9652->passthru = 0;
576
577 if (channel < 0) {
578
579 /* set thru for all channels */
580
581 if (enable) {
582 for (i = 0; i < RME9652_NCHANNELS; i++) {
583 rme9652->thru_bits |= (1 << i);
584 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
585 }
586 } else {
587 for (i = 0; i < RME9652_NCHANNELS; i++) {
588 rme9652->thru_bits &= ~(1 << i);
589 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
590 }
591 }
592
593 } else {
594 int mapped_channel;
595
596 mapped_channel = rme9652->channel_map[channel];
597
598 if (enable) {
599 rme9652->thru_bits |= (1 << mapped_channel);
600 } else {
601 rme9652->thru_bits &= ~(1 << mapped_channel);
602 }
603
604 rme9652_write(rme9652,
605 RME9652_thru_base + mapped_channel * 4,
606 enable ? 1 : 0);
607 }
608 }
609
rme9652_set_passthru(struct snd_rme9652 * rme9652,int onoff)610 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
611 {
612 if (onoff) {
613 rme9652_set_thru(rme9652, -1, 1);
614
615 /* we don't want interrupts, so do a
616 custom version of rme9652_start().
617 */
618
619 rme9652->control_register =
620 RME9652_inp_0 |
621 rme9652_encode_latency(7) |
622 RME9652_start_bit;
623
624 rme9652_reset_hw_pointer(rme9652);
625
626 rme9652_write(rme9652, RME9652_control_register,
627 rme9652->control_register);
628 rme9652->passthru = 1;
629 } else {
630 rme9652_set_thru(rme9652, -1, 0);
631 rme9652_stop(rme9652);
632 rme9652->passthru = 0;
633 }
634
635 return 0;
636 }
637
rme9652_spdif_set_bit(struct snd_rme9652 * rme9652,int mask,int onoff)638 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
639 {
640 if (onoff)
641 rme9652->control_register |= mask;
642 else
643 rme9652->control_register &= ~mask;
644
645 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
646 }
647
rme9652_spdif_write_byte(struct snd_rme9652 * rme9652,const int val)648 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
649 {
650 long mask;
651 long i;
652
653 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
654 if (val & mask)
655 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
656 else
657 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
658
659 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
660 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
661 }
662 }
663
rme9652_spdif_read_byte(struct snd_rme9652 * rme9652)664 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
665 {
666 long mask;
667 long val;
668 long i;
669
670 val = 0;
671
672 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
673 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
674 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
675 val |= mask;
676 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
677 }
678
679 return val;
680 }
681
rme9652_write_spdif_codec(struct snd_rme9652 * rme9652,const int address,const int data)682 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
683 {
684 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
685 rme9652_spdif_write_byte (rme9652, 0x20);
686 rme9652_spdif_write_byte (rme9652, address);
687 rme9652_spdif_write_byte (rme9652, data);
688 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
689 }
690
691
rme9652_spdif_read_codec(struct snd_rme9652 * rme9652,const int address)692 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
693 {
694 int ret;
695
696 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
697 rme9652_spdif_write_byte (rme9652, 0x20);
698 rme9652_spdif_write_byte (rme9652, address);
699 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
700 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
701
702 rme9652_spdif_write_byte (rme9652, 0x21);
703 ret = rme9652_spdif_read_byte (rme9652);
704 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
705
706 return ret;
707 }
708
rme9652_initialize_spdif_receiver(struct snd_rme9652 * rme9652)709 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
710 {
711 /* XXX what unsets this ? */
712
713 rme9652->control_register |= RME9652_SPDIF_RESET;
714
715 rme9652_write_spdif_codec (rme9652, 4, 0x40);
716 rme9652_write_spdif_codec (rme9652, 17, 0x13);
717 rme9652_write_spdif_codec (rme9652, 6, 0x02);
718 }
719
rme9652_spdif_sample_rate(struct snd_rme9652 * s)720 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
721 {
722 unsigned int rate_bits;
723
724 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
725 return -1; /* error condition */
726 }
727
728 if (s->hw_rev == 15) {
729
730 int x, y, ret;
731
732 x = rme9652_spdif_read_codec (s, 30);
733
734 if (x != 0)
735 y = 48000 * 64 / x;
736 else
737 y = 0;
738
739 if (y > 30400 && y < 33600) ret = 32000;
740 else if (y > 41900 && y < 46000) ret = 44100;
741 else if (y > 46000 && y < 50400) ret = 48000;
742 else if (y > 60800 && y < 67200) ret = 64000;
743 else if (y > 83700 && y < 92000) ret = 88200;
744 else if (y > 92000 && y < 100000) ret = 96000;
745 else ret = 0;
746 return ret;
747 }
748
749 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
750
751 switch (rme9652_decode_spdif_rate(rate_bits)) {
752 case 0x7:
753 return 32000;
754 break;
755
756 case 0x6:
757 return 44100;
758 break;
759
760 case 0x5:
761 return 48000;
762 break;
763
764 case 0x4:
765 return 88200;
766 break;
767
768 case 0x3:
769 return 96000;
770 break;
771
772 case 0x0:
773 return 64000;
774 break;
775
776 default:
777 dev_err(s->card->dev,
778 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
779 s->card_name, rate_bits);
780 return 0;
781 break;
782 }
783 }
784
785 /*-----------------------------------------------------------------------------
786 Control Interface
787 ----------------------------------------------------------------------------*/
788
snd_rme9652_convert_from_aes(struct snd_aes_iec958 * aes)789 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
790 {
791 u32 val = 0;
792 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
793 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
794 if (val & RME9652_PRO)
795 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
796 else
797 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
798 return val;
799 }
800
snd_rme9652_convert_to_aes(struct snd_aes_iec958 * aes,u32 val)801 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
802 {
803 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
804 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
805 if (val & RME9652_PRO)
806 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
807 else
808 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
809 }
810
snd_rme9652_control_spdif_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)811 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
812 {
813 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
814 uinfo->count = 1;
815 return 0;
816 }
817
snd_rme9652_control_spdif_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)818 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
819 {
820 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
821
822 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
823 return 0;
824 }
825
snd_rme9652_control_spdif_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)826 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
827 {
828 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
829 int change;
830 u32 val;
831
832 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
833 spin_lock_irq(&rme9652->lock);
834 change = val != rme9652->creg_spdif;
835 rme9652->creg_spdif = val;
836 spin_unlock_irq(&rme9652->lock);
837 return change;
838 }
839
snd_rme9652_control_spdif_stream_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)840 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
841 {
842 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
843 uinfo->count = 1;
844 return 0;
845 }
846
snd_rme9652_control_spdif_stream_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)847 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
848 {
849 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
850
851 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
852 return 0;
853 }
854
snd_rme9652_control_spdif_stream_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)855 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
856 {
857 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
858 int change;
859 u32 val;
860
861 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
862 spin_lock_irq(&rme9652->lock);
863 change = val != rme9652->creg_spdif_stream;
864 rme9652->creg_spdif_stream = val;
865 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
866 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
867 spin_unlock_irq(&rme9652->lock);
868 return change;
869 }
870
snd_rme9652_control_spdif_mask_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)871 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
872 {
873 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
874 uinfo->count = 1;
875 return 0;
876 }
877
snd_rme9652_control_spdif_mask_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)878 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
879 {
880 ucontrol->value.iec958.status[0] = kcontrol->private_value;
881 return 0;
882 }
883
884 #define RME9652_ADAT1_IN(xname, xindex) \
885 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
886 .info = snd_rme9652_info_adat1_in, \
887 .get = snd_rme9652_get_adat1_in, \
888 .put = snd_rme9652_put_adat1_in }
889
rme9652_adat1_in(struct snd_rme9652 * rme9652)890 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
891 {
892 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
893 return 1;
894 return 0;
895 }
896
rme9652_set_adat1_input(struct snd_rme9652 * rme9652,int internal)897 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
898 {
899 int restart = 0;
900
901 if (internal) {
902 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
903 } else {
904 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
905 }
906
907 /* XXX do we actually need to stop the card when we do this ? */
908
909 if ((restart = rme9652->running)) {
910 rme9652_stop(rme9652);
911 }
912
913 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
914
915 if (restart) {
916 rme9652_start(rme9652);
917 }
918
919 return 0;
920 }
921
snd_rme9652_info_adat1_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)922 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
923 {
924 static const char * const texts[2] = {"ADAT1", "Internal"};
925
926 return snd_ctl_enum_info(uinfo, 1, 2, texts);
927 }
928
snd_rme9652_get_adat1_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)929 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
930 {
931 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
932
933 spin_lock_irq(&rme9652->lock);
934 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
935 spin_unlock_irq(&rme9652->lock);
936 return 0;
937 }
938
snd_rme9652_put_adat1_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)939 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
940 {
941 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
942 int change;
943 unsigned int val;
944
945 if (!snd_rme9652_use_is_exclusive(rme9652))
946 return -EBUSY;
947 val = ucontrol->value.enumerated.item[0] % 2;
948 spin_lock_irq(&rme9652->lock);
949 change = val != rme9652_adat1_in(rme9652);
950 if (change)
951 rme9652_set_adat1_input(rme9652, val);
952 spin_unlock_irq(&rme9652->lock);
953 return change;
954 }
955
956 #define RME9652_SPDIF_IN(xname, xindex) \
957 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
958 .info = snd_rme9652_info_spdif_in, \
959 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
960
rme9652_spdif_in(struct snd_rme9652 * rme9652)961 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
962 {
963 return rme9652_decode_spdif_in(rme9652->control_register &
964 RME9652_inp);
965 }
966
rme9652_set_spdif_input(struct snd_rme9652 * rme9652,int in)967 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
968 {
969 int restart = 0;
970
971 rme9652->control_register &= ~RME9652_inp;
972 rme9652->control_register |= rme9652_encode_spdif_in(in);
973
974 if ((restart = rme9652->running)) {
975 rme9652_stop(rme9652);
976 }
977
978 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
979
980 if (restart) {
981 rme9652_start(rme9652);
982 }
983
984 return 0;
985 }
986
snd_rme9652_info_spdif_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)987 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
988 {
989 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
990
991 return snd_ctl_enum_info(uinfo, 1, 3, texts);
992 }
993
snd_rme9652_get_spdif_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)994 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
995 {
996 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
997
998 spin_lock_irq(&rme9652->lock);
999 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1000 spin_unlock_irq(&rme9652->lock);
1001 return 0;
1002 }
1003
snd_rme9652_put_spdif_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1004 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1005 {
1006 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1007 int change;
1008 unsigned int val;
1009
1010 if (!snd_rme9652_use_is_exclusive(rme9652))
1011 return -EBUSY;
1012 val = ucontrol->value.enumerated.item[0] % 3;
1013 spin_lock_irq(&rme9652->lock);
1014 change = val != rme9652_spdif_in(rme9652);
1015 if (change)
1016 rme9652_set_spdif_input(rme9652, val);
1017 spin_unlock_irq(&rme9652->lock);
1018 return change;
1019 }
1020
1021 #define RME9652_SPDIF_OUT(xname, xindex) \
1022 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1023 .info = snd_rme9652_info_spdif_out, \
1024 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1025
rme9652_spdif_out(struct snd_rme9652 * rme9652)1026 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1027 {
1028 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1029 }
1030
rme9652_set_spdif_output(struct snd_rme9652 * rme9652,int out)1031 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1032 {
1033 int restart = 0;
1034
1035 if (out) {
1036 rme9652->control_register |= RME9652_opt_out;
1037 } else {
1038 rme9652->control_register &= ~RME9652_opt_out;
1039 }
1040
1041 if ((restart = rme9652->running)) {
1042 rme9652_stop(rme9652);
1043 }
1044
1045 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1046
1047 if (restart) {
1048 rme9652_start(rme9652);
1049 }
1050
1051 return 0;
1052 }
1053
1054 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1055
snd_rme9652_get_spdif_out(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1056 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1057 {
1058 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1059
1060 spin_lock_irq(&rme9652->lock);
1061 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1062 spin_unlock_irq(&rme9652->lock);
1063 return 0;
1064 }
1065
snd_rme9652_put_spdif_out(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1066 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1067 {
1068 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1069 int change;
1070 unsigned int val;
1071
1072 if (!snd_rme9652_use_is_exclusive(rme9652))
1073 return -EBUSY;
1074 val = ucontrol->value.integer.value[0] & 1;
1075 spin_lock_irq(&rme9652->lock);
1076 change = (int)val != rme9652_spdif_out(rme9652);
1077 rme9652_set_spdif_output(rme9652, val);
1078 spin_unlock_irq(&rme9652->lock);
1079 return change;
1080 }
1081
1082 #define RME9652_SYNC_MODE(xname, xindex) \
1083 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1084 .info = snd_rme9652_info_sync_mode, \
1085 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1086
rme9652_sync_mode(struct snd_rme9652 * rme9652)1087 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1088 {
1089 if (rme9652->control_register & RME9652_wsel) {
1090 return 2;
1091 } else if (rme9652->control_register & RME9652_Master) {
1092 return 1;
1093 } else {
1094 return 0;
1095 }
1096 }
1097
rme9652_set_sync_mode(struct snd_rme9652 * rme9652,int mode)1098 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1099 {
1100 int restart = 0;
1101
1102 switch (mode) {
1103 case 0:
1104 rme9652->control_register &=
1105 ~(RME9652_Master | RME9652_wsel);
1106 break;
1107 case 1:
1108 rme9652->control_register =
1109 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1110 break;
1111 case 2:
1112 rme9652->control_register |=
1113 (RME9652_Master | RME9652_wsel);
1114 break;
1115 }
1116
1117 if ((restart = rme9652->running)) {
1118 rme9652_stop(rme9652);
1119 }
1120
1121 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1122
1123 if (restart) {
1124 rme9652_start(rme9652);
1125 }
1126
1127 return 0;
1128 }
1129
snd_rme9652_info_sync_mode(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1130 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1131 {
1132 static const char * const texts[3] = {
1133 "AutoSync", "Master", "Word Clock"
1134 };
1135
1136 return snd_ctl_enum_info(uinfo, 1, 3, texts);
1137 }
1138
snd_rme9652_get_sync_mode(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1139 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1140 {
1141 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1142
1143 spin_lock_irq(&rme9652->lock);
1144 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1145 spin_unlock_irq(&rme9652->lock);
1146 return 0;
1147 }
1148
snd_rme9652_put_sync_mode(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1149 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1150 {
1151 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1152 int change;
1153 unsigned int val;
1154
1155 val = ucontrol->value.enumerated.item[0] % 3;
1156 spin_lock_irq(&rme9652->lock);
1157 change = (int)val != rme9652_sync_mode(rme9652);
1158 rme9652_set_sync_mode(rme9652, val);
1159 spin_unlock_irq(&rme9652->lock);
1160 return change;
1161 }
1162
1163 #define RME9652_SYNC_PREF(xname, xindex) \
1164 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1165 .info = snd_rme9652_info_sync_pref, \
1166 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1167
rme9652_sync_pref(struct snd_rme9652 * rme9652)1168 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1169 {
1170 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1171 case RME9652_SyncPref_ADAT1:
1172 return RME9652_SYNC_FROM_ADAT1;
1173 case RME9652_SyncPref_ADAT2:
1174 return RME9652_SYNC_FROM_ADAT2;
1175 case RME9652_SyncPref_ADAT3:
1176 return RME9652_SYNC_FROM_ADAT3;
1177 case RME9652_SyncPref_SPDIF:
1178 return RME9652_SYNC_FROM_SPDIF;
1179 }
1180 /* Not reachable */
1181 return 0;
1182 }
1183
rme9652_set_sync_pref(struct snd_rme9652 * rme9652,int pref)1184 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1185 {
1186 int restart;
1187
1188 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1189 switch (pref) {
1190 case RME9652_SYNC_FROM_ADAT1:
1191 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1192 break;
1193 case RME9652_SYNC_FROM_ADAT2:
1194 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1195 break;
1196 case RME9652_SYNC_FROM_ADAT3:
1197 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1198 break;
1199 case RME9652_SYNC_FROM_SPDIF:
1200 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1201 break;
1202 }
1203
1204 if ((restart = rme9652->running)) {
1205 rme9652_stop(rme9652);
1206 }
1207
1208 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1209
1210 if (restart) {
1211 rme9652_start(rme9652);
1212 }
1213
1214 return 0;
1215 }
1216
snd_rme9652_info_sync_pref(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1217 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1218 {
1219 static const char * const texts[4] = {
1220 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1221 };
1222 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1223
1224 return snd_ctl_enum_info(uinfo, 1,
1225 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1226 texts);
1227 }
1228
snd_rme9652_get_sync_pref(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1229 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1230 {
1231 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1232
1233 spin_lock_irq(&rme9652->lock);
1234 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1235 spin_unlock_irq(&rme9652->lock);
1236 return 0;
1237 }
1238
snd_rme9652_put_sync_pref(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1239 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1240 {
1241 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1242 int change, max;
1243 unsigned int val;
1244
1245 if (!snd_rme9652_use_is_exclusive(rme9652))
1246 return -EBUSY;
1247 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1248 val = ucontrol->value.enumerated.item[0] % max;
1249 spin_lock_irq(&rme9652->lock);
1250 change = (int)val != rme9652_sync_pref(rme9652);
1251 rme9652_set_sync_pref(rme9652, val);
1252 spin_unlock_irq(&rme9652->lock);
1253 return change;
1254 }
1255
snd_rme9652_info_thru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1256 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1257 {
1258 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1259 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1260 uinfo->count = rme9652->ss_channels;
1261 uinfo->value.integer.min = 0;
1262 uinfo->value.integer.max = 1;
1263 return 0;
1264 }
1265
snd_rme9652_get_thru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1266 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1267 {
1268 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1269 unsigned int k;
1270 u32 thru_bits = rme9652->thru_bits;
1271
1272 for (k = 0; k < rme9652->ss_channels; ++k) {
1273 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1274 }
1275 return 0;
1276 }
1277
snd_rme9652_put_thru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1278 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1279 {
1280 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1281 int change;
1282 unsigned int chn;
1283 u32 thru_bits = 0;
1284
1285 if (!snd_rme9652_use_is_exclusive(rme9652))
1286 return -EBUSY;
1287
1288 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1289 if (ucontrol->value.integer.value[chn])
1290 thru_bits |= 1 << chn;
1291 }
1292
1293 spin_lock_irq(&rme9652->lock);
1294 change = thru_bits ^ rme9652->thru_bits;
1295 if (change) {
1296 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1297 if (!(change & (1 << chn)))
1298 continue;
1299 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1300 }
1301 }
1302 spin_unlock_irq(&rme9652->lock);
1303 return !!change;
1304 }
1305
1306 #define RME9652_PASSTHRU(xname, xindex) \
1307 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1308 .info = snd_rme9652_info_passthru, \
1309 .put = snd_rme9652_put_passthru, \
1310 .get = snd_rme9652_get_passthru }
1311
1312 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1313
snd_rme9652_get_passthru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1314 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1315 {
1316 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1317
1318 spin_lock_irq(&rme9652->lock);
1319 ucontrol->value.integer.value[0] = rme9652->passthru;
1320 spin_unlock_irq(&rme9652->lock);
1321 return 0;
1322 }
1323
snd_rme9652_put_passthru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1324 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1325 {
1326 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1327 int change;
1328 unsigned int val;
1329 int err = 0;
1330
1331 if (!snd_rme9652_use_is_exclusive(rme9652))
1332 return -EBUSY;
1333
1334 val = ucontrol->value.integer.value[0] & 1;
1335 spin_lock_irq(&rme9652->lock);
1336 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1337 if (change)
1338 err = rme9652_set_passthru(rme9652, val);
1339 spin_unlock_irq(&rme9652->lock);
1340 return err ? err : change;
1341 }
1342
1343 /* Read-only switches */
1344
1345 #define RME9652_SPDIF_RATE(xname, xindex) \
1346 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1347 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1348 .info = snd_rme9652_info_spdif_rate, \
1349 .get = snd_rme9652_get_spdif_rate }
1350
snd_rme9652_info_spdif_rate(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1351 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1352 {
1353 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1354 uinfo->count = 1;
1355 uinfo->value.integer.min = 0;
1356 uinfo->value.integer.max = 96000;
1357 return 0;
1358 }
1359
snd_rme9652_get_spdif_rate(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1360 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1361 {
1362 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1363
1364 spin_lock_irq(&rme9652->lock);
1365 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1366 spin_unlock_irq(&rme9652->lock);
1367 return 0;
1368 }
1369
1370 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1371 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1372 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1373 .info = snd_rme9652_info_adat_sync, \
1374 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1375
snd_rme9652_info_adat_sync(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1376 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1377 {
1378 static const char * const texts[4] = {
1379 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1380 };
1381
1382 return snd_ctl_enum_info(uinfo, 1, 4, texts);
1383 }
1384
snd_rme9652_get_adat_sync(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1385 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1386 {
1387 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1388 unsigned int mask1, mask2, val;
1389
1390 switch (kcontrol->private_value) {
1391 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1392 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1393 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1394 default: return -EINVAL;
1395 }
1396 val = rme9652_read(rme9652, RME9652_status_register);
1397 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1398 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1399 return 0;
1400 }
1401
1402 #define RME9652_TC_VALID(xname, xindex) \
1403 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1404 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1405 .info = snd_rme9652_info_tc_valid, \
1406 .get = snd_rme9652_get_tc_valid }
1407
1408 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1409
snd_rme9652_get_tc_valid(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1410 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1411 {
1412 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1413
1414 ucontrol->value.integer.value[0] =
1415 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1416 return 0;
1417 }
1418
1419 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1420
1421 /* FIXME: this routine needs a port to the new control API --jk */
1422
snd_rme9652_get_tc_value(void * private_data,snd_kswitch_t * kswitch,snd_switch_t * uswitch)1423 static int snd_rme9652_get_tc_value(void *private_data,
1424 snd_kswitch_t *kswitch,
1425 snd_switch_t *uswitch)
1426 {
1427 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1428 u32 value;
1429 int i;
1430
1431 uswitch->type = SNDRV_SW_TYPE_DWORD;
1432
1433 if ((rme9652_read(s, RME9652_status_register) &
1434 RME9652_tc_valid) == 0) {
1435 uswitch->value.data32[0] = 0;
1436 return 0;
1437 }
1438
1439 /* timecode request */
1440
1441 rme9652_write(s, RME9652_time_code, 0);
1442
1443 /* XXX bug alert: loop-based timing !!!! */
1444
1445 for (i = 0; i < 50; i++) {
1446 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1447 break;
1448 }
1449
1450 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1451 return -EIO;
1452 }
1453
1454 value = 0;
1455
1456 for (i = 0; i < 32; i++) {
1457 value >>= 1;
1458
1459 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1460 value |= 0x80000000;
1461 }
1462
1463 if (value > 2 * 60 * 48000) {
1464 value -= 2 * 60 * 48000;
1465 } else {
1466 value = 0;
1467 }
1468
1469 uswitch->value.data32[0] = value;
1470
1471 return 0;
1472 }
1473
1474 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1475
1476 static struct snd_kcontrol_new snd_rme9652_controls[] = {
1477 {
1478 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1479 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1480 .info = snd_rme9652_control_spdif_info,
1481 .get = snd_rme9652_control_spdif_get,
1482 .put = snd_rme9652_control_spdif_put,
1483 },
1484 {
1485 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1486 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1487 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1488 .info = snd_rme9652_control_spdif_stream_info,
1489 .get = snd_rme9652_control_spdif_stream_get,
1490 .put = snd_rme9652_control_spdif_stream_put,
1491 },
1492 {
1493 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1494 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1495 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1496 .info = snd_rme9652_control_spdif_mask_info,
1497 .get = snd_rme9652_control_spdif_mask_get,
1498 .private_value = IEC958_AES0_NONAUDIO |
1499 IEC958_AES0_PROFESSIONAL |
1500 IEC958_AES0_CON_EMPHASIS,
1501 },
1502 {
1503 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1504 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1505 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1506 .info = snd_rme9652_control_spdif_mask_info,
1507 .get = snd_rme9652_control_spdif_mask_get,
1508 .private_value = IEC958_AES0_NONAUDIO |
1509 IEC958_AES0_PROFESSIONAL |
1510 IEC958_AES0_PRO_EMPHASIS,
1511 },
1512 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1513 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1514 RME9652_SYNC_MODE("Sync Mode", 0),
1515 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1516 {
1517 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1518 .name = "Channels Thru",
1519 .index = 0,
1520 .info = snd_rme9652_info_thru,
1521 .get = snd_rme9652_get_thru,
1522 .put = snd_rme9652_put_thru,
1523 },
1524 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1525 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1526 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1527 RME9652_TC_VALID("Timecode Valid", 0),
1528 RME9652_PASSTHRU("Passthru", 0)
1529 };
1530
1531 static struct snd_kcontrol_new snd_rme9652_adat3_check =
1532 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1533
1534 static struct snd_kcontrol_new snd_rme9652_adat1_input =
1535 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1536
snd_rme9652_create_controls(struct snd_card * card,struct snd_rme9652 * rme9652)1537 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1538 {
1539 unsigned int idx;
1540 int err;
1541 struct snd_kcontrol *kctl;
1542
1543 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1544 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1545 return err;
1546 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1547 rme9652->spdif_ctl = kctl;
1548 }
1549
1550 if (rme9652->ss_channels == RME9652_NCHANNELS)
1551 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1552 return err;
1553
1554 if (rme9652->hw_rev >= 15)
1555 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1556 return err;
1557
1558 return 0;
1559 }
1560
1561 /*------------------------------------------------------------
1562 /proc interface
1563 ------------------------------------------------------------*/
1564
1565 static void
snd_rme9652_proc_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)1566 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1567 {
1568 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1569 u32 thru_bits = rme9652->thru_bits;
1570 int show_auto_sync_source = 0;
1571 int i;
1572 unsigned int status;
1573 int x;
1574
1575 status = rme9652_read(rme9652, RME9652_status_register);
1576
1577 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1578 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1579 rme9652->capture_buffer, rme9652->playback_buffer);
1580 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1581 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1582 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1583
1584 snd_iprintf(buffer, "\n");
1585
1586 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1587 RME9652_latency));
1588
1589 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1590 x, (unsigned long) rme9652->period_bytes);
1591 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1592 rme9652_hw_pointer(rme9652));
1593 snd_iprintf(buffer, "Passthru: %s\n",
1594 rme9652->passthru ? "yes" : "no");
1595
1596 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1597 snd_iprintf(buffer, "Clock mode: autosync\n");
1598 show_auto_sync_source = 1;
1599 } else if (rme9652->control_register & RME9652_wsel) {
1600 if (status & RME9652_wsel_rd) {
1601 snd_iprintf(buffer, "Clock mode: word clock\n");
1602 } else {
1603 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1604 }
1605 } else {
1606 snd_iprintf(buffer, "Clock mode: master\n");
1607 }
1608
1609 if (show_auto_sync_source) {
1610 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1611 case RME9652_SyncPref_ADAT1:
1612 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1613 break;
1614 case RME9652_SyncPref_ADAT2:
1615 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1616 break;
1617 case RME9652_SyncPref_ADAT3:
1618 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1619 break;
1620 case RME9652_SyncPref_SPDIF:
1621 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1622 break;
1623 default:
1624 snd_iprintf(buffer, "Pref. sync source: ???\n");
1625 }
1626 }
1627
1628 if (rme9652->hw_rev >= 15)
1629 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1630 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1631 "Internal" : "ADAT1 optical");
1632
1633 snd_iprintf(buffer, "\n");
1634
1635 switch (rme9652_decode_spdif_in(rme9652->control_register &
1636 RME9652_inp)) {
1637 case RME9652_SPDIFIN_OPTICAL:
1638 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1639 break;
1640 case RME9652_SPDIFIN_COAXIAL:
1641 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1642 break;
1643 case RME9652_SPDIFIN_INTERN:
1644 snd_iprintf(buffer, "IEC958 input: Internal\n");
1645 break;
1646 default:
1647 snd_iprintf(buffer, "IEC958 input: ???\n");
1648 break;
1649 }
1650
1651 if (rme9652->control_register & RME9652_opt_out) {
1652 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1653 } else {
1654 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1655 }
1656
1657 if (rme9652->control_register & RME9652_PRO) {
1658 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1659 } else {
1660 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1661 }
1662
1663 if (rme9652->control_register & RME9652_EMP) {
1664 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1665 } else {
1666 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1667 }
1668
1669 if (rme9652->control_register & RME9652_Dolby) {
1670 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1671 } else {
1672 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1673 }
1674
1675 i = rme9652_spdif_sample_rate(rme9652);
1676
1677 if (i < 0) {
1678 snd_iprintf(buffer,
1679 "IEC958 sample rate: error flag set\n");
1680 } else if (i == 0) {
1681 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1682 } else {
1683 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1684 }
1685
1686 snd_iprintf(buffer, "\n");
1687
1688 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1689 rme9652_adat_sample_rate(rme9652));
1690
1691 /* Sync Check */
1692
1693 x = status & RME9652_sync_0;
1694 if (status & RME9652_lock_0) {
1695 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1696 } else {
1697 snd_iprintf(buffer, "ADAT1: No Lock\n");
1698 }
1699
1700 x = status & RME9652_sync_1;
1701 if (status & RME9652_lock_1) {
1702 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1703 } else {
1704 snd_iprintf(buffer, "ADAT2: No Lock\n");
1705 }
1706
1707 x = status & RME9652_sync_2;
1708 if (status & RME9652_lock_2) {
1709 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1710 } else {
1711 snd_iprintf(buffer, "ADAT3: No Lock\n");
1712 }
1713
1714 snd_iprintf(buffer, "\n");
1715
1716 snd_iprintf(buffer, "Timecode signal: %s\n",
1717 (status & RME9652_tc_valid) ? "yes" : "no");
1718
1719 /* thru modes */
1720
1721 snd_iprintf(buffer, "Punch Status:\n\n");
1722
1723 for (i = 0; i < rme9652->ss_channels; i++) {
1724 if (thru_bits & (1 << i)) {
1725 snd_iprintf(buffer, "%2d: on ", i + 1);
1726 } else {
1727 snd_iprintf(buffer, "%2d: off ", i + 1);
1728 }
1729
1730 if (((i + 1) % 8) == 0) {
1731 snd_iprintf(buffer, "\n");
1732 }
1733 }
1734
1735 snd_iprintf(buffer, "\n");
1736 }
1737
snd_rme9652_proc_init(struct snd_rme9652 * rme9652)1738 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1739 {
1740 struct snd_info_entry *entry;
1741
1742 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1743 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read);
1744 }
1745
snd_rme9652_free_buffers(struct snd_rme9652 * rme9652)1746 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1747 {
1748 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1749 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1750 }
1751
snd_rme9652_free(struct snd_rme9652 * rme9652)1752 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1753 {
1754 if (rme9652->irq >= 0)
1755 rme9652_stop(rme9652);
1756 snd_rme9652_free_buffers(rme9652);
1757
1758 if (rme9652->irq >= 0)
1759 free_irq(rme9652->irq, (void *)rme9652);
1760 iounmap(rme9652->iobase);
1761 if (rme9652->port)
1762 pci_release_regions(rme9652->pci);
1763
1764 if (pci_is_enabled(rme9652->pci))
1765 pci_disable_device(rme9652->pci);
1766 return 0;
1767 }
1768
snd_rme9652_initialize_memory(struct snd_rme9652 * rme9652)1769 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1770 {
1771 unsigned long pb_bus, cb_bus;
1772
1773 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1774 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1775 if (rme9652->capture_dma_buf.area)
1776 snd_dma_free_pages(&rme9652->capture_dma_buf);
1777 dev_err(rme9652->card->dev,
1778 "%s: no buffers available\n", rme9652->card_name);
1779 return -ENOMEM;
1780 }
1781
1782 /* Align to bus-space 64K boundary */
1783
1784 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1785 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1786
1787 /* Tell the card where it is */
1788
1789 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1790 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1791
1792 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1793 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1794
1795 return 0;
1796 }
1797
snd_rme9652_set_defaults(struct snd_rme9652 * rme9652)1798 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1799 {
1800 unsigned int k;
1801
1802 /* ASSUMPTION: rme9652->lock is either held, or
1803 there is no need to hold it (e.g. during module
1804 initialization).
1805 */
1806
1807 /* set defaults:
1808
1809 SPDIF Input via Coax
1810 autosync clock mode
1811 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1812 which implies 2 4096 sample, 32Kbyte periods).
1813
1814 if rev 1.5, initialize the S/PDIF receiver.
1815
1816 */
1817
1818 rme9652->control_register =
1819 RME9652_inp_0 | rme9652_encode_latency(7);
1820
1821 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1822
1823 rme9652_reset_hw_pointer(rme9652);
1824 rme9652_compute_period_size(rme9652);
1825
1826 /* default: thru off for all channels */
1827
1828 for (k = 0; k < RME9652_NCHANNELS; ++k)
1829 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1830
1831 rme9652->thru_bits = 0;
1832 rme9652->passthru = 0;
1833
1834 /* set a default rate so that the channel map is set up */
1835
1836 rme9652_set_rate(rme9652, 48000);
1837 }
1838
snd_rme9652_interrupt(int irq,void * dev_id)1839 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1840 {
1841 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1842
1843 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1844 return IRQ_NONE;
1845 }
1846
1847 rme9652_write(rme9652, RME9652_irq_clear, 0);
1848
1849 if (rme9652->capture_substream) {
1850 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1851 }
1852
1853 if (rme9652->playback_substream) {
1854 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1855 }
1856 return IRQ_HANDLED;
1857 }
1858
snd_rme9652_hw_pointer(struct snd_pcm_substream * substream)1859 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1860 {
1861 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1862 return rme9652_hw_pointer(rme9652);
1863 }
1864
rme9652_channel_buffer_location(struct snd_rme9652 * rme9652,int stream,int channel)1865 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1866 int stream,
1867 int channel)
1868
1869 {
1870 int mapped_channel;
1871
1872 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1873 return NULL;
1874
1875 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1876 return NULL;
1877 }
1878
1879 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1880 return rme9652->capture_buffer +
1881 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1882 } else {
1883 return rme9652->playback_buffer +
1884 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1885 }
1886 }
1887
snd_rme9652_playback_copy(struct snd_pcm_substream * substream,int channel,snd_pcm_uframes_t pos,void __user * src,snd_pcm_uframes_t count)1888 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel,
1889 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
1890 {
1891 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1892 char *channel_buf;
1893
1894 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4))
1895 return -EINVAL;
1896
1897 channel_buf = rme9652_channel_buffer_location (rme9652,
1898 substream->pstr->stream,
1899 channel);
1900 if (snd_BUG_ON(!channel_buf))
1901 return -EIO;
1902 if (copy_from_user(channel_buf + pos * 4, src, count * 4))
1903 return -EFAULT;
1904 return count;
1905 }
1906
snd_rme9652_capture_copy(struct snd_pcm_substream * substream,int channel,snd_pcm_uframes_t pos,void __user * dst,snd_pcm_uframes_t count)1907 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel,
1908 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
1909 {
1910 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1911 char *channel_buf;
1912
1913 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4))
1914 return -EINVAL;
1915
1916 channel_buf = rme9652_channel_buffer_location (rme9652,
1917 substream->pstr->stream,
1918 channel);
1919 if (snd_BUG_ON(!channel_buf))
1920 return -EIO;
1921 if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
1922 return -EFAULT;
1923 return count;
1924 }
1925
snd_rme9652_hw_silence(struct snd_pcm_substream * substream,int channel,snd_pcm_uframes_t pos,snd_pcm_uframes_t count)1926 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel,
1927 snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
1928 {
1929 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1930 char *channel_buf;
1931
1932 channel_buf = rme9652_channel_buffer_location (rme9652,
1933 substream->pstr->stream,
1934 channel);
1935 if (snd_BUG_ON(!channel_buf))
1936 return -EIO;
1937 memset(channel_buf + pos * 4, 0, count * 4);
1938 return count;
1939 }
1940
snd_rme9652_reset(struct snd_pcm_substream * substream)1941 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1942 {
1943 struct snd_pcm_runtime *runtime = substream->runtime;
1944 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1945 struct snd_pcm_substream *other;
1946 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1947 other = rme9652->capture_substream;
1948 else
1949 other = rme9652->playback_substream;
1950 if (rme9652->running)
1951 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1952 else
1953 runtime->status->hw_ptr = 0;
1954 if (other) {
1955 struct snd_pcm_substream *s;
1956 struct snd_pcm_runtime *oruntime = other->runtime;
1957 snd_pcm_group_for_each_entry(s, substream) {
1958 if (s == other) {
1959 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1960 break;
1961 }
1962 }
1963 }
1964 return 0;
1965 }
1966
snd_rme9652_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)1967 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1968 struct snd_pcm_hw_params *params)
1969 {
1970 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1971 int err;
1972 pid_t this_pid;
1973 pid_t other_pid;
1974
1975 spin_lock_irq(&rme9652->lock);
1976
1977 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1978 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1979 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1980 this_pid = rme9652->playback_pid;
1981 other_pid = rme9652->capture_pid;
1982 } else {
1983 this_pid = rme9652->capture_pid;
1984 other_pid = rme9652->playback_pid;
1985 }
1986
1987 if ((other_pid > 0) && (this_pid != other_pid)) {
1988
1989 /* The other stream is open, and not by the same
1990 task as this one. Make sure that the parameters
1991 that matter are the same.
1992 */
1993
1994 if ((int)params_rate(params) !=
1995 rme9652_adat_sample_rate(rme9652)) {
1996 spin_unlock_irq(&rme9652->lock);
1997 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
1998 return -EBUSY;
1999 }
2000
2001 if (params_period_size(params) != rme9652->period_bytes / 4) {
2002 spin_unlock_irq(&rme9652->lock);
2003 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2004 return -EBUSY;
2005 }
2006
2007 /* We're fine. */
2008
2009 spin_unlock_irq(&rme9652->lock);
2010 return 0;
2011
2012 } else {
2013 spin_unlock_irq(&rme9652->lock);
2014 }
2015
2016 /* how to make sure that the rate matches an externally-set one ?
2017 */
2018
2019 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2020 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2021 return err;
2022 }
2023
2024 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2025 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2026 return err;
2027 }
2028
2029 return 0;
2030 }
2031
snd_rme9652_channel_info(struct snd_pcm_substream * substream,struct snd_pcm_channel_info * info)2032 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2033 struct snd_pcm_channel_info *info)
2034 {
2035 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2036 int chn;
2037
2038 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2039 return -EINVAL;
2040
2041 chn = rme9652->channel_map[array_index_nospec(info->channel,
2042 RME9652_NCHANNELS)];
2043 if (chn < 0)
2044 return -EINVAL;
2045
2046 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2047 info->first = 0;
2048 info->step = 32;
2049 return 0;
2050 }
2051
snd_rme9652_ioctl(struct snd_pcm_substream * substream,unsigned int cmd,void * arg)2052 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2053 unsigned int cmd, void *arg)
2054 {
2055 switch (cmd) {
2056 case SNDRV_PCM_IOCTL1_RESET:
2057 {
2058 return snd_rme9652_reset(substream);
2059 }
2060 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2061 {
2062 struct snd_pcm_channel_info *info = arg;
2063 return snd_rme9652_channel_info(substream, info);
2064 }
2065 default:
2066 break;
2067 }
2068
2069 return snd_pcm_lib_ioctl(substream, cmd, arg);
2070 }
2071
rme9652_silence_playback(struct snd_rme9652 * rme9652)2072 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2073 {
2074 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2075 }
2076
snd_rme9652_trigger(struct snd_pcm_substream * substream,int cmd)2077 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2078 int cmd)
2079 {
2080 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2081 struct snd_pcm_substream *other;
2082 int running;
2083 spin_lock(&rme9652->lock);
2084 running = rme9652->running;
2085 switch (cmd) {
2086 case SNDRV_PCM_TRIGGER_START:
2087 running |= 1 << substream->stream;
2088 break;
2089 case SNDRV_PCM_TRIGGER_STOP:
2090 running &= ~(1 << substream->stream);
2091 break;
2092 default:
2093 snd_BUG();
2094 spin_unlock(&rme9652->lock);
2095 return -EINVAL;
2096 }
2097 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2098 other = rme9652->capture_substream;
2099 else
2100 other = rme9652->playback_substream;
2101
2102 if (other) {
2103 struct snd_pcm_substream *s;
2104 snd_pcm_group_for_each_entry(s, substream) {
2105 if (s == other) {
2106 snd_pcm_trigger_done(s, substream);
2107 if (cmd == SNDRV_PCM_TRIGGER_START)
2108 running |= 1 << s->stream;
2109 else
2110 running &= ~(1 << s->stream);
2111 goto _ok;
2112 }
2113 }
2114 if (cmd == SNDRV_PCM_TRIGGER_START) {
2115 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2116 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2117 rme9652_silence_playback(rme9652);
2118 } else {
2119 if (running &&
2120 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2121 rme9652_silence_playback(rme9652);
2122 }
2123 } else {
2124 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2125 rme9652_silence_playback(rme9652);
2126 }
2127 _ok:
2128 snd_pcm_trigger_done(substream, substream);
2129 if (!rme9652->running && running)
2130 rme9652_start(rme9652);
2131 else if (rme9652->running && !running)
2132 rme9652_stop(rme9652);
2133 rme9652->running = running;
2134 spin_unlock(&rme9652->lock);
2135
2136 return 0;
2137 }
2138
snd_rme9652_prepare(struct snd_pcm_substream * substream)2139 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2140 {
2141 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2142 unsigned long flags;
2143 int result = 0;
2144
2145 spin_lock_irqsave(&rme9652->lock, flags);
2146 if (!rme9652->running)
2147 rme9652_reset_hw_pointer(rme9652);
2148 spin_unlock_irqrestore(&rme9652->lock, flags);
2149 return result;
2150 }
2151
2152 static struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2153 {
2154 .info = (SNDRV_PCM_INFO_MMAP |
2155 SNDRV_PCM_INFO_MMAP_VALID |
2156 SNDRV_PCM_INFO_NONINTERLEAVED |
2157 SNDRV_PCM_INFO_SYNC_START |
2158 SNDRV_PCM_INFO_DOUBLE),
2159 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2160 .rates = (SNDRV_PCM_RATE_44100 |
2161 SNDRV_PCM_RATE_48000 |
2162 SNDRV_PCM_RATE_88200 |
2163 SNDRV_PCM_RATE_96000),
2164 .rate_min = 44100,
2165 .rate_max = 96000,
2166 .channels_min = 10,
2167 .channels_max = 26,
2168 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2169 .period_bytes_min = (64 * 4) * 10,
2170 .period_bytes_max = (8192 * 4) * 26,
2171 .periods_min = 2,
2172 .periods_max = 2,
2173 .fifo_size = 0,
2174 };
2175
2176 static struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2177 {
2178 .info = (SNDRV_PCM_INFO_MMAP |
2179 SNDRV_PCM_INFO_MMAP_VALID |
2180 SNDRV_PCM_INFO_NONINTERLEAVED |
2181 SNDRV_PCM_INFO_SYNC_START),
2182 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2183 .rates = (SNDRV_PCM_RATE_44100 |
2184 SNDRV_PCM_RATE_48000 |
2185 SNDRV_PCM_RATE_88200 |
2186 SNDRV_PCM_RATE_96000),
2187 .rate_min = 44100,
2188 .rate_max = 96000,
2189 .channels_min = 10,
2190 .channels_max = 26,
2191 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2192 .period_bytes_min = (64 * 4) * 10,
2193 .period_bytes_max = (8192 * 4) * 26,
2194 .periods_min = 2,
2195 .periods_max = 2,
2196 .fifo_size = 0,
2197 };
2198
2199 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2200
2201 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2202 .count = ARRAY_SIZE(period_sizes),
2203 .list = period_sizes,
2204 .mask = 0
2205 };
2206
snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params * params,struct snd_pcm_hw_rule * rule)2207 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2208 struct snd_pcm_hw_rule *rule)
2209 {
2210 struct snd_rme9652 *rme9652 = rule->private;
2211 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2212 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2213 return snd_interval_list(c, 2, list, 0);
2214 }
2215
snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params * params,struct snd_pcm_hw_rule * rule)2216 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2217 struct snd_pcm_hw_rule *rule)
2218 {
2219 struct snd_rme9652 *rme9652 = rule->private;
2220 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2221 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2222 if (r->min > 48000) {
2223 struct snd_interval t = {
2224 .min = rme9652->ds_channels,
2225 .max = rme9652->ds_channels,
2226 .integer = 1,
2227 };
2228 return snd_interval_refine(c, &t);
2229 } else if (r->max < 88200) {
2230 struct snd_interval t = {
2231 .min = rme9652->ss_channels,
2232 .max = rme9652->ss_channels,
2233 .integer = 1,
2234 };
2235 return snd_interval_refine(c, &t);
2236 }
2237 return 0;
2238 }
2239
snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params * params,struct snd_pcm_hw_rule * rule)2240 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2241 struct snd_pcm_hw_rule *rule)
2242 {
2243 struct snd_rme9652 *rme9652 = rule->private;
2244 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2245 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2246 if (c->min >= rme9652->ss_channels) {
2247 struct snd_interval t = {
2248 .min = 44100,
2249 .max = 48000,
2250 .integer = 1,
2251 };
2252 return snd_interval_refine(r, &t);
2253 } else if (c->max <= rme9652->ds_channels) {
2254 struct snd_interval t = {
2255 .min = 88200,
2256 .max = 96000,
2257 .integer = 1,
2258 };
2259 return snd_interval_refine(r, &t);
2260 }
2261 return 0;
2262 }
2263
snd_rme9652_playback_open(struct snd_pcm_substream * substream)2264 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2265 {
2266 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2267 struct snd_pcm_runtime *runtime = substream->runtime;
2268
2269 spin_lock_irq(&rme9652->lock);
2270
2271 snd_pcm_set_sync(substream);
2272
2273 runtime->hw = snd_rme9652_playback_subinfo;
2274 runtime->dma_area = rme9652->playback_buffer;
2275 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2276
2277 if (rme9652->capture_substream == NULL) {
2278 rme9652_stop(rme9652);
2279 rme9652_set_thru(rme9652, -1, 0);
2280 }
2281
2282 rme9652->playback_pid = current->pid;
2283 rme9652->playback_substream = substream;
2284
2285 spin_unlock_irq(&rme9652->lock);
2286
2287 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2288 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2289 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2290 snd_rme9652_hw_rule_channels, rme9652,
2291 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2292 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2293 snd_rme9652_hw_rule_channels_rate, rme9652,
2294 SNDRV_PCM_HW_PARAM_RATE, -1);
2295 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2296 snd_rme9652_hw_rule_rate_channels, rme9652,
2297 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2298
2299 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2300 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2301 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2302 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2303 return 0;
2304 }
2305
snd_rme9652_playback_release(struct snd_pcm_substream * substream)2306 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2307 {
2308 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2309
2310 spin_lock_irq(&rme9652->lock);
2311
2312 rme9652->playback_pid = -1;
2313 rme9652->playback_substream = NULL;
2314
2315 spin_unlock_irq(&rme9652->lock);
2316
2317 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2318 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2319 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2320 return 0;
2321 }
2322
2323
snd_rme9652_capture_open(struct snd_pcm_substream * substream)2324 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2325 {
2326 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2327 struct snd_pcm_runtime *runtime = substream->runtime;
2328
2329 spin_lock_irq(&rme9652->lock);
2330
2331 snd_pcm_set_sync(substream);
2332
2333 runtime->hw = snd_rme9652_capture_subinfo;
2334 runtime->dma_area = rme9652->capture_buffer;
2335 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2336
2337 if (rme9652->playback_substream == NULL) {
2338 rme9652_stop(rme9652);
2339 rme9652_set_thru(rme9652, -1, 0);
2340 }
2341
2342 rme9652->capture_pid = current->pid;
2343 rme9652->capture_substream = substream;
2344
2345 spin_unlock_irq(&rme9652->lock);
2346
2347 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2348 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2349 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2350 snd_rme9652_hw_rule_channels, rme9652,
2351 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2352 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2353 snd_rme9652_hw_rule_channels_rate, rme9652,
2354 SNDRV_PCM_HW_PARAM_RATE, -1);
2355 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2356 snd_rme9652_hw_rule_rate_channels, rme9652,
2357 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2358 return 0;
2359 }
2360
snd_rme9652_capture_release(struct snd_pcm_substream * substream)2361 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2362 {
2363 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2364
2365 spin_lock_irq(&rme9652->lock);
2366
2367 rme9652->capture_pid = -1;
2368 rme9652->capture_substream = NULL;
2369
2370 spin_unlock_irq(&rme9652->lock);
2371 return 0;
2372 }
2373
2374 static struct snd_pcm_ops snd_rme9652_playback_ops = {
2375 .open = snd_rme9652_playback_open,
2376 .close = snd_rme9652_playback_release,
2377 .ioctl = snd_rme9652_ioctl,
2378 .hw_params = snd_rme9652_hw_params,
2379 .prepare = snd_rme9652_prepare,
2380 .trigger = snd_rme9652_trigger,
2381 .pointer = snd_rme9652_hw_pointer,
2382 .copy = snd_rme9652_playback_copy,
2383 .silence = snd_rme9652_hw_silence,
2384 };
2385
2386 static struct snd_pcm_ops snd_rme9652_capture_ops = {
2387 .open = snd_rme9652_capture_open,
2388 .close = snd_rme9652_capture_release,
2389 .ioctl = snd_rme9652_ioctl,
2390 .hw_params = snd_rme9652_hw_params,
2391 .prepare = snd_rme9652_prepare,
2392 .trigger = snd_rme9652_trigger,
2393 .pointer = snd_rme9652_hw_pointer,
2394 .copy = snd_rme9652_capture_copy,
2395 };
2396
snd_rme9652_create_pcm(struct snd_card * card,struct snd_rme9652 * rme9652)2397 static int snd_rme9652_create_pcm(struct snd_card *card,
2398 struct snd_rme9652 *rme9652)
2399 {
2400 struct snd_pcm *pcm;
2401 int err;
2402
2403 if ((err = snd_pcm_new(card,
2404 rme9652->card_name,
2405 0, 1, 1, &pcm)) < 0) {
2406 return err;
2407 }
2408
2409 rme9652->pcm = pcm;
2410 pcm->private_data = rme9652;
2411 strcpy(pcm->name, rme9652->card_name);
2412
2413 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2414 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2415
2416 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2417
2418 return 0;
2419 }
2420
snd_rme9652_create(struct snd_card * card,struct snd_rme9652 * rme9652,int precise_ptr)2421 static int snd_rme9652_create(struct snd_card *card,
2422 struct snd_rme9652 *rme9652,
2423 int precise_ptr)
2424 {
2425 struct pci_dev *pci = rme9652->pci;
2426 int err;
2427 int status;
2428 unsigned short rev;
2429
2430 rme9652->irq = -1;
2431 rme9652->card = card;
2432
2433 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2434
2435 switch (rev & 0xff) {
2436 case 3:
2437 case 4:
2438 case 8:
2439 case 9:
2440 break;
2441
2442 default:
2443 /* who knows? */
2444 return -ENODEV;
2445 }
2446
2447 if ((err = pci_enable_device(pci)) < 0)
2448 return err;
2449
2450 spin_lock_init(&rme9652->lock);
2451
2452 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2453 return err;
2454 rme9652->port = pci_resource_start(pci, 0);
2455 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2456 if (rme9652->iobase == NULL) {
2457 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2458 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2459 return -EBUSY;
2460 }
2461
2462 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2463 KBUILD_MODNAME, rme9652)) {
2464 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2465 return -EBUSY;
2466 }
2467 rme9652->irq = pci->irq;
2468 rme9652->precise_ptr = precise_ptr;
2469
2470 /* Determine the h/w rev level of the card. This seems like
2471 a particularly kludgy way to encode it, but its what RME
2472 chose to do, so we follow them ...
2473 */
2474
2475 status = rme9652_read(rme9652, RME9652_status_register);
2476 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2477 rme9652->hw_rev = 15;
2478 } else {
2479 rme9652->hw_rev = 11;
2480 }
2481
2482 /* Differentiate between the standard Hammerfall, and the
2483 "Light", which does not have the expansion board. This
2484 method comes from information received from Mathhias
2485 Clausen at RME. Display the EEPROM and h/w revID where
2486 relevant.
2487 */
2488
2489 switch (rev) {
2490 case 8: /* original eprom */
2491 strcpy(card->driver, "RME9636");
2492 if (rme9652->hw_rev == 15) {
2493 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2494 } else {
2495 rme9652->card_name = "RME Digi9636";
2496 }
2497 rme9652->ss_channels = RME9636_NCHANNELS;
2498 break;
2499 case 9: /* W36_G EPROM */
2500 strcpy(card->driver, "RME9636");
2501 rme9652->card_name = "RME Digi9636 (Rev G)";
2502 rme9652->ss_channels = RME9636_NCHANNELS;
2503 break;
2504 case 4: /* W52_G EPROM */
2505 strcpy(card->driver, "RME9652");
2506 rme9652->card_name = "RME Digi9652 (Rev G)";
2507 rme9652->ss_channels = RME9652_NCHANNELS;
2508 break;
2509 case 3: /* original eprom */
2510 strcpy(card->driver, "RME9652");
2511 if (rme9652->hw_rev == 15) {
2512 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2513 } else {
2514 rme9652->card_name = "RME Digi9652";
2515 }
2516 rme9652->ss_channels = RME9652_NCHANNELS;
2517 break;
2518 }
2519
2520 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2521
2522 pci_set_master(rme9652->pci);
2523
2524 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2525 return err;
2526 }
2527
2528 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2529 return err;
2530 }
2531
2532 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2533 return err;
2534 }
2535
2536 snd_rme9652_proc_init(rme9652);
2537
2538 rme9652->last_spdif_sample_rate = -1;
2539 rme9652->last_adat_sample_rate = -1;
2540 rme9652->playback_pid = -1;
2541 rme9652->capture_pid = -1;
2542 rme9652->capture_substream = NULL;
2543 rme9652->playback_substream = NULL;
2544
2545 snd_rme9652_set_defaults(rme9652);
2546
2547 if (rme9652->hw_rev == 15) {
2548 rme9652_initialize_spdif_receiver (rme9652);
2549 }
2550
2551 return 0;
2552 }
2553
snd_rme9652_card_free(struct snd_card * card)2554 static void snd_rme9652_card_free(struct snd_card *card)
2555 {
2556 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2557
2558 if (rme9652)
2559 snd_rme9652_free(rme9652);
2560 }
2561
snd_rme9652_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)2562 static int snd_rme9652_probe(struct pci_dev *pci,
2563 const struct pci_device_id *pci_id)
2564 {
2565 static int dev;
2566 struct snd_rme9652 *rme9652;
2567 struct snd_card *card;
2568 int err;
2569
2570 if (dev >= SNDRV_CARDS)
2571 return -ENODEV;
2572 if (!enable[dev]) {
2573 dev++;
2574 return -ENOENT;
2575 }
2576
2577 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2578 sizeof(struct snd_rme9652), &card);
2579
2580 if (err < 0)
2581 return err;
2582
2583 rme9652 = (struct snd_rme9652 *) card->private_data;
2584 card->private_free = snd_rme9652_card_free;
2585 rme9652->dev = dev;
2586 rme9652->pci = pci;
2587
2588 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2589 snd_card_free(card);
2590 return err;
2591 }
2592
2593 strcpy(card->shortname, rme9652->card_name);
2594
2595 sprintf(card->longname, "%s at 0x%lx, irq %d",
2596 card->shortname, rme9652->port, rme9652->irq);
2597
2598
2599 if ((err = snd_card_register(card)) < 0) {
2600 snd_card_free(card);
2601 return err;
2602 }
2603 pci_set_drvdata(pci, card);
2604 dev++;
2605 return 0;
2606 }
2607
snd_rme9652_remove(struct pci_dev * pci)2608 static void snd_rme9652_remove(struct pci_dev *pci)
2609 {
2610 snd_card_free(pci_get_drvdata(pci));
2611 }
2612
2613 static struct pci_driver rme9652_driver = {
2614 .name = KBUILD_MODNAME,
2615 .id_table = snd_rme9652_ids,
2616 .probe = snd_rme9652_probe,
2617 .remove = snd_rme9652_remove,
2618 };
2619
2620 module_pci_driver(rme9652_driver);
2621