| /arch/m32r/include/asm/ |
| D | dcache_clear.h | 13 #define DCACHE_CLEAR(reg0, reg1, addr) \ argument
26 #define DCACHE_CLEAR(reg0, reg1, addr) argument
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| /arch/arm/lib/ |
| D | csumpartialcopy.S | 28 .macro load1b, reg1 argument
37 .macro load1l, reg1 argument
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| D | csumpartialcopyuser.S | 42 .macro load1b, reg1 argument
51 .macro load1l, reg1 argument
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| /arch/arm/probes/kprobes/ |
| D | test-core.h | 241 #define TEST_RR(code1, reg1, val1, code2, reg2, val2, code3) \ argument
249 #define TEST_RRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
258 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \ argument
268 #define TEST_P(code1, reg1, val1, code2) \ argument
275 #define TEST_PR(code1, reg1, val1, code2, reg2, val2, code3) \ argument
283 #define TEST_RP(code1, reg1, val1, code2, reg2, val2, code3) \ argument
291 #define TEST_PRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
300 #define TEST_RPR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
309 #define TEST_RRP(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
318 #define TEST_BF_P(code1, reg1, val1, code2) \ argument
[all …]
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| /arch/x86/events/intel/ |
| D | uncore_nhmex.c | 352 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_bbox_hw_config() local
379 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_bbox_msr_enable_event() local
443 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_sbox_hw_config() local
464 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_sbox_msr_enable_event() local
631 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_mbox_alter_er() local
670 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in nhmex_mbox_get_constraint() local
739 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in nhmex_mbox_put_constraint() local
767 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in nhmex_mbox_hw_config() local
837 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_mbox_msr_enable_event() local
946 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_rbox_alter_er() local
[all …]
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| D | uncore_snbep.c | 489 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in snbep_uncore_msr_enable_event() local
780 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in snbep_cbox_put_constraint() local
798 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in __snbep_cbox_get_constraint() local
865 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in snbep_cbox_hw_config() local
910 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in snbep_pcu_alter_er() local
929 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in snbep_pcu_get_constraint() local
970 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in snbep_pcu_put_constraint() local
983 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in snbep_pcu_hw_config() local
1038 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in snbep_qpi_hw_config() local
1055 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in snbep_qpi_enable_event() local
[all …]
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| D | uncore.c | 122 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in uncore_get_constraint() local
159 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; in uncore_put_constraint() local
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| /arch/s390/kvm/ |
| D | priv.c | 207 int reg1, reg2; in handle_iske() local
239 int reg1, reg2; in handle_rrbe() local
277 int reg1, reg2; in handle_sske() local
793 int reg1, reg2; in handle_epsw() local
821 int reg1, reg2; in handle_pfmf() local
975 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; in kvm_s390_handle_lctl() local
1014 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; in kvm_s390_handle_stctl() local
1048 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; in handle_lctlg() local
1086 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; in handle_stctg() local
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| D | intercept.c | 321 int reg1, reg2, rc; in handle_mvpg_pei() local
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| D | sthyi.c | 403 int reg1, reg2, r = 0; in handle_sthyi() local
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| /arch/sparc/lib/ |
| D | copy_page.S | 37 #define TOUCH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7) \ argument
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| /arch/xtensa/lib/ |
| D | memset.S | 33 #define EX(insn,reg1,reg2,offset,handler) \ argument
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| D | strnlen_user.S | 18 #define EX(insn,reg1,reg2,offset,handler) \ argument
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| D | strncpy_user.S | 19 #define EX(insn,reg1,reg2,offset,handler) \ argument
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| D | usercopy.S | 68 #define EX(insn,reg1,reg2,offset,handler) \ argument
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| /arch/m32r/kernel/ |
| D | align.c | 277 int reg1, reg2; in emu_mul() local
294 int reg1, reg2; in emu_mullo_a0() local
314 int reg1, reg2; in emu_mullo_a1() local
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| D | ptrace.c | 225 unsigned long reg1, reg2; in check_condition_src() local
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| /arch/ia64/include/asm/native/ |
| D | inst.h | 86 #define THASH(pred, reg0, reg1, clob) \ argument
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| /arch/mips/mm/ |
| D | page.c | 105 pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off) in pg_addiu()
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| /arch/ia64/kernel/ |
| D | head.S | 99 #define SET_AREA_FOR_BOOTING_CPU(reg1, reg2) \ argument
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| /arch/arm64/kernel/ |
| D | insn.c | 667 u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1, in aarch64_insn_gen_load_store_pair()
1042 enum aarch64_insn_register reg1, in aarch64_insn_gen_data3()
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| /arch/mips/include/asm/octeon/ |
| D | cvmx-pko.h | 195 uint64_t reg1:11; member
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| /arch/s390/include/asm/ |
| D | processor.h | 292 unsigned int reg1, reg2; in __extract_psw() local
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| /arch/mips/net/ |
| D | bpf_jit.c | 475 static inline void emit_bcond(int cond, unsigned int reg1, unsigned int reg2, in emit_bcond()
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