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Searched defs:sclk (Results 1 – 25 of 96) sorted by relevance

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/drivers/clk/hisilicon/
Dclkgate-separated.c48 struct clkgate_separated *sclk; in clkgate_separated_enable() local
65 struct clkgate_separated *sclk; in clkgate_separated_disable() local
81 struct clkgate_separated *sclk; in clkgate_separated_is_enabled() local
103 struct clkgate_separated *sclk; in hisi_register_clkgate_sep() local
/drivers/clk/
Dclk-u300.c455 static void syscon_block_reset_enable(struct clk_syscon *sclk) in syscon_block_reset_enable()
471 static void syscon_block_reset_disable(struct clk_syscon *sclk) in syscon_block_reset_disable()
489 struct clk_syscon *sclk = to_syscon(hw); in syscon_clk_prepare() local
499 struct clk_syscon *sclk = to_syscon(hw); in syscon_clk_unprepare() local
511 struct clk_syscon *sclk = to_syscon(hw); in syscon_clk_enable() local
526 struct clk_syscon *sclk = to_syscon(hw); in syscon_clk_disable() local
542 struct clk_syscon *sclk = to_syscon(hw); in syscon_clk_is_enabled() local
568 struct clk_syscon *sclk = to_syscon(hw); in syscon_clk_recalc_rate() local
636 struct clk_syscon *sclk = to_syscon(hw); in syscon_clk_round_rate() local
653 struct clk_syscon *sclk = to_syscon(hw); in syscon_clk_set_rate() local
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Dclk-nomadik.c304 struct clk_src *sclk = to_src(hw); in src_clk_enable() local
317 struct clk_src *sclk = to_src(hw); in src_clk_disable() local
329 struct clk_src *sclk = to_src(hw); in src_clk_is_enabled() local
355 struct clk_src *sclk; in src_clk_register() local
Dclk-scpi.c151 struct scpi_clk *sclk, const char *name) in scpi_clk_ops_init()
189 struct scpi_clk *sclk; in scpi_of_clk_src_get() local
225 struct scpi_clk *sclk; in scpi_clk_add() local
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgf100.c67 u32 sclk; in read_pll() local
102 u32 sclk, sctl, sdiv = 2; in read_div() local
138 u32 sclk, sdiv; in read_clk() local
223 u32 sclk; in calc_src() local
Dgk104.c68 u32 sclk; in read_pll() local
121 u32 sclk = read_vco(clk, dsrc + (doff * 4)); in read_div() local
149 u32 sclk, sdiv; in read_clk() local
236 u32 sclk; in calc_src() local
Dgt215.c64 u32 sctl, sdiv, sclk; in read_clk() local
112 u32 sclk = 0, P = 1, N = 1, M = 1; in read_pll() local
188 u32 oclk, sclk, sdiv; in gt215_clk_info() local
/drivers/cpufreq/
Dblackfin-cpufreq.c59 static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk) in bfin_init_tables()
180 unsigned long cclk, sclk; in __bfin_cpu_init() local
/drivers/clk/microchip/
Dclk-core.c779 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_get_rate() local
797 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_set_rate() local
826 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_get_parent() local
842 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_set_parent() local
892 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_init() local
933 struct pic32_sys_clk *sclk; in pic32_sys_clk_register() local
/drivers/gpu/drm/armada/
Darmada_510.c45 const struct drm_display_mode *mode, uint32_t *sclk) in armada510_crtc_compute_clock()
/drivers/gpu/drm/radeon/
Dkv_dpm.c534 u32 index, u32 sclk) in kv_set_divider_value()
2080 u32 sclk, u32 min_sclk_in_sr) in kv_get_sleep_divider_id_from_clock()
2144 u32 sclk, mclk = 0; in kv_apply_state_adjust_rules() local
2616 u32 sclk; in kv_parse_pplib_clock_info() local
2707 u32 sclk; in kv_parse_power_table() local
2806 u32 sclk, tmp; in kv_dpm_debugfs_print_current_performance_level() local
2829 u32 sclk; in kv_dpm_get_current_sclk() local
Drs690.c268 fixed20_12 sclk; member
280 fixed20_12 sclk, core_bandwidth, max_bandwidth; in rs690_crtc_bandwidth_compute() local
Drs780_dpm.c752 u32 sclk; in rs780_parse_pplib_clock_info() local
990 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_debugfs_print_current_performance_level() local
1012 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_get_current_sclk() local
Drv515.c950 fixed20_12 sclk; member
962 fixed20_12 sclk; in rv515_crtc_bandwidth_compute() local
Dradeon_clocks.c38 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local
Dci_dpm.c805 u32 sclk, mclk; in ci_apply_state_adjust_rules() local
2363 u32 sclk, in ci_populate_phase_value_based_on_sclk()
2435 u32 sclk, u32 min_sclk_in_sr) in ci_get_sleep_divider_id_from_clock()
2505 u32 sclk, in ci_populate_memory_timing_parameters()
3143 SMU7_Discrete_GraphicsLevel *sclk) in ci_calculate_sclk_params()
3843 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table() local
3884 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels() local
5599 u32 sclk, mclk; in ci_parse_power_table() local
5913 u32 sclk = ci_get_average_sclk_freq(rdev); in ci_dpm_debugfs_print_current_performance_level() local
5942 u32 sclk = ci_get_average_sclk_freq(rdev); in ci_dpm_get_current_sclk() local
Dtrinity_dpm.c583 u32 index, u32 sclk) in trinity_set_divider_value()
1333 static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk) in trinity_calculate_vce_wm()
1357 u32 sclk, u32 min_sclk_in_sr) in trinity_get_sleep_divider_id_from_clock()
1713 u32 sclk; in trinity_parse_pplib_clock_info() local
1804 u32 sclk; in trinity_parse_power_table() local
/drivers/tty/serial/8250/
D8250_em.c35 struct clk *sclk; member
/drivers/spi/
Dspi-adi-v3.c92 unsigned long sclk; member
130 static u32 hz_to_spi_clock(u32 sclk, u32 speed_hz) in hz_to_spi_clock()
803 struct clk *sclk; in adi_spi_probe() local
/drivers/clocksource/
Dtimer-atmel-st.c199 struct clk *sclk; in atmel_st_timer_init() local
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dhwmgr.c512 uint16_t virtual_voltage_id, int32_t *sclk) in phm_get_sclk_for_voltage_evv()
708 uint32_t sclk, uint16_t id, uint16_t *voltage) in phm_get_voltage_evv_on_sclk()
Dppatomctrl.c609 uint32_t sclk, in atomctrl_calculate_voltage_evv_on_sclk()
1053 uint32_t sclk, uint16_t virtual_voltage_Id, in atomctrl_get_voltage_evv_on_sclk()
1305 uint32_t sclk, uint16_t virtual_voltage_Id, uint32_t *voltage) in atomctrl_get_voltage_evv_on_sclk_ai()
/drivers/gpu/drm/amd/amdgpu/
Dkv_dpm.c664 u32 index, u32 sclk) in kv_set_divider_value()
2171 u32 sclk, u32 min_sclk_in_sr) in kv_get_sleep_divider_id_from_clock()
2234 u32 sclk, mclk = 0; in kv_apply_state_adjust_rules() local
2709 u32 sclk; in kv_parse_pplib_clock_info() local
2800 u32 sclk; in kv_parse_power_table() local
2894 u32 sclk, tmp; in kv_dpm_debugfs_print_current_performance_level() local
/drivers/power/reset/
Dat91-reset.c50 static struct clk *sclk; variable
Dat91-poweroff.c55 static struct clk *sclk; variable

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