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/arch/arm/mach-mmp/
Ddevices.h19 #define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
20 struct pxa_device_desc pxa168_device_##_name __initdata = { \
21 .dev_name = "pxa168-" #_name, \
30 #define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
31 struct pxa_device_desc pxa910_device_##_name __initdata = { \
32 .dev_name = "pxa910-" #_name, \
41 #define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
42 struct pxa_device_desc mmp2_device_##_name __initdata = { \
43 .dev_name = "mmp2-" #_name, \
Dclock.h29 #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ argument
30 struct clk clk_##_name = { \
37 #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ argument
38 struct clk clk_##_name = { \
45 #define APMU_CLK(_name, _reg, _eval, _rate) \ argument
46 struct clk clk_##_name = { \
53 #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ argument
54 struct clk clk_##_name = { \
/arch/x86/include/asm/
Dpercpu.h568 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ argument
569 DEFINE_PER_CPU(_type, _name) = _initvalue; \
570 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
572 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
574 #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \ argument
575 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue; \
576 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
578 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
580 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \ argument
581 EXPORT_PER_CPU_SYMBOL(_name)
[all …]
/arch/powerpc/include/asm/
Dperf_event_server.h148 #define EVENT_ATTR(_name, _id, _suffix) \ argument
149 PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), _id, \
152 #define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g) argument
155 #define CACHE_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _c) argument
158 #define POWER_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _p) argument
/arch/arm/mach-w90x900/
Dclock.h24 #define DEFINE_CLK(_name, _ctrlbit) \ argument
25 struct clk clk_##_name = { \
30 #define DEFINE_SUBCLK(_name, _ctrlbit) \ argument
31 struct clk clk_##_name = { \
Dirq.c41 #define DEFINE_GROUP(_name, _ctrlbit, _num) \ argument
42 struct group_irq group_##_name = { \
/arch/mips/include/asm/mach-ralink/
Dpinmux.h15 #define GRP(_name, _func, _mask, _shift) \ argument
16 { .name = _name, .mask = _mask, .shift = _shift, \
20 #define GRP_G(_name, _func, _mask, _gpio, _shift) \ argument
21 { .name = _name, .mask = _mask, .shift = _shift, \
/arch/arm/include/asm/mach/
Darch.h84 #define MACHINE_START(_type,_name) \ argument
89 .name = _name,
94 #define DT_MACHINE_START(_name, _namestr) \ argument
95 static const struct machine_desc __mach_desc_##_name \
/arch/s390/include/asm/
Dperf_event.h29 #define EVENT_VAR(_cat, _name) event_attr_##_cat##_##_name argument
30 #define EVENT_PTR(_cat, _name) (&EVENT_VAR(_cat, _name).attr.attr) argument
/arch/arm/mach-imx/devices/
Dplatform-imx-ssi.c74 #define DMARES(_name) { \ in imx_add_imx_ssi() argument
75 .name = #_name, \ in imx_add_imx_ssi()
76 .start = data->dma ## _name, \ in imx_add_imx_ssi()
77 .end = data->dma ## _name, \ in imx_add_imx_ssi()
/arch/powerpc/kernel/
Deeh_sysfs.c39 #define EEH_SHOW_ATTR(_name,_memb,_format) \ argument
40 static ssize_t eeh_show_##_name(struct device *dev, \
51 static DEVICE_ATTR(_name, S_IRUGO, eeh_show_##_name, NULL);
/arch/arc/include/asm/
Dmach_desc.h59 #define MACHINE_START(_type, _name) \ argument
63 .name = _name,
/arch/metag/include/asm/mach/
Darch.h77 #define MACHINE_START(_type, _name) \ argument
81 .name = _name,
/arch/mips/include/asm/
Dmips_machine.h25 #define MIPS_MACHINE(_type, _id, _name, _setup) \ argument
27 __aligned(1) = _name; \
/arch/powerpc/perf/
Dpower7-pmu.c56 #define EVENT(_name, _code) \ argument
57 _name = _code,
386 #define EVENT(_name, _code) POWER_EVENT_ATTR(_name, _name); argument
390 #define EVENT(_name, _code) POWER_EVENT_PTR(_name), argument
Dhv-gpci.c80 #define HV_CAPS_ATTR(_name, _format) \ argument
81 static ssize_t _name##_show(struct device *dev, \
90 return sprintf(page, _format, caps._name); \
92 static struct device_attribute hv_caps_attr_##_name = __ATTR_RO(_name)
/arch/sparc/kernel/
Dcpu.c53 #define CPU(ver, _name) \ argument
54 { .psr_vers = ver, .name = _name }
56 #define CPU_PMU(ver, _name, _pmu_name) \ argument
57 { .psr_vers = ver, .name = _name, .pmu_name = _pmu_name }
59 #define FPU(ver, _name) \ argument
60 { .fp_vers = ver, .name = _name }
/arch/arm/mach-ep93xx/
Ddma.c33 #define DMA_CHANNEL(_name, _base, _irq) \ argument
34 { .name = (_name), .base = (_base), .irq = (_irq) }
/arch/s390/kernel/
Dipl.c193 #define IPL_ATTR_SHOW_FN(_prefix, _name, _format, args...) \ argument
194 static ssize_t sys_##_prefix##_##_name##_show(struct kobject *kobj, \
201 #define IPL_ATTR_CCW_STORE_FN(_prefix, _name, _ipl_blk) \ argument
202 static ssize_t sys_##_prefix##_##_name##_store(struct kobject *kobj, \
219 #define DEFINE_IPL_CCW_ATTR_RW(_prefix, _name, _ipl_blk) \ argument
220 IPL_ATTR_SHOW_FN(_prefix, _name, "0.%x.%04x\n", \
222 IPL_ATTR_CCW_STORE_FN(_prefix, _name, _ipl_blk); \
223 static struct kobj_attribute sys_##_prefix##_##_name##_attr = \
224 __ATTR(_name, (S_IRUGO | S_IWUSR), \
225 sys_##_prefix##_##_name##_show, \
[all …]
/arch/powerpc/platforms/cell/
Dcbe_thermal.c62 #define DEVICE_PREFIX_ATTR(_prefix,_name,_mode) \ argument
63 struct device_attribute attr_ ## _prefix ## _ ## _name = { \
64 .attr = { .name = __stringify(_name), .mode = _mode }, \
65 .show = _prefix ## _show_ ## _name, \
66 .store = _prefix ## _store_ ## _name, \
/arch/arm/mm/
Dcache-l2x0-pmu.c347 #define L2X0_EVENT_ATTR(_name, _config, _pl310_only) \ argument
349 .attr = __ATTR(_name, S_IRUGO, l2x0_pmu_event_show, NULL), \
354 #define L220_PLUS_EVENT_ATTR(_name, _config) \ argument
355 L2X0_EVENT_ATTR(_name, _config, false)
357 #define PL310_EVENT_ATTR(_name, _config) \ argument
358 L2X0_EVENT_ATTR(_name, _config, true)
/arch/arm/mach-sa1100/
Dclock.c31 #define DEFINE_CLK(_name, _ops) \ argument
32 struct clk clk_##_name = { \
/arch/arm64/kernel/
Dcpuinfo.c203 #define CPUREGS_ATTR_RO(_name, _field) \ argument
204 static ssize_t _name##_show(struct kobject *kobj, \
214 static struct kobj_attribute cpuregs_attr_##_name = __ATTR_RO(_name)
/arch/avr32/mach-at32ap/
Dat32ap700x.c53 #define NAMED_IRQ(num, _name) \ argument
57 .name = _name, \
64 #define DEFINE_DEV(_name, _id) \ argument
65 static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
66 static struct platform_device _name##_id##_device = { \
67 .name = #_name, \
70 .dma_mask = &_name##_id##_dma_mask, \
73 .resource = _name##_id##_resource, \
74 .num_resources = ARRAY_SIZE(_name##_id##_resource), \
76 #define DEFINE_DEV_DATA(_name, _id) \ argument
[all …]
/arch/ia64/kernel/
Dtopology.c248 #define define_one_ro(_name) \ argument
249 static struct cache_attr _name = \
250 __ATTR(_name, 0444, show_##_name, NULL)

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