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Searched refs:caps (Results 1 – 25 of 30) sorted by relevance

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/arch/powerpc/perf/
Dhv-common.c7 unsigned long hv_perf_caps_get(struct hv_perf_caps *caps) in hv_perf_caps_get() argument
12 struct hv_gpci_system_performance_capabilities caps; in hv_perf_caps_get() member
30 pr_devel("capability_mask: 0x%x\n", arg.caps.capability_mask); in hv_perf_caps_get()
32 caps->version = arg.params.counter_info_version_out; in hv_perf_caps_get()
33 caps->collect_privileged = !!arg.caps.perf_collect_privileged; in hv_perf_caps_get()
34 caps->ga = !!(arg.caps.capability_mask & HV_GPCI_CM_GA); in hv_perf_caps_get()
35 caps->expanded = !!(arg.caps.capability_mask & HV_GPCI_CM_EXPANDED); in hv_perf_caps_get()
36 caps->lab = !!(arg.caps.capability_mask & HV_GPCI_CM_LAB); in hv_perf_caps_get()
Dhv-gpci.c85 struct hv_perf_caps caps; \
86 unsigned long hret = hv_perf_caps_get(&caps); \
90 return sprintf(page, _format, caps._name); \
294 struct hv_perf_caps caps; in hv_gpci_init() local
303 hret = hv_perf_caps_get(&caps); in hv_gpci_init()
Dhv-common.h16 unsigned long hv_perf_caps_get(struct hv_perf_caps *caps);
Dhv-24x7.c1177 struct hv_perf_caps caps; in h_24x7_event_init() local
1226 hret = hv_perf_caps_get(&caps); in h_24x7_event_init()
1233 if (!caps.collect_privileged && (is_physical_domain(domain) || in h_24x7_event_init()
1478 struct hv_perf_caps caps; in hv_24x7_init() local
1485 hret = hv_perf_caps_get(&caps); in hv_24x7_init()
/arch/arm64/kernel/
Dcpufeature.c1025 const struct arm64_cpu_capabilities *caps; in __this_cpu_has_cap() local
1030 for (caps = cap_array; caps->matches; caps++) in __this_cpu_has_cap()
1031 if (caps->capability == cap && in __this_cpu_has_cap()
1032 caps->matches(caps, SCOPE_LOCAL_CPU)) in __this_cpu_has_cap()
1037 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps, in update_cpu_capabilities() argument
1040 for (; caps->matches; caps++) { in update_cpu_capabilities()
1041 if (!caps->matches(caps, caps->def_scope)) in update_cpu_capabilities()
1044 if (!cpus_have_cap(caps->capability) && caps->desc) in update_cpu_capabilities()
1045 pr_info("%s %s\n", info, caps->desc); in update_cpu_capabilities()
1046 cpus_set_cap(caps->capability); in update_cpu_capabilities()
[all …]
Dcpu_errata.c324 const struct arm64_cpu_capabilities *caps = arm64_errata; in verify_local_cpu_errata_workarounds() local
326 for (; caps->matches; caps++) { in verify_local_cpu_errata_workarounds()
327 if (cpus_have_cap(caps->capability)) { in verify_local_cpu_errata_workarounds()
328 if (caps->enable) in verify_local_cpu_errata_workarounds()
329 caps->enable((void *)caps); in verify_local_cpu_errata_workarounds()
330 } else if (caps->matches(caps, SCOPE_LOCAL_CPU)) { in verify_local_cpu_errata_workarounds()
334 caps->desc ? : "an erratum"); in verify_local_cpu_errata_workarounds()
/arch/arm/mach-omap2/
Dhsmmc.c173 if (mmc_controller->caps & in omap_hsmmc_mux()
182 if (mmc_controller->caps & in omap_hsmmc_mux()
207 if (mmc_controller->caps & in omap_hsmmc_mux()
216 if (mmc_controller->caps & in omap_hsmmc_mux()
253 mmc->caps = c->caps; in omap_hsmmc_pdata_init()
309 (c->caps & MMC_CAP_8_BIT_DATA)) { in omap_hsmmc_pdata_init()
310 c->caps &= ~MMC_CAP_8_BIT_DATA; in omap_hsmmc_pdata_init()
311 c->caps |= MMC_CAP_4_BIT_DATA; in omap_hsmmc_pdata_init()
312 mmc->caps = c->caps; in omap_hsmmc_pdata_init()
321 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) { in omap_hsmmc_pdata_init()
[all …]
Dhsmmc.h13 u32 caps; /* 4/8 wires and any additional host member
Dpdata-quirks.c368 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
/arch/sh/drivers/dma/
Ddma-api.c131 int request_dma_bycap(const char **dmac, const char **caps, const char *dev_id) in request_dma_bycap() argument
138 BUG_ON(!dmac || !caps); in request_dma_bycap()
152 if (unlikely(!channel->caps)) in request_dma_bycap()
155 for (p = caps; *p; p++) { in request_dma_bycap()
156 if (!search_cap(channel->caps, *p)) in request_dma_bycap()
246 int register_chan_caps(const char *dmac, struct dma_chan_caps *caps) in register_chan_caps() argument
261 for (i = 0; i < info->nr_channels; i++, caps++) { in register_chan_caps()
264 if ((info->first_channel_nr + i) != caps->ch_num) in register_chan_caps()
268 channel->caps = caps->caplist; in register_chan_caps()
/arch/sparc/kernel/
Dsetup_64.c398 unsigned long caps = sparc64_elf_hwcap; in cpucap_info() local
404 if (hwcaps[i] && (caps & bit)) { in cpucap_info()
410 if (caps & HWCAP_SPARC_CRYPTO) { in cpucap_info()
452 static void __init report_hwcaps(unsigned long caps) in report_hwcaps() argument
458 if (hwcaps[i] && (caps & bit)) in report_hwcaps()
461 if (caps & HWCAP_SPARC_CRYPTO) in report_hwcaps()
470 unsigned long caps = 0; in mdesc_cpu_hwcap_list() local
494 caps |= bit; in mdesc_cpu_hwcap_list()
500 caps |= HWCAP_SPARC_CRYPTO; in mdesc_cpu_hwcap_list()
510 return caps; in mdesc_cpu_hwcap_list()
/arch/arm64/include/asm/
Dcpufeature.h78 bool (*matches)(const struct arm64_cpu_capabilities *caps, int scope);
185 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
187 void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
/arch/x86/events/amd/
Dibs.c104 u32 caps; member
616 ibs_data.caps = ibs_caps; in perf_ibs_handle_irq()
755 u32 caps; in __get_ibs_caps() local
766 caps = cpuid_eax(IBS_CPUID_FEATURES); in __get_ibs_caps()
767 if (!(caps & IBS_CAPS_AVAIL)) in __get_ibs_caps()
771 return caps; in __get_ibs_caps()
992 u32 caps; in amd_ibs_init() local
994 caps = __get_ibs_caps(); in amd_ibs_init()
995 if (!caps) in amd_ibs_init()
1005 ibs_caps = caps; in amd_ibs_init()
/arch/sh/include/asm/
Ddma.h78 const char **caps; member
125 extern int request_dma_bycap(const char **dmac, const char **caps,
/arch/arm/mach-nspire/
Dclcd.c39 .caps = CLCD_CAP_565,
62 .caps = CLCD_CAP_5551,
Dnspire.c43 .caps = CLCD_CAP_5551 | CLCD_CAP_565,
/arch/arm/mach-integrator/
Dimpd1.c96 .caps = CLCD_CAP_5551,
125 .caps = CLCD_CAP_5551,
152 .caps = CLCD_CAP_5551,
184 .caps = CLCD_CAP_5551,
258 .caps = CLCD_CAP_5551 | CLCD_CAP_888,
/arch/x86/events/intel/
Dpt.h111 u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES]; member
Dpt.c87 u32 c = pt_pmu.caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg]; in pt_cap_get()
222 &pt_pmu.caps[CR_EAX + i*PT_CPUID_REGS_NUM], in pt_pmu_hw_init()
223 &pt_pmu.caps[CR_EBX + i*PT_CPUID_REGS_NUM], in pt_pmu_hw_init()
224 &pt_pmu.caps[CR_ECX + i*PT_CPUID_REGS_NUM], in pt_pmu_hw_init()
225 &pt_pmu.caps[CR_EDX + i*PT_CPUID_REGS_NUM]); in pt_pmu_hw_init()
/arch/arm/mach-davinci/
Dboard-dm355-leopard.c203 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
Dboard-omapl138-hawk.c140 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
Dboard-dm355-evm.c343 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
/arch/arm/boot/dts/
Domap4.dtsi696 hw-caps-read-idle-ctrl;
697 hw-caps-ll-interface;
698 hw-caps-temp-alert;
708 hw-caps-read-idle-ctrl;
709 hw-caps-ll-interface;
710 hw-caps-temp-alert;
Domap5.dtsi841 hw-caps-read-idle-ctrl;
842 hw-caps-ll-interface;
843 hw-caps-temp-alert;
853 hw-caps-read-idle-ctrl;
854 hw-caps-ll-interface;
855 hw-caps-temp-alert;
/arch/arm/mach-versatile/
Dversatile_dt.c245 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,

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