/arch/openrisc/kernel/ |
D | dma.c | 34 unsigned long cl; in page_set_nocache() local 45 for (cl = __pa(addr); cl < __pa(next); cl += cpuinfo.dcache_block_size) in page_set_nocache() 46 mtspr(SPR_DCBFR, cl); in page_set_nocache() 141 unsigned long cl; in or1k_map_page() local 147 for (cl = addr; cl < addr + size; in or1k_map_page() 148 cl += cpuinfo.dcache_block_size) in or1k_map_page() 149 mtspr(SPR_DCBFR, cl); in or1k_map_page() 153 for (cl = addr; cl < addr + size; in or1k_map_page() 154 cl += cpuinfo.dcache_block_size) in or1k_map_page() 155 mtspr(SPR_DCBIR, cl); in or1k_map_page() [all …]
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/arch/sh/kernel/ |
D | process_64.c | 40 unsigned long long ah, al, bh, bl, ch, cl; in show_regs() local 50 cl = (regs->regs[15]) & 0xffffffff; in show_regs() 52 ah, al, bh, bl, ch, cl); in show_regs() 61 asm volatile ("getcon " __KCR0 ", %0" : "=r" (cl)); in show_regs() 63 cl = (cl) & 0xffffffff; in show_regs() 65 ah, al, bh, bl, ch, cl); in show_regs() 72 cl = (regs->regs[2]) & 0xffffffff; in show_regs() 74 ah, al, bh, bl, ch, cl); in show_regs() 81 cl = (regs->regs[5]) & 0xffffffff; in show_regs() 83 ah, al, bh, bl, ch, cl); in show_regs() [all …]
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/arch/x86/math-emu/ |
D | wm_shrx.S | 49 shrd %cl,%ebx,%eax 50 shrd %cl,%edx,%ebx 51 shr %cl,%edx 63 subb $32,%cl 66 shrd %cl,%edx,%eax 67 shr %cl,%edx 78 subb $64,%cl 80 shr %cl,%eax 129 subb $32,%cl 133 shrd %cl,%eax,%ebx [all …]
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D | shr_Xsig.S | 38 shrd %cl,%ebx,%eax 39 shrd %cl,%edx,%ebx 40 shr %cl,%edx 53 subb $32,%cl 56 shrd %cl,%edx,%eax 57 shr %cl,%edx 69 subb $64,%cl 71 shr %cl,%eax
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D | reg_u_sub.S | 82 shrd %cl,%ebx,%edx 83 shrd %cl,%eax,%ebx 84 shr %cl,%eax 91 subb $32,%cl 94 shrd %cl,%eax,%edx 95 shr %cl,%eax 222 shld %cl,%ebx,%eax 223 shld %cl,%edx,%ebx 224 shl %cl,%edx
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D | round_Xsig.S | 55 shld %cl,%ebx,%edx 56 shld %cl,%eax,%ebx 57 shl %cl,%eax 126 shld %cl,%ebx,%edx 127 shld %cl,%eax,%ebx 128 shl %cl,%eax
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D | reg_u_add.S | 82 shrd %cl,%ebx,%edx 83 shrd %cl,%eax,%ebx 84 shr %cl,%eax 91 subb $32,%cl 94 shrd %cl,%eax,%edx 95 shr %cl,%eax
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D | reg_round.S | 475 testb CW_Underflow,%cl /* Underflow mask. */ 499 shrd %cl,%ebx,%edx 500 shrd %cl,%eax,%ebx 501 shr %cl,%eax 509 subb $32,%cl 514 shrd %cl,%ebx,%edx 515 shrd %cl,%eax,%ebx 516 shr %cl,%eax 518 setne %cl 520 orb %cl,%bl [all …]
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D | reg_norm.S | 50 shld %cl,%eax,%edx 51 shl %cl,%eax 127 shld %cl,%eax,%edx 128 shl %cl,%eax
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/arch/arm64/include/asm/ |
D | atomic_lse.h | 49 #define ATOMIC_FETCH_OP(name, mb, op, asm_op, cl...) \ in ATOMIC_OP() argument 62 : __LL_SC_CLOBBERS, ##cl); \ in ATOMIC_OP() 81 #define ATOMIC_OP_ADD_RETURN(name, mb, cl...) \ argument 96 : __LL_SC_CLOBBERS, ##cl); \ 125 #define ATOMIC_FETCH_OP_AND(name, mb, cl...) \ argument 140 : __LL_SC_CLOBBERS, ##cl); \ 169 #define ATOMIC_OP_SUB_RETURN(name, mb, cl...) \ argument 185 : __LL_SC_CLOBBERS , ##cl); \ 197 #define ATOMIC_FETCH_OP_SUB(name, mb, cl...) \ argument 212 : __LL_SC_CLOBBERS, ##cl); \ [all …]
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D | atomic_ll_sc.h | 58 #define ATOMIC_OP_RETURN(name, mb, acq, rel, cl, op, asm_op) \ argument 74 : cl); \ 80 #define ATOMIC_FETCH_OP(name, mb, acq, rel, cl, op, asm_op) \ argument 96 : cl); \ 152 #define ATOMIC64_OP_RETURN(name, mb, acq, rel, cl, op, asm_op) \ argument 168 : cl); \ 174 #define ATOMIC64_FETCH_OP(name, mb, acq, rel, cl, op, asm_op) \ argument 190 : cl); \ 251 #define __CMPXCHG_CASE(w, sz, name, mb, acq, rel, cl) \ argument 272 : cl); \ [all …]
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/arch/mips/ralink/ |
D | clk.c | 20 struct clk_lookup cl; member 31 clk->cl.dev_id = dev; in ralink_clk_add() 32 clk->cl.clk = clk; in ralink_clk_add() 36 clkdev_add(&clk->cl); in ralink_clk_add()
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/arch/mips/lantiq/xway/ |
D | sysctrl.c | 334 clk->cl.dev_id = dev; in clkdev_add_pmu() 335 clk->cl.con_id = con; in clkdev_add_pmu() 336 clk->cl.clk = clk; in clkdev_add_pmu() 348 clkdev_add(&clk->cl); in clkdev_add_pmu() 357 clk->cl.dev_id = dev; in clkdev_add_cgu() 358 clk->cl.con_id = con; in clkdev_add_cgu() 359 clk->cl.clk = clk; in clkdev_add_cgu() 363 clkdev_add(&clk->cl); in clkdev_add_cgu() 375 clk->cl.dev_id = "17000000.pci"; in clkdev_add_pci() 376 clk->cl.con_id = NULL; in clkdev_add_pci() [all …]
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D | gptu.c | 127 clk->cl.dev_id = dev_name(dev); in clkdev_add_gptu() 128 clk->cl.con_id = con; in clkdev_add_gptu() 129 clk->cl.clk = clk; in clkdev_add_gptu() 133 clkdev_add(&clk->cl); in clkdev_add_gptu()
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/arch/s390/kernel/vdso32/ |
D | clock_gettime.S | 59 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */ 64 cl %r1,20f-6b(%r5) 83 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */ 93 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */ 122 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */ 127 cl %r1,20f-15b(%r5)
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D | gettimeofday.S | 52 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */ 60 cl %r1,11f-6b(%r5)
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/arch/arm/boot/dts/ |
D | imx7d-sbc-imx7.dts | 13 #include "imx7d-cl-som-imx7.dts" 17 compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
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/arch/x86/kernel/ |
D | relocate_kernel_64.S | 224 testb $0x1, %cl /* is it a destination page? */ 230 testb $0x2, %cl /* is it an indirection page? */ 236 testb $0x4, %cl /* is it the done indicator? */ 240 testb $0x8, %cl /* is it the source indicator? */
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D | relocate_kernel_32.S | 229 testb $0x1, %cl /* is it a destination page */ 235 testb $0x2, %cl /* is it an indirection page */ 241 testb $0x4, %cl /* is it the done indicator */ 245 testb $0x8, %cl /* is it the source indicator */
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/arch/mips/lantiq/falcon/ |
D | sysctrl.c | 172 clk->cl.dev_id = dev; in clkdev_add_sys() 173 clk->cl.con_id = NULL; in clkdev_add_sys() 174 clk->cl.clk = clk; in clkdev_add_sys() 182 clkdev_add(&clk->cl); in clkdev_add_sys()
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/arch/mips/lantiq/ |
D | clk.c | 93 clk->cl.dev_id, clk->cl.con_id, rate); in clk_set_rate()
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D | clk.h | 61 struct clk_lookup cl; member
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/arch/x86/boot/ |
D | edd.c | 114 ei->legacy_max_cylinder = oreg.ch + ((oreg.cl & 0xc0) << 2); in get_edd_info() 116 ei->legacy_sectors_per_track = oreg.cl & 0x3f; in get_edd_info()
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/arch/um/include/shared/ |
D | os.h | 66 unsigned int cl : 1; /* FD_CLOEXEC */ member 70 .t = 0, .a = 0, .e = 0, .cl = 0 }) 128 flags.cl = 1; in of_cloexec()
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/arch/x86/crypto/ |
D | blowfish-x86_64-asm_64.S | 51 #define RX2bl %cl 148 test %cl, %cl;
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