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Searched refs:ev (Results 1 – 21 of 21) sorted by relevance

/arch/x86/events/amd/
Diommu.c24 #define _GET_BANK(ev) ((u8)(ev->hw.extra_reg.reg >> 8)) argument
25 #define _GET_CNTR(ev) ((u8)(ev->hw.extra_reg.reg)) argument
28 #define _GET_CSOURCE(ev) ((ev->hw.config & 0xFFULL)) argument
29 #define _GET_DEVID(ev) ((ev->hw.config >> 8) & 0xFFFFULL) argument
30 #define _GET_PASID(ev) ((ev->hw.config >> 24) & 0xFFFFULL) argument
31 #define _GET_DOMID(ev) ((ev->hw.config >> 40) & 0xFFFFULL) argument
32 #define _GET_DEVID_MASK(ev) ((ev->hw.extra_reg.config) & 0xFFFFULL) argument
33 #define _GET_PASID_MASK(ev) ((ev->hw.extra_reg.config >> 16) & 0xFFFFULL) argument
34 #define _GET_DOMID_MASK(ev) ((ev->hw.extra_reg.config >> 32) & 0xFFFFULL) argument
255 static void perf_iommu_enable_event(struct perf_event *ev) in perf_iommu_enable_event() argument
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/arch/s390/appldata/
Dappldata_mem.c82 unsigned long ev[NR_VM_EVENT_ITEMS]; in appldata_get_mem_data() local
88 all_vm_events(ev); in appldata_get_mem_data()
89 mem_data->pgpgin = ev[PGPGIN] >> 1; in appldata_get_mem_data()
90 mem_data->pgpgout = ev[PGPGOUT] >> 1; in appldata_get_mem_data()
91 mem_data->pswpin = ev[PSWPIN]; in appldata_get_mem_data()
92 mem_data->pswpout = ev[PSWPOUT]; in appldata_get_mem_data()
93 mem_data->pgalloc = ev[PGALLOC_NORMAL]; in appldata_get_mem_data()
94 mem_data->pgalloc += ev[PGALLOC_DMA]; in appldata_get_mem_data()
95 mem_data->pgfault = ev[PGFAULT]; in appldata_get_mem_data()
96 mem_data->pgmajfault = ev[PGMAJFAULT]; in appldata_get_mem_data()
/arch/arm64/crypto/
Dsha1-ce-core.S37 .macro add_only, op, ev, rc, s0, dg1
38 .ifc \ev, ev
55 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
57 add_only \op, \ev, \rc, \s1, \dg1
100 add_update c, ev, k0, 8, 9, 10, 11, dgb
102 add_update c, ev, k0, 10, 11, 8, 9
104 add_update c, ev, k1, 8, 9, 10, 11
107 add_update p, ev, k1, 10, 11, 8, 9
109 add_update p, ev, k1, 8, 9, 10, 11
112 add_update m, ev, k2, 10, 11, 8, 9
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Dsha2-ce-core.S32 .macro add_only, ev, rc, s0
34 .ifeq \ev
47 .macro add_update, ev, rc, s0, s1, s2, s3
49 add_only \ev, \rc, \s1
/arch/arm/crypto/
Dsha2-ce-core.S34 .macro add_only, ev, s0
37 vld1.32 {k\ev}, [rk, :128]!
39 sha256h.32 dg0, dg1, tb\ev
40 sha256h2.32 dg1, dg2, tb\ev
42 vadd.u32 ta\ev, q\s0, k\ev
46 .macro add_update, ev, s0, s1, s2, s3
48 add_only \ev, \s1
Dsha1-ce-core.S38 .macro add_only, op, ev, rc, s0, dg1
40 vadd.u32 tb\ev, q\s0, \rc
42 sha1h.32 dg1b\ev, dg0
44 sha1\op\().32 dg0, dg1a\ev, ta\ev
46 sha1\op\().32 dg0, \dg1, ta\ev
50 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
52 add_only \op, \ev, \rc, \s1, \dg1
/arch/x86/lib/
Dx86-opcode-map.txt25 # (ev): this opcode requires EVEX prefix.
455 …Vx,Wx (66),(evo) | vmovdqu Vx,Wx (F3) | vmovdqu32/64 Vx,Wx (F3),(evo) | vmovdqu8/16 Vx,Wx (F2),(ev)
466 …dq Vx,Wpd (evo) | vcvttsd2usi Gv,Wx (F2),(ev) | vcvttss2usi Gv,Wx (F3),(ev) | vcvttps2uqq/pd2uqq V…
467 …2udq Vx,Wpd (evo) | vcvtsd2usi Gv,Wx (F2),(ev) | vcvtss2usi Gv,Wx (F3),(ev) | vcvtps2uqq/pd2uqq Vx…
468 7a: vcvtudq2pd/uqq2pd Vpd,Wx (F3),(ev) | vcvtudq2ps/uqq2ps Vpd,Wx (F2),(ev) | vcvttps2qq/pd2qq Vx,W…
469 7b: vcvtusi2sd Vpd,Hpd,Ev (F2),(ev) | vcvtusi2ss Vps,Hps,Ev (F3),(ev) | vcvtps2qq/pd2qq Vx,Wx (66),…
473 …Wx,Vx (66),(evo) | vmovdqu Wx,Vx (F3) | vmovdqu32/64 Wx,Vx (F3),(evo) | vmovdqu8/16 Wx,Vx (F2),(ev)
634 10: pblendvb Vdq,Wdq (66) | vpsrlvw Vx,Hx,Wx (66),(evo) | vpmovuswb Wx,Vx (F3),(ev)
635 11: vpmovusdb Wx,Vd (F3),(ev) | vpsravw Vx,Hx,Wx (66),(ev)
636 12: vpmovusqb Wx,Vq (F3),(ev) | vpsllvw Vx,Hx,Wx (66),(ev)
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/arch/powerpc/perf/
Dmpc7450-pmu.c272 u32 ev, pmc, thresh; in mpc7450_compute_mmcr() local
291 ev = event[event_index[class][i]]; in mpc7450_compute_mmcr()
293 pmc = (ev >> PM_PMC_SH) & PM_PMC_MSK; in mpc7450_compute_mmcr()
305 tuse = mpc7450_threshold_use(ev); in mpc7450_compute_mmcr()
307 thresh = (ev >> PM_THRESH_SH) & PM_THRESH_MSK; in mpc7450_compute_mmcr()
309 if (tuse == 2 && (ev & PM_THRMULT_MSKS)) in mpc7450_compute_mmcr()
312 ev &= pmcsel_mask[pmc - 1]; in mpc7450_compute_mmcr()
313 ev <<= pmcsel_shift[pmc - 1]; in mpc7450_compute_mmcr()
315 mmcr0 |= ev; in mpc7450_compute_mmcr()
317 mmcr1 |= ev; in mpc7450_compute_mmcr()
Dcore-fsl-emb.c462 int ev; in hw_perf_cache_event() local
477 ev = (*ppmu->cache_events)[type][op][result]; in hw_perf_cache_event()
478 if (ev == 0) in hw_perf_cache_event()
480 if (ev == -1) in hw_perf_cache_event()
482 *eventp = ev; in hw_perf_cache_event()
488 u64 ev; in fsl_emb_pmu_event_init() local
503 ev = event->attr.config; in fsl_emb_pmu_event_init()
504 if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0) in fsl_emb_pmu_event_init()
506 ev = ppmu->generic_events[ev]; in fsl_emb_pmu_event_init()
510 err = hw_perf_cache_event(event->attr.config, &ev); in fsl_emb_pmu_event_init()
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Dpower6-pmu.c183 unsigned int pmc, ev, b, u, s, psel; in p6_compute_mmcr() local
198 ev = event[i]; in p6_compute_mmcr()
199 pmc = (ev >> PM_PMC_SH) & PM_PMC_MSK; in p6_compute_mmcr()
212 psel = ev & PM_PMCSEL_MSK; in p6_compute_mmcr()
213 if (ev & PM_BUSEVENT_MSK) { in p6_compute_mmcr()
215 b = (ev >> PM_BYTE_SH) & PM_BYTE_MSK; in p6_compute_mmcr()
216 u = (ev >> PM_UNIT_SH) & PM_UNIT_MSK; in p6_compute_mmcr()
224 s = (ev >> PM_SUBUNIT_SH) & PM_SUBUNIT_MSK; in p6_compute_mmcr()
240 if (ev & PM_LLA) { in p6_compute_mmcr()
242 if (ev & PM_LLAV) in p6_compute_mmcr()
Dhv-24x7.c169 static char *event_name(struct hv_24x7_event_data *ev, int *len) in event_name() argument
171 *len = be16_to_cpu(ev->event_name_len) - 2; in event_name()
172 return (char *)ev->remainder; in event_name()
175 static char *event_desc(struct hv_24x7_event_data *ev, int *len) in event_desc() argument
177 unsigned nl = be16_to_cpu(ev->event_name_len); in event_desc()
178 __be16 *desc_len = (__be16 *)(ev->remainder + nl - 2); in event_desc()
181 return (char *)ev->remainder + nl; in event_desc()
184 static char *event_long_desc(struct hv_24x7_event_data *ev, int *len) in event_long_desc() argument
186 unsigned nl = be16_to_cpu(ev->event_name_len); in event_long_desc()
187 __be16 *desc_len_ = (__be16 *)(ev->remainder + nl - 2); in event_long_desc()
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Dcore-book3s.c1675 static int can_go_on_limited_pmc(struct perf_event *event, u64 ev, in can_go_on_limited_pmc() argument
1687 if (ppmu->limited_pmc_event(ev)) in can_go_on_limited_pmc()
1698 n = ppmu->get_alternatives(ev, flags, alt); in can_go_on_limited_pmc()
1708 static u64 normal_pmc_alternative(u64 ev, unsigned long flags) in normal_pmc_alternative() argument
1714 n = ppmu->get_alternatives(ev, flags, alt); in normal_pmc_alternative()
1744 int ev; in hw_perf_cache_event() local
1759 ev = (*ppmu->cache_events)[type][op][result]; in hw_perf_cache_event()
1760 if (ev == 0) in hw_perf_cache_event()
1762 if (ev == -1) in hw_perf_cache_event()
1764 *eventp = ev; in hw_perf_cache_event()
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/arch/s390/kernel/
Dperf_cpum_cf.c334 u64 ev; in __hw_perf_event_init() local
343 ev = attr->config; in __hw_perf_event_init()
347 ev = attr->config; in __hw_perf_event_init()
350 if (ev >= ARRAY_SIZE(cpumf_generic_events_user)) in __hw_perf_event_init()
352 ev = cpumf_generic_events_user[ev]; in __hw_perf_event_init()
360 if (ev >= ARRAY_SIZE(cpumf_generic_events_basic)) in __hw_perf_event_init()
362 ev = cpumf_generic_events_basic[ev]; in __hw_perf_event_init()
370 if (ev == -1) in __hw_perf_event_init()
373 if (ev >= PERF_CPUM_CF_MAX_CTR) in __hw_perf_event_init()
381 hwc->config = ev; in __hw_perf_event_init()
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/arch/xtensa/kernel/
Dperf_event.c286 struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events); in xtensa_pmu_add() local
290 if (__test_and_set_bit(idx, ev->used_mask)) { in xtensa_pmu_add()
291 idx = find_first_zero_bit(ev->used_mask, in xtensa_pmu_add()
296 __set_bit(idx, ev->used_mask); in xtensa_pmu_add()
299 ev->event[idx] = event; in xtensa_pmu_add()
312 struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events); in xtensa_pmu_del() local
315 __clear_bit(event->hw.idx, ev->used_mask); in xtensa_pmu_del()
365 struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events); in xtensa_pmu_irq_handler() local
368 for (i = find_first_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS); in xtensa_pmu_irq_handler()
370 i = find_next_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS, i + 1)) { in xtensa_pmu_irq_handler()
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/arch/sh/kernel/
Dperf_event.c97 int ev; in hw_perf_cache_event() local
112 ev = (*sh_pmu->cache_events)[type][op][result]; in hw_perf_cache_event()
113 if (ev == 0) in hw_perf_cache_event()
115 if (ev == -1) in hw_perf_cache_event()
117 *evp = ev; in hw_perf_cache_event()
/arch/blackfin/kernel/
Dperf_event.c239 int ev; in hw_perf_cache_event() local
251 ev = cache_events[type][op][result]; in hw_perf_cache_event()
252 if (ev == 0) in hw_perf_cache_event()
254 if (ev == -1) in hw_perf_cache_event()
256 *evp = ev; in hw_perf_cache_event()
/arch/x86/oprofile/
Dop_model_p4.c512 struct p4_event_binding *ev = NULL; in pmc_setup_one_p4_counter() local
528 ev = &(p4_events[counter_config[ctr].event - 1]); in pmc_setup_one_p4_counter()
531 if (ev->bindings[i].virt_counter & counter_bit) { in pmc_setup_one_p4_counter()
534 rdmsr(ev->bindings[i].escr_address, escr, high); in pmc_setup_one_p4_counter()
543 ESCR_SET_EVENT_SELECT(escr, ev->event_select); in pmc_setup_one_p4_counter()
545 wrmsr(ev->bindings[i].escr_address, escr, high); in pmc_setup_one_p4_counter()
552 CCCR_SET_ESCR_SELECT(cccr, ev->escr_select); in pmc_setup_one_p4_counter()
/arch/alpha/kernel/
Dperf_event.c608 int ev; in __hw_perf_event_init() local
617 ev = alpha_pmu->event_map[attr->config]; in __hw_perf_event_init()
623 ev = attr->config; in __hw_perf_event_init()
628 if (ev < 0) { in __hw_perf_event_init()
629 return ev; in __hw_perf_event_init()
647 hwc->event_base = ev; in __hw_perf_event_init()
/arch/metag/kernel/perf/
Dperf_event.c517 int ev; in _hw_perf_cache_event() local
532 ev = (*metag_pmu->cache_events)[type][op][result]; in _hw_perf_cache_event()
533 if (ev == 0) in _hw_perf_cache_event()
535 if (ev == -1) in _hw_perf_cache_event()
537 *evp = ev; in _hw_perf_cache_event()
/arch/parisc/kernel/
Dsyscall.S121 or,ev %r1,%r30,%r30
474 or,ev %r1,%r30,%r30
/arch/powerpc/platforms/
DKconfig.cputype373 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors