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/arch/blackfin/include/asm/
Dtraps.h52 #define HWC_x2(level) \ argument
54 level " - An error occurred due to an invalid access to an System MMR location\n" \
55 level " Possible reason: a 32-bit register is accessed with a 16-bit instruction\n" \
56 level " or a 16-bit register is accessed with a 32-bit instruction.\n"
57 #define HWC_x3(level) \ argument
59 #define EXC_0x04(level) \ argument
61 level " - Maybe you forgot to install a custom exception handler?\n"
62 #define HWC_x12(level) \ argument
64 #define HWC_x18(level) \ argument
66 level " Software issued a RAISE 5 instruction to invoke the Hardware\n"
[all …]
Dftrace.h34 extern inline void *return_address(unsigned int level) in return_address() argument
39 if (level == 0) in return_address()
43 endstack = (unsigned long *)PAGE_ALIGN((unsigned long)&level); in return_address()
46 (fp + 1) < endstack && current_level < level) { in return_address()
62 extern inline void *return_address(unsigned int level) in return_address() argument
/arch/sparc/include/uapi/asm/
Dtraps.h100 #define BAD_TRAP_P(level) \ argument
101 ((level > SP_TRAP_WDOG && level < SP_TRAP_IRQ1) || \
102 (level > SP_TRAP_IACC && level < SP_TRAP_CPDIS) || \
103 (level > SP_TRAP_BADFL && level < SP_TRAP_CPEXP) || \
104 (level > SP_TRAP_DMM && level < SP_TRAP_IMM) || \
105 (level > SP_TRAP_IMM && level < SP_TRAP_SUNOS) || \
106 (level > SP_TRAP_LINUX && level < SP_TRAP_KBPT1))
109 #define HW_TRAP_P(level) ((level > 0) && (level < SP_TRAP_SUNOS)) argument
112 #define SW_TRAP_P(level) ((level >= SP_TRAP_SUNOS) && (level <= SP_TRAP_KBPT2)) argument
115 #define SCALL_TRAP_P(level) ((level == SP_TRAP_SUNOS) || \ argument
[all …]
/arch/arm64/kernel/
Dcacheinfo.c31 #define CLIDR_CTYPE_SHIFT(level) (3 * (level - 1)) argument
32 #define CLIDR_CTYPE_MASK(level) (7 << CLIDR_CTYPE_SHIFT(level)) argument
33 #define CLIDR_CTYPE(clidr, level) \ argument
34 (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))
36 static inline enum cache_type get_cache_type(int level) in get_cache_type() argument
40 if (level > MAX_CACHE_LEVEL) in get_cache_type()
43 return CLIDR_CTYPE(clidr, level); in get_cache_type()
66 enum cache_type type, unsigned int level) in ci_leaf_init() argument
69 u64 tmp = cache_get_ccsidr((level - 1) << 1 | is_icache); in ci_leaf_init()
71 this_leaf->level = level; in ci_leaf_init()
[all …]
Dreturn_address.c19 unsigned int level; member
27 if (!data->level) { in save_return_addr()
31 --data->level; in save_return_addr()
36 void *return_address(unsigned int level) in return_address() argument
41 data.level = level + 2; in return_address()
53 if (!data.level) in return_address()
/arch/sparc/kernel/
Dcpumap.c33 int level; member
51 struct cpuinfo_level level[CPUINFO_LVL_MAX]; member
95 static int cpuinfo_id(int cpu, int level) in cpuinfo_id() argument
99 switch (level) { in cpuinfo_id()
192 int n, id, cpu, prev_cpu, last_cpu, level; in build_cpuinfo_tree() local
202 memcpy(&new_tree->level, tmp_level, sizeof(tmp_level)); in build_cpuinfo_tree()
207 for (level = CPUINFO_LVL_PROC; level >= CPUINFO_LVL_ROOT; level--) { in build_cpuinfo_tree()
208 n = new_tree->level[level].start_index; in build_cpuinfo_tree()
210 level_rover[level] = n; in build_cpuinfo_tree()
213 id = cpuinfo_id(cpu, level); in build_cpuinfo_tree()
[all …]
/arch/s390/include/asm/
Ddebug.h36 int level; member
88 debug_entry_t* debug_event_common(debug_info_t* id, int level,
91 debug_entry_t* debug_exception_common(debug_info_t* id, int level,
110 static inline bool debug_level_enabled(debug_info_t* id, int level) in debug_level_enabled() argument
112 return level <= id->level; in debug_level_enabled()
116 debug_event(debug_info_t* id, int level, void* data, int length) in debug_event() argument
118 if ((!id) || (level > id->level) || (id->pages_per_area == 0)) in debug_event()
120 return debug_event_common(id,level,data,length); in debug_event()
124 debug_int_event(debug_info_t* id, int level, unsigned int tag) in debug_int_event() argument
127 if ((!id) || (level > id->level) || (id->pages_per_area == 0)) in debug_int_event()
[all …]
/arch/s390/kernel/
Dcache.c79 seq_printf(m, "level=%d ", cache->level); in show_cacheinfo()
90 static inline enum cache_type get_cache_type(struct cache_info *ci, int level) in get_cache_type() argument
92 if (level >= CACHE_MAX_LEVEL) in get_cache_type()
94 ci += level; in get_cache_type()
106 enum cache_type type, unsigned int level, int cpu) in ci_leaf_init() argument
114 this_leaf->level = level + 1; in ci_leaf_init()
116 this_leaf->coherency_line_size = ecag(EXTRACT_LINE_SIZE, level, ti); in ci_leaf_init()
117 this_leaf->ways_of_associativity = ecag(EXTRACT_ASSOCIATIVITY, level, ti); in ci_leaf_init()
118 this_leaf->size = ecag(EXTRACT_SIZE, level, ti); in ci_leaf_init()
130 unsigned int level = 0, leaves = 0; in init_cache_level() local
[all …]
/arch/s390/numa/
Dtoptree.c28 struct toptree *toptree_alloc(int level, int id) in toptree_alloc() argument
38 res->level = level; in toptree_alloc()
117 if (target->level != (cand->level + 1)) in toptree_insert()
153 if (cand->level < 2) in toptree_unify()
156 cand_copy = toptree_alloc(cand->level, 0); in toptree_unify()
193 if (cand->level + 1 == target->level) { in toptree_move()
205 stack_target = toptree_alloc(ptr->level + 1, in toptree_move()
211 } while (stack_target->level < (target->level - 1)); in toptree_move()
234 child = toptree_alloc(cand->level-1, id); in toptree_get_child()
248 struct toptree *toptree_first(struct toptree *context, int level) in toptree_first() argument
[all …]
/arch/powerpc/platforms/powernv/
Dopal-hmi.c48 static void print_core_checkstop_reason(const char *level, in print_core_checkstop_reason() argument
85 printk("%s Unknown Core check stop.\n", level); in print_core_checkstop_reason()
89 printk("%s CPU PIR: %08x\n", level, in print_core_checkstop_reason()
94 printk("%s [Unit: %-3s] %s\n", level, in print_core_checkstop_reason()
99 static void print_nx_checkstop_reason(const char *level, in print_nx_checkstop_reason() argument
136 printk("%s Unknown NX check stop.\n", level); in print_nx_checkstop_reason()
140 printk("%s NX checkstop on CHIP ID: %x\n", level, in print_nx_checkstop_reason()
145 printk("%s [Unit: %-3s] %s\n", level, in print_nx_checkstop_reason()
150 static void print_checkstop_reason(const char *level, in print_checkstop_reason() argument
156 print_core_checkstop_reason(level, hmi_evt); in print_checkstop_reason()
[all …]
/arch/mips/include/asm/sn/
Dintr.h24 #define LOCAL_HUB_SEND_INTR(level) \ argument
25 LOCAL_HUB_S(PI_INT_PEND_MOD, (0x100 | (level)))
26 #define REMOTE_HUB_SEND_INTR(hub, level) \ argument
27 REMOTE_HUB_S((hub), PI_INT_PEND_MOD, (0x100 | (level)))
35 #define LOCAL_HUB_CLR_INTR(level) \ argument
37 LOCAL_HUB_S(PI_INT_PEND_MOD, (level)); \
41 #define REMOTE_HUB_CLR_INTR(hub, level) \ argument
45 REMOTE_HUB_S(__hub, PI_INT_PEND_MOD, (level)); \
/arch/arm/kernel/
Dreturn_address.c20 unsigned int level; member
28 if (!data->level) { in save_return_addr()
33 --data->level; in save_return_addr()
38 void *return_address(unsigned int level) in return_address() argument
43 data.level = level + 2; in return_address()
53 if (!data.level) in return_address()
/arch/x86/kvm/
Dpaging_tmpl.h40 #define PT_INDEX(addr, level) PT64_INDEX(addr, level) argument
60 #define PT_INDEX(addr, level) PT32_INDEX(addr, level) argument
75 #define PT_INDEX(addr, level) PT64_INDEX(addr, level) argument
95 int level; member
213 unsigned level, index; in FNAME() local
223 for (level = walker->max_level; level >= walker->level; --level) { in FNAME()
224 pte = orig_pte = walker->ptes[level - 1]; in FNAME()
225 table_gfn = walker->table_gfn[level - 1]; in FNAME()
226 ptep_user = walker->ptep_user[level - 1]; in FNAME()
232 if (level == walker->level && write_fault && in FNAME()
[all …]
Dmmu_audit.c35 typedef void (*inspect_spte_fn) (struct kvm_vcpu *vcpu, u64 *sptep, int level);
38 inspect_spte_fn fn, int level) in __mmu_spte_walk() argument
45 fn(vcpu, ent + i, level); in __mmu_spte_walk()
48 !is_last_spte(ent[i], level)) { in __mmu_spte_walk()
52 __mmu_spte_walk(vcpu, child, fn, level - 1); in __mmu_spte_walk()
96 static void audit_mappings(struct kvm_vcpu *vcpu, u64 *sptep, int level) in audit_mappings() argument
106 if (level != PT_PAGE_TABLE_LEVEL) { in audit_mappings()
108 "level = %d\n", sp, level); in audit_mappings()
113 if (!is_shadow_present_pte(*sptep) || !is_last_spte(*sptep, level)) in audit_mappings()
153 rmap_head = __gfn_to_rmap(gfn, rev_sp->role.level, slot); in inspect_spte_has_rmap()
[all …]
/arch/arm/mach-s3c24xx/
Dmach-rx1950.c170 { .volt = 4100, .cur = 156, .level = 100},
171 { .volt = 4050, .cur = 156, .level = 95},
172 { .volt = 4025, .cur = 141, .level = 90},
173 { .volt = 3995, .cur = 144, .level = 85},
174 { .volt = 3957, .cur = 162, .level = 80},
175 { .volt = 3931, .cur = 147, .level = 75},
176 { .volt = 3902, .cur = 147, .level = 70},
177 { .volt = 3863, .cur = 153, .level = 65},
178 { .volt = 3838, .cur = 150, .level = 60},
179 { .volt = 3800, .cur = 153, .level = 55},
[all …]
Dmach-h1940.c271 { .volt = 4070, .cur = 162, .level = 100},
272 { .volt = 4040, .cur = 165, .level = 95},
273 { .volt = 4016, .cur = 164, .level = 90},
274 { .volt = 3996, .cur = 166, .level = 85},
275 { .volt = 3971, .cur = 168, .level = 80},
276 { .volt = 3951, .cur = 168, .level = 75},
277 { .volt = 3931, .cur = 170, .level = 70},
278 { .volt = 3903, .cur = 172, .level = 65},
279 { .volt = 3886, .cur = 172, .level = 60},
280 { .volt = 3858, .cur = 176, .level = 55},
[all …]
/arch/arm/boot/dts/
Dexynos5422-cpus.dtsi35 cooling-min-level = <0>;
36 cooling-max-level = <11>;
47 cooling-min-level = <0>;
48 cooling-max-level = <11>;
59 cooling-min-level = <0>;
60 cooling-max-level = <11>;
71 cooling-min-level = <0>;
72 cooling-max-level = <11>;
84 cooling-min-level = <0>;
85 cooling-max-level = <15>;
[all …]
Dexynos5420-cpus.dtsi36 cooling-min-level = <0>;
37 cooling-max-level = <11>;
48 cooling-min-level = <0>;
49 cooling-max-level = <11>;
60 cooling-min-level = <0>;
61 cooling-max-level = <11>;
72 cooling-min-level = <0>;
73 cooling-max-level = <11>;
85 cooling-min-level = <0>;
86 cooling-max-level = <7>;
[all …]
/arch/sh/boards/mach-dreamcast/
Dirq.c108 __u32 emr, esr, status, level; in systemasic_irq_demux() local
113 level = 0; in systemasic_irq_demux()
116 level = 1; in systemasic_irq_demux()
119 level = 2; in systemasic_irq_demux()
124 emr = EMR_BASE + (level << 4) + (level << 2); in systemasic_irq_demux()
125 esr = ESR_BASE + (level << 2); in systemasic_irq_demux()
134 irq = HW_EVENT_IRQ_BASE + j + (level << 5); in systemasic_irq_demux()
/arch/powerpc/kernel/
Dmce.c224 const char *level, *sevstr, *subtype; in machine_check_print_event_info() local
256 level = KERN_INFO; in machine_check_print_event_info()
260 level = KERN_WARNING; in machine_check_print_event_info()
264 level = KERN_ERR; in machine_check_print_event_info()
269 level = KERN_ERR; in machine_check_print_event_info()
274 printk("%s%s Machine check interrupt [%s]\n", level, sevstr, in machine_check_print_event_info()
277 printk("%s Initiator: %s\n", level, in machine_check_print_event_info()
285 printk("%s Error type: UE [%s]\n", level, subtype); in machine_check_print_event_info()
288 level, evt->u.ue_error.effective_address); in machine_check_print_event_info()
291 level, evt->u.ue_error.physical_address); in machine_check_print_event_info()
[all …]
Dcacheinfo.c121 int level; /* level not explicit in device tree */ member
143 static void cache_init(struct cache *cache, int type, int level, in cache_init() argument
147 cache->level = level; in cache_init()
153 static struct cache *new_cache(int type, int level, struct device_node *ofnode) in new_cache() argument
159 cache_init(cache, type, level, ofnode); in new_cache()
182 pr_debug("freeing L%d %s cache for %s\n", cache->level, in release_cache()
356 static struct cache *cache_do_one_devnode_unified(struct device_node *node, int level) in cache_do_one_devnode_unified() argument
358 pr_debug("creating L%d ucache for %s\n", level, node->full_name); in cache_do_one_devnode_unified()
360 return new_cache(cache_is_unified_d(node), level, node); in cache_do_one_devnode_unified()
364 int level) in cache_do_one_devnode_split() argument
[all …]
/arch/arm/
DKconfig.debug67 bool "Kernel low-level debugging functions (read help!)"
80 prompt "Kernel low-level debugging port"
84 bool "Kernel low-level debugging messages via Alpine UART0"
88 Say Y here if you want kernel low-level debugging support
92 bool "Kernel low-level debugging via asm9260 UART"
113 bool "Kernel low-level debugging on AT91RM9200, AT91SAM9 DBGU"
117 Say Y here if you want kernel low-level debugging support
123 bool "Kernel low-level debugging on AT91SAM{9263,9G45,A5D3} DBGU"
127 Say Y here if you want kernel low-level debugging support
133 bool "Kernel low-level debugging on SAMA5D2 UART1"
[all …]
/arch/x86/kernel/cpu/
Dscattered.c16 u32 level; member
45 max_level = cpuid_eax(cb->level & 0xffff0000); in init_scattered_cpuid_features()
46 if (max_level < cb->level || in init_scattered_cpuid_features()
47 max_level > (cb->level | 0xffff)) in init_scattered_cpuid_features()
50 cpuid_count(cb->level, cb->sub_leaf, &regs[CR_EAX], in init_scattered_cpuid_features()
/arch/s390/mm/
Ddump_pagetables.c35 int level; member
42 static void print_prot(struct seq_file *m, unsigned int pr, int level) in print_prot() argument
47 seq_printf(m, "%s ", level_name[level]); in print_prot()
57 unsigned int new_prot, int level) in note_page() argument
73 if (!st->level) { in note_page()
76 st->level = level; in note_page()
79 } else if (prot != cur || level != st->level || in note_page()
91 print_prot(m, st->current_prot, st->level); in note_page()
98 st->level = level; in note_page()
/arch/x86/boot/
Dcpucheck.c108 cpu.level = 3; in check_cpu()
111 cpu.level = 4; in check_cpu()
117 cpu.level = 64; in check_cpu()
155 u32 level = 1; in check_cpu() local
160 : "+a" (level), "=d" (cpu.flags[0]) in check_cpu()
167 is_intel() && cpu.level == 6 && in check_cpu()
185 *cpu_level_ptr = cpu.level; in check_cpu()
189 return (cpu.level < req_level || err) ? -1 : 0; in check_cpu()

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