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Searched refs:FEC_MIB_CTRLSTAT (Results 1 – 2 of 2) sorted by relevance

/drivers/net/ethernet/freescale/
Dfec.h35 #define FEC_MIB_CTRLSTAT 0x064 /* MIB control/status reg */ macro
Dfec_main.c1063 writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); in fec_restart()
2115 FEC_ECNTRL, FEC_MII_DATA, FEC_MII_SPEED, FEC_MIB_CTRLSTAT, FEC_R_CNTRL,