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Searched refs:UART_LCR (Results 1 – 25 of 28) sorted by relevance

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/drivers/staging/media/lirc/
Dlirc_sir.c557 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); in init_hardware()
564 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); in init_hardware()
571 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); in init_hardware()
603 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); in init_hardware()
610 soutp(UART_LCR, UART_LCR_WLEN8); in init_hardware()
618 outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR); in init_hardware()
621 outb(UART_LCR_WLEN7, io + UART_LCR); in init_hardware()
767 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8); in init_act200()
774 soutp(UART_LCR, UART_LCR_WLEN8); in init_act200()
806 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); in init_act200()
[all …]
Dlirc_serial.c658 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); in hardware_init_port()
686 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); in hardware_init_port()
691 soutp(UART_LCR, UART_LCR_WLEN7); in hardware_init_port()
782 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); in set_use_inc()
797 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); in set_use_dec()
937 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); in lirc_serial_suspend()
/drivers/tty/serial/
Domap-serial.c691 lcr = serial_in(up, UART_LCR); in serial_omap_set_mctrl()
692 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_mctrl()
698 serial_out(up, UART_LCR, lcr); in serial_omap_set_mctrl()
716 serial_out(up, UART_LCR, up->lcr); in serial_omap_break_ctl()
766 serial_out(up, UART_LCR, UART_LCR_WLEN8); in serial_omap_startup()
819 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); in serial_omap_shutdown()
942 serial_out(up, UART_LCR, cval); /* reset DLAB */ in serial_omap_set_termios()
952 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in serial_omap_set_termios()
955 serial_out(up, UART_LCR, 0); in serial_omap_set_termios()
957 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
[all …]
Dsunsu.c614 serial_out(up, UART_LCR, up->lcr); in sunsu_break_ctl()
628 serial_outp(up, UART_LCR, 0xBF); in sunsu_startup()
631 serial_outp(up, UART_LCR, 0); in sunsu_startup()
633 serial_outp(up, UART_LCR, 0xBF); in sunsu_startup()
635 serial_outp(up, UART_LCR, 0); in sunsu_startup()
691 serial_outp(up, UART_LCR, UART_LCR_WLEN8); in sunsu_startup()
755 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC); in sunsu_shutdown()
883 serial_outp(up, UART_LCR, 0xBF); in sunsu_change_speed()
886 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ in sunsu_change_speed()
891 serial_outp(up, UART_LCR, cval); /* reset DLAB */ in sunsu_change_speed()
[all …]
Dm32r_sio_reg.h52 #define UART_LCR 0 /* Out: Line Control Register */ macro
92 #define UART_LCR 0 /* Out: Line Control Register */ macro
Dvr41xx_siu.c304 lcr = siu_read(port, UART_LCR); in siu_break_ctl()
309 siu_write(port, UART_LCR, lcr); in siu_break_ctl()
471 siu_write(port, UART_LCR, UART_LCR_WLEN8); in siu_startup()
501 lcr = siu_read(port, UART_LCR); in siu_shutdown()
503 siu_write(port, UART_LCR, lcr); in siu_shutdown()
583 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB); in siu_set_termios()
588 siu_write(port, UART_LCR, lcr); in siu_set_termios()
Dpxa.c333 serial_out(up, UART_LCR, up->lcr); in serial_pxa_break_ctl()
377 serial_out(up, UART_LCR, UART_LCR_WLEN8); in serial_pxa_startup()
424 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); in serial_pxa_shutdown()
536 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ in serial_pxa_set_termios()
547 serial_out(up, UART_LCR, cval); /* reset DLAB */ in serial_pxa_set_termios()
Dpch_uart.c344 "LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR)); in port_show_regs()
355 lcr = ioread8(priv->membase + UART_LCR); in port_show_regs()
356 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR); in port_show_regs()
361 iowrite8(lcr, priv->membase + UART_LCR); in port_show_regs()
493 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR); in pch_uart_hal_set_line()
496 iowrite8(lcr, priv->membase + UART_LCR); in pch_uart_hal_set_line()
635 lcr = ioread8(priv->membase + UART_LCR); in pch_uart_hal_set_break()
641 iowrite8(lcr, priv->membase + UART_LCR); in pch_uart_hal_set_break()
Dserial-tegra.c228 tegra_uart_write(tup, lcr, UART_LCR); in tegra_uart_break_ctl()
311 tegra_uart_write(tup, lcr, UART_LCR); in tegra_set_baudrate()
317 tegra_uart_write(tup, lcr, UART_LCR); in tegra_set_baudrate()
1148 tegra_uart_write(tup, lcr, UART_LCR); in tegra_uart_set_termios()
/drivers/tty/serial/8250/
D8250_port.c488 p->serial_in(p, UART_LCR); /* safe, no side-effects */ in serial_port_out_sync()
690 lcr = serial_in(p, UART_LCR); in serial8250_set_sleep()
692 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B); in serial8250_set_sleep()
694 serial_out(p, UART_LCR, 0); in serial8250_set_sleep()
698 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B); in serial8250_set_sleep()
700 serial_out(p, UART_LCR, lcr); in serial8250_set_sleep()
786 old_lcr = serial_in(up, UART_LCR); in size_fifo()
787 serial_out(up, UART_LCR, 0); in size_fifo()
793 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in size_fifo()
796 serial_out(up, UART_LCR, 0x03); in size_fifo()
[all …]
D8250_early.c115 serial8250_early_out(port, UART_LCR, 0x3); /* 8n1 */ in init_port()
122 c = serial8250_early_in(port, UART_LCR); in init_port()
123 serial8250_early_out(port, UART_LCR, c | UART_LCR_DLAB); in init_port()
126 serial8250_early_out(port, UART_LCR, c & ~UART_LCR_DLAB); in init_port()
D8250_omap.c141 lcr = serial_in(up, UART_LCR); in omap8250_set_mctrl()
142 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in omap8250_set_mctrl()
148 serial_out(up, UART_LCR, lcr); in omap8250_set_mctrl()
279 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in omap8250_restore_regs()
282 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in omap8250_restore_regs()
288 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in omap8250_restore_regs()
296 serial_out(up, UART_LCR, 0); in omap8250_restore_regs()
302 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in omap8250_restore_regs()
308 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in omap8250_restore_regs()
312 serial_out(up, UART_LCR, up->lcr); in omap8250_restore_regs()
[all …]
D8250_dw.c94 void __iomem *offset = p->membase + (UART_LCR << p->regshift); in dw8250_check_lcr()
99 unsigned int lcr = p->serial_in(p, UART_LCR); in dw8250_check_lcr()
130 if (offset == UART_LCR && !d->uart_16550_compatible) in dw8250_serial_out()
158 __raw_readq(p->membase + (UART_LCR << p->regshift)); in dw8250_serial_outq()
160 if (offset == UART_LCR && !d->uart_16550_compatible) in dw8250_serial_outq()
171 if (offset == UART_LCR && !d->uart_16550_compatible) in dw8250_serial_out32()
188 if (offset == UART_LCR && !d->uart_16550_compatible) in dw8250_serial_out32be()
D8250_ingenic.c113 early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8); in ingenic_early_console_setup()
116 early_out(port, UART_LCR, UART_LCR_WLEN8); in ingenic_early_console_setup()
121 early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8); in ingenic_early_console_setup()
124 early_out(port, UART_LCR, UART_LCR_WLEN8); in ingenic_early_console_setup()
D8250_uniphier.c70 case UART_LCR: in uniphier_serial_in()
99 case UART_LCR: in uniphier_serial_out()
D8250_mtk.c89 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); in mtk8250_set_termios()
93 serial_port_out(port, UART_LCR, up->lcr); in mtk8250_set_termios()
D8250_pci.c1126 LCR = inb(base + UART_LCR); in pci_quatech_rqopr()
1127 outb(0xBF, base + UART_LCR); in pci_quatech_rqopr()
1129 outb(LCR, base + UART_LCR); in pci_quatech_rqopr()
1138 LCR = inb(base + UART_LCR); in pci_quatech_wqopr()
1139 outb(0xBF, base + UART_LCR); in pci_quatech_wqopr()
1142 outb(LCR, base + UART_LCR); in pci_quatech_wqopr()
1150 LCR = inb(base + UART_LCR); in pci_quatech_rqmcr()
1151 outb(0xBF, base + UART_LCR); in pci_quatech_rqmcr()
1156 outb(LCR, base + UART_LCR); in pci_quatech_rqmcr()
1166 LCR = inb(base + UART_LCR); in pci_quatech_wqmcr()
[all …]
D8250_em.c46 case UART_LCR: /* LCR @ 0x10 (+1) */ in serial8250_em_serial_out()
/drivers/tty/
Dmxser.c297 oldlcr = inb(baseio + UART_LCR); in mxser_enable_must_enchance_mode()
298 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); in mxser_enable_must_enchance_mode()
304 outb(oldlcr, baseio + UART_LCR); in mxser_enable_must_enchance_mode()
313 oldlcr = inb(baseio + UART_LCR); in mxser_disable_must_enchance_mode()
314 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); in mxser_disable_must_enchance_mode()
320 outb(oldlcr, baseio + UART_LCR); in mxser_disable_must_enchance_mode()
329 oldlcr = inb(baseio + UART_LCR); in mxser_set_must_xon1_value()
330 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); in mxser_set_must_xon1_value()
338 outb(oldlcr, baseio + UART_LCR); in mxser_set_must_xon1_value()
346 oldlcr = inb(baseio + UART_LCR); in mxser_set_must_xoff1_value()
[all …]
/drivers/usb/serial/
Dark3116.c181 ark3116_write_reg(serial, UART_LCR, UART_LCR_DLAB); in ark3116_port_probe()
189 ark3116_write_reg(serial, UART_LCR, UART_LCR_WLEN8); in ark3116_port_probe()
312 ark3116_write_reg(serial, UART_LCR, in ark3116_set_termios()
318 ark3116_write_reg(serial, UART_LCR, lcr); in ark3116_set_termios()
328 ark3116_write_reg(serial, UART_LCR, lcr); in ark3116_set_termios()
528 ark3116_write_reg(port->serial, UART_LCR, priv->lcr); in ark3116_break_ctl()
/drivers/staging/speakup/
Dserialio.c68 outb(cval | UART_LCR_DLAB, ser->port + UART_LCR); /* set DLAB */ in spk_serial_init()
71 outb(cval, ser->port + UART_LCR); /* reset DLAB */ in spk_serial_init()
/drivers/isdn/hisax/
Delsa_ser.c135 serial_outp(cs, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ in change_speed()
138 serial_outp(cs, UART_LCR, cval); /* reset DLAB */ in change_speed()
172 serial_outp(cs, UART_LCR, UART_LCR_WLEN8); /* reset DLAB */ in mstartup()
225 serial_outp(cs, UART_LCR, serial_inp(cs, UART_LCR) & ~UART_LCR_SBC); in mshutdown()
/drivers/bluetooth/
Dbtuart_cs.c382 outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */ in btuart_change_speed()
385 outb(lcr, iobase + UART_LCR); /* Set 8N1 */ in btuart_change_speed()
495 outb(UART_LCR_WLEN8, iobase + UART_LCR); /* Reset DLAB */ in btuart_open()
Ddtl1_cs.c478 outb(UART_LCR_WLEN8, iobase + UART_LCR); /* Reset DLAB */ in dtl1_open()
/drivers/mmc/card/
Dsdio_uart.c344 sdio_out(port, UART_LCR, cval | UART_LCR_DLAB); in sdio_uart_change_speed()
347 sdio_out(port, UART_LCR, cval); in sdio_uart_change_speed()
644 sdio_out(port, UART_LCR, UART_LCR_WLEN8); in sdio_uart_activate()
704 sdio_out(port, UART_LCR, port->lcr); in sdio_uart_shutdown()
933 sdio_out(port, UART_LCR, port->lcr); in sdio_uart_break_ctl()

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