Searched refs:dma_config (Results 1 – 5 of 5) sorted by relevance
170 unsigned long dma_config; in bfin_crypto_crc_config_dma() local197 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | in bfin_crypto_crc_config_dma()202 crc->sg_cpu[i].cfg = dma_config; in bfin_crypto_crc_config_dma()213 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | DMAEN | PSIZE_32; in bfin_crypto_crc_config_dma()219 dma_config |= WDSIZE_32; in bfin_crypto_crc_config_dma()223 dma_config |= WDSIZE_16; in bfin_crypto_crc_config_dma()227 dma_config |= WDSIZE_8; in bfin_crypto_crc_config_dma()232 crc->sg_cpu[i].cfg = dma_config; in bfin_crypto_crc_config_dma()250 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | DMAEN | PSIZE_32 | WDSIZE_32; in bfin_crypto_crc_config_dma()256 crc->sg_cpu[i].cfg = dma_config; in bfin_crypto_crc_config_dma()[all …]
206 int dma_config, bytes_per_line; in ppi_set_params() local235 dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y); in ppi_set_params()238 dma_config |= WNR; in ppi_set_params()305 dma_config |= WDSIZE_32 | PSIZE_32; in ppi_set_params()310 dma_config |= WDSIZE_16 | PSIZE_16; in ppi_set_params()316 set_dma_config(info->dma_ch, dma_config); in ppi_set_params()
404 const struct xilinx_dma_config *dma_config; member648 if (chan->xdev->dma_config->dmatype == XDMA_TYPE_VDMA) { in xilinx_dma_free_tx_descriptor()653 } else if (chan->xdev->dma_config->dmatype == XDMA_TYPE_CDMA) { in xilinx_dma_free_tx_descriptor()716 if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { in xilinx_dma_free_chan_resources()813 if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { in xilinx_dma_alloc_chan_resources()819 } else if (chan->xdev->dma_config->dmatype == XDMA_TYPE_CDMA) { in xilinx_dma_alloc_chan_resources()840 if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { in xilinx_dma_alloc_chan_resources()862 if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { in xilinx_dma_alloc_chan_resources()870 if ((chan->xdev->dma_config->dmatype == XDMA_TYPE_CDMA) && chan->has_sg) in xilinx_dma_alloc_chan_resources()901 if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { in xilinx_dma_tx_status()[all …]
444 u32 dma_config; in adi_spi_dma_xfer() local450 dma_config = WDSIZE_8 | PSIZE_8; in adi_spi_dma_xfer()455 dma_config = WDSIZE_16 | PSIZE_16; in adi_spi_dma_xfer()460 dma_config = WDSIZE_32 | PSIZE_32; in adi_spi_dma_xfer()516 dma_config |= DMAFLOW_STOP | RESTART | DI_EN; in adi_spi_dma_xfer()517 set_dma_config(drv_data->tx_dma, dma_config); in adi_spi_dma_xfer()518 set_dma_config(drv_data->rx_dma, dma_config | WNR); in adi_spi_dma_xfer()
560 u16 cr, cr_width = 0, dma_width, dma_config; in bfin_spi_pump_transfers() local660 dma_config = 0; in bfin_spi_pump_transfers()706 dma_config = in bfin_spi_pump_transfers()708 set_dma_config(drv_data->dma_channel, dma_config); in bfin_spi_pump_transfers()725 dma_config = (RESTART | dma_width | DI_EN); in bfin_spi_pump_transfers()737 dma_config |= WNR; in bfin_spi_pump_transfers()766 set_dma_config(drv_data->dma_channel, dma_config); in bfin_spi_pump_transfers()