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Searched refs:domains (Results 1 – 25 of 44) sorted by relevance

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/drivers/soc/renesas/
Drcar-sysc.c308 struct generic_pm_domain *domains[RCAR_PD_ALWAYS_ON + 1]; member
315 struct rcar_pm_domains *domains; in rcar_sysc_pd_init() local
343 domains = kzalloc(sizeof(*domains), GFP_KERNEL); in rcar_sysc_pd_init()
344 if (!domains) { in rcar_sysc_pd_init()
349 domains->onecell_data.domains = domains->domains; in rcar_sysc_pd_init()
350 domains->onecell_data.num_domains = ARRAY_SIZE(domains->domains); in rcar_sysc_pd_init()
389 pm_genpd_add_subdomain(domains->domains[area->parent], in rcar_sysc_pd_init()
392 domains->domains[area->isr_bit] = &pd->genpd; in rcar_sysc_pd_init()
395 error = of_genpd_add_provider_onecell(np, &domains->onecell_data); in rcar_sysc_pd_init()
/drivers/firmware/
Dscpi_pm_domain.c82 struct generic_pm_domain **domains; in scpi_pm_domain_probe() local
115 domains = devm_kcalloc(dev, num_domains, sizeof(*domains), GFP_KERNEL); in scpi_pm_domain_probe()
116 if (!domains) in scpi_pm_domain_probe()
120 domains[i] = &scpi_pd->genpd; in scpi_pm_domain_probe()
138 scpi_pd_data->domains = domains; in scpi_pm_domain_probe()
/drivers/soc/bcm/
Draspberrypi-power.c38 struct rpi_power_domain domains[RPI_POWER_DOMAIN_COUNT]; member
86 struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index]; in rpi_common_init_power_domain()
104 rpi_domains->xlate.domains[xlate_index] = &dom->base; in rpi_common_init_power_domain()
110 struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index]; in rpi_init_power_domain()
125 struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index]; in rpi_init_old_power_domain()
167 rpi_domains->xlate.domains = in rpi_power_probe()
168 devm_kzalloc(dev, sizeof(*rpi_domains->xlate.domains) * in rpi_power_probe()
170 if (!rpi_domains->xlate.domains) in rpi_power_probe()
DKconfig9 This enables support for the RPi power domains which can be enabled
/drivers/soc/mediatek/
Dmtk-scpsys.c182 struct scp_domain domains[NUM_DOMAINS]; member
432 pd_data->domains = devm_kzalloc(&pdev->dev, in scpsys_probe()
433 sizeof(*pd_data->domains) * NUM_DOMAINS, GFP_KERNEL); in scpsys_probe()
434 if (!pd_data->domains) in scpsys_probe()
462 struct scp_domain *scpd = &scp->domains[i]; in scpsys_probe()
477 struct scp_domain *scpd = &scp->domains[i]; in scpsys_probe()
481 pd_data->domains[i] = genpd; in scpsys_probe()
510 ret = pm_genpd_add_subdomain(pd_data->domains[MT8173_POWER_DOMAIN_MFG_ASYNC], in scpsys_probe()
511 pd_data->domains[MT8173_POWER_DOMAIN_MFG_2D]); in scpsys_probe()
515 ret = pm_genpd_add_subdomain(pd_data->domains[MT8173_POWER_DOMAIN_MFG_2D], in scpsys_probe()
[all …]
/drivers/pci/hotplug/
Drpaphp_core.c174 const int *indexes, *names, *types, *domains; in get_children_props() local
179 domains = of_get_property(dn, "ibm,drc-power-domains", NULL); in get_children_props()
181 if (!indexes || !names || !types || !domains) { in get_children_props()
194 *drc_power_domains = domains; in get_children_props()
207 const int *types, *domains; in rpaphp_get_drc_props() local
218 rc = get_children_props(dn->parent, &indexes, &names, &types, &domains); in rpaphp_get_drc_props()
236 *drc_power_domain = be32_to_cpu(domains[i+1]); in rpaphp_get_drc_props()
/drivers/powercap/
Dintel_rapl.c190 struct rapl_domain *domains; /* array of domains, sized at runtime */ member
284 kfree(p->domains); in rapl_cleanup_data()
330 rp->domains = NULL; in release_zone()
655 struct rapl_domain *rd = rp->domains; in rapl_init_domains()
1200 rp->domains[dmn].name); in rapl_update_domain_data()
1203 if (!rapl_read_data_raw(&rp->domains[dmn], prim, in rapl_update_domain_data()
1206 rp->domains[dmn].rdd.primitives[prim] = in rapl_update_domain_data()
1224 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; in rapl_unregister_powercap()
1266 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { in rapl_package_register_powercap()
1298 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { in rapl_package_register_powercap()
[all …]
DKconfig27 In RAPL, the platform level settings are divided into domains for
28 fine grained control. These domains include processor package, DRAM
/drivers/gpu/drm/i915/
Dintel_runtime_pm.c57 for_each_if ((power_well)->domains & (domain_mask))
63 for_each_if ((power_well)->domains & (domain_mask))
1905 .domains = POWER_DOMAIN_MASK,
1942 .domains = POWER_DOMAIN_MASK,
1947 .domains = HSW_DISPLAY_POWER_DOMAINS,
1956 .domains = POWER_DOMAIN_MASK,
1961 .domains = BDW_DISPLAY_POWER_DOMAINS,
1991 .domains = POWER_DOMAIN_MASK,
1997 .domains = VLV_DISPLAY_POWER_DOMAINS,
2003 .domains = VLV_DPIO_TX_B_LANES_01_POWER_DOMAINS |
[all …]
/drivers/clk/qcom/
Dgdsc.c245 data->domains = devm_kcalloc(dev, num, sizeof(*data->domains), in gdsc_register()
247 if (!data->domains) in gdsc_register()
259 data->domains[i] = &scs[i]->pd; in gdsc_register()
/drivers/soc/rockchip/
Dpm_domains.c74 struct generic_pm_domain *domains[]; member
435 pmu->genpd_data.domains[id] = &pd->genpd; in rockchip_pm_add_one_domain()
470 genpd = pmu->genpd_data.domains[i]; in rockchip_pm_domain_cleanup()
507 parent_domain = pmu->genpd_data.domains[idx]; in rockchip_pm_add_subdomain()
523 child_domain = pmu->genpd_data.domains[idx]; in rockchip_pm_add_subdomain()
571 pmu_info->num_domains * sizeof(pmu->domains[0]), in rockchip_pm_domain_probe()
581 pmu->genpd_data.domains = pmu->domains; in rockchip_pm_domain_probe()
/drivers/pinctrl/samsung/
Dpinctrl-s3c64xx.c208 struct irq_domain *domains[NUM_EINT0]; member
229 struct irq_domain *domains[]; member
439 virq = irq_linear_revmap(data->domains[group], pin); in s3c64xx_eint_gpio_irq()
492 + nr_domains * sizeof(*data->domains), GFP_KERNEL); in s3c64xx_eint_gpio_init()
505 data->domains[nr_domains++] = bank->irq_domain; in s3c64xx_eint_gpio_init()
621 virq = irq_linear_revmap(data->domains[irq], data->pins[irq]); in s3c64xx_irq_demux_eint()
768 data->domains[irq] = bank->irq_domain; in s3c64xx_eint_eint0_init()
Dpinctrl-s3c24xx.c95 struct irq_domain *domains[NUM_EINT]; member
250 virq = irq_linear_revmap(eint_data->domains[data->hwirq], data->hwirq); in s3c2410_demux_eint0_3()
308 virq = irq_linear_revmap(eint_data->domains[data->hwirq], data->hwirq); in s3c2412_demux_eint0_3()
381 virq = irq_linear_revmap(data->domains[irq], irq - offset); in s3c24xx_demux_eint()
553 eint_data->domains[irq] = bank->irq_domain; in s3c24xx_eint_init()
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dbase.c141 const struct nvkm_domain *domain = clk->domains; in nvkm_cstate_new()
256 const struct nvkm_domain *clock = clk->domains - 1; in nvkm_pstate_info()
313 const struct nvkm_domain *domain = clk->domains - 1; in nvkm_pstate_new()
504 const struct nvkm_domain *clock = clk->domains; in nvkm_clk_init()
570 clk->domains = func->domains; in nvkm_clk_ctor()
Dg84.c32 .domains = {
Dpriv.h15 struct nvkm_domain domains[]; member
Dnv04.c69 .domains = {
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gem.c203 if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS | in amdgpu_gem_create_ioctl()
206 if (args->in.domains == AMDGPU_GEM_DOMAIN_GDS) in amdgpu_gem_create_ioctl()
208 else if (args->in.domains == AMDGPU_GEM_DOMAIN_GWS) in amdgpu_gem_create_ioctl()
210 else if (args->in.domains == AMDGPU_GEM_DOMAIN_OA) in amdgpu_gem_create_ioctl()
220 (u32)(0xffffffff & args->in.domains), in amdgpu_gem_create_ioctl()
664 info.domains = robj->prefered_domains; in amdgpu_gem_op_ioctl()
/drivers/base/power/
Ddomain.c1494 if (!genpd_data->domains[idx]) in genpd_xlate_onecell()
1497 return genpd_data->domains[idx]; in genpd_xlate_onecell()
1573 if (!data->domains[i]) in of_genpd_add_provider_onecell()
1575 if (!pm_genpd_present(data->domains[i])) in of_genpd_add_provider_onecell()
1578 data->domains[i]->provider = &np->fwnode; in of_genpd_add_provider_onecell()
1579 data->domains[i]->has_provider = true; in of_genpd_add_provider_onecell()
1592 if (!data->domains[i]) in of_genpd_add_provider_onecell()
1594 data->domains[i]->provider = NULL; in of_genpd_add_provider_onecell()
1595 data->domains[i]->has_provider = false; in of_genpd_add_provider_onecell()
/drivers/gpu/drm/nouveau/nvkm/engine/pm/
Dbase.c41 list_for_each_entry(dom, &pm->domains, head) in nvkm_pm_count_perfdom()
67 list_for_each_entry(dom, &pm->domains, head) { in nvkm_perfdom_find()
255 list_for_each_entry(dom, &pm->domains, head) in nvkm_perfdom_sample()
796 list_add_tail(&dom->head, &pm->domains); in nvkm_perfdom_new()
838 list_for_each_entry_safe(dom, next_dom, &pm->domains, head) { in nvkm_pm_dtor()
864 INIT_LIST_HEAD(&pm->domains); in nvkm_pm_ctor()
/drivers/iommu/
Dintel-iommu.c624 struct dmar_domain **domains; in get_iommu_domain() local
627 domains = iommu->domains[idx]; in get_iommu_domain()
628 if (!domains) in get_iommu_domain()
631 return domains[did & 0xff]; in get_iommu_domain()
637 struct dmar_domain **domains; in set_iommu_domain() local
640 if (!iommu->domains[idx]) { in set_iommu_domain()
642 iommu->domains[idx] = kzalloc(size, GFP_ATOMIC); in set_iommu_domain()
645 domains = iommu->domains[idx]; in set_iommu_domain()
646 if (WARN_ON(!domains)) in set_iommu_domain()
649 domains[did & 0xff] = domain; in set_iommu_domain()
[all …]
/drivers/soc/samsung/
DKconfig14 bool "Exynos PM domains" if COMPILE_TEST
/drivers/gpu/drm/nouveau/include/nvkm/engine/
Dpm.h11 struct list_head domains; member
/drivers/xen/
DKconfig88 other domains. This makes sure that any confidential data
89 is not accidentally visible to other domains. Is it more
115 The xen filesystem provides a way for domains to share
161 to other domains. This can be used to implement frontend drivers
205 Only needed for systems running as XEN driver domains (e.g. Dom0) and
/drivers/gpu/drm/nouveau/
Dnouveau_gem.c294 uint32_t domains = valid_domains & nvbo->valid_domains & in nouveau_gem_set_domain() local
298 if (!domains) in nouveau_gem_set_domain()
307 if ((domains & NOUVEAU_GEM_DOMAIN_VRAM) && in nouveau_gem_set_domain()
311 else if ((domains & NOUVEAU_GEM_DOMAIN_GART) && in nouveau_gem_set_domain()
315 else if (domains & NOUVEAU_GEM_DOMAIN_VRAM) in nouveau_gem_set_domain()

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