/drivers/gpu/drm/nouveau/nvkm/core/ |
D | enum.c | 30 nvkm_enum_find(const struct nvkm_enum *en, u32 value) in nvkm_enum_find() argument 32 while (en->name) { in nvkm_enum_find() 33 if (en->value == value) in nvkm_enum_find() 34 return en; in nvkm_enum_find() 35 en++; in nvkm_enum_find()
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/drivers/staging/media/davinci_vpfe/ |
D | davinci_vpfe_user.h | 136 unsigned char en; member 296 unsigned char en; member 341 unsigned char en; member 375 unsigned char en; member 460 unsigned char en; member 635 unsigned char en; member 697 unsigned char en; member 728 unsigned char en; member 771 unsigned char en; member 953 unsigned char en; member [all …]
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D | dm365_ipipe_hw.c | 423 regw_ip(base_addr, dpc->en, DPC_LUT_EN); in ipipe_set_lutdpc_regs() 425 if (dpc->en != 1) in ipipe_set_lutdpc_regs() 479 regw_ip(base_addr, (otfdpc->en & 1), DPC_OTF_EN); in ipipe_set_otfdpc_regs() 480 if (!otfdpc->en) in ipipe_set_otfdpc_regs() 538 regw_ip(base_addr, noise_filter->en & 1, offset + D2F_EN); in ipipe_set_d2f_regs() 539 if (!noise_filter->en) in ipipe_set_d2f_regs() 579 regw_ip(base_addr, gic->en & 1, GIC_EN); in ipipe_set_gic_regs() 581 if (!gic->en) in ipipe_set_gic_regs() 785 regw_ip(base_addr, lut_3d->en, D3LUT_EN); in ipipe_set_3d_lut_regs() 787 if (!lut_3d->en) in ipipe_set_3d_lut_regs() [all …]
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D | dm365_ipipe.c | 55 if (lutdpc->en > 1 || lutdpc->repl_white > 1 || in ipipe_validate_lutdpc_params() 59 if (lutdpc->en && !lutdpc->table) in ipipe_validate_lutdpc_params() 83 lutdpc->en = dpc_param->en; in ipipe_set_lutdpc_params() 102 lut_param->en = lutdpc->en; in ipipe_get_lutdpc_params() 139 if (dpc_param->en > 1) in ipipe_validate_otfdpc_params() 208 if (nf_param->en > 1 || nf_param->shft_val > D2F_SHFT_VAL_MASK || in ipipe_validate_nf_params() 290 if (gic->en > 1 || gic->gain > GIC_GAIN_MASK || in ipipe_validate_gic_params() 726 if (!lut->en) in ipipe_validate_3d_lut_params() 744 lut_param->en = lut->en; in ipipe_get_3d_lut_params() 884 if (!gbce->en) in ipipe_validate_gbce_params() [all …]
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D | dm365_ipipe.h | 43 unsigned char en; member 55 unsigned char en; member 177 void vpfe_ipipe_enable(struct vpfe_device *vpfe_dev, int en);
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/drivers/regulator/ |
D | pcap-regulator.c | 99 const u8 en; member 110 .en = _en, \ 183 if (vreg->en == NA) in pcap_regulator_enable() 186 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en); in pcap_regulator_enable() 194 if (vreg->en == NA) in pcap_regulator_disable() 197 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0); in pcap_regulator_disable() 206 if (vreg->en == NA) in pcap_regulator_is_enabled() 210 return (tmp >> vreg->en) & 1; in pcap_regulator_is_enabled()
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/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
D | nv50.c | 160 const struct nvkm_enum *en, *re, *cl, *sc; in nv50_fb_intr() local 192 en = nvkm_enum_find(vm_engine, st0); in nv50_fb_intr() 196 else if (en && en->data) sc = nvkm_enum_find(en->data, st3); in nv50_fb_intr() 207 st0, en ? en->name : "", in nv50_fb_intr()
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/drivers/clk/ |
D | clk-mb86s7x.c | 37 u32 en; member 52 static int crg_gate_control(struct clk_hw *hw, int en) in crg_gate_control() argument 62 cmd.en = en; in crg_gate_control() 66 return en ? 0 : -EINVAL; in crg_gate_control() 70 cmd.domain, cmd.port, cmd.en); in crg_gate_control() 81 cmd.domain, cmd.port, cmd.en); in crg_gate_control() 84 if (cmd.en != en) in crg_gate_control()
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/drivers/gpu/drm/nouveau/nvkm/engine/sec/ |
D | g98.c | 52 const struct nvkm_enum *en = in g98_sec_intr() local 57 en ? en->name : "UNKNOWN", chan ? chan->chid : -1, in g98_sec_intr()
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/drivers/media/platform/davinci/ |
D | vpss.c | 106 int (*enable_clock)(enum vpss_clock_sel clock_sel, int en); 239 static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en) in dm355_enable_clock() argument 271 if (!en) in dm355_enable_clock() 281 static int dm365_enable_clock(enum vpss_clock_sel clock_sel, int en) in dm365_enable_clock() argument 355 if (!en) { in dm365_enable_clock() 367 int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en) in vpss_enable_clock() argument 372 return oper_cfg.hw_ops.enable_clock(clock_sel, en); in vpss_enable_clock()
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D | isif.c | 49 .en = 0, 56 .en = 0, 60 .en = 0, 63 .en = 0, 191 static void isif_enable(int en) in isif_enable() argument 193 if (!en) { in isif_enable() 202 reg_modify(ISIF_SYNCEN_VDHDEN_MASK, en, SYNCEN); in isif_enable() 205 static void isif_enable_output_to_sdram(int en) in isif_enable_output_to_sdram() argument 207 reg_modify(ISIF_SYNCEN_WEN_MASK, en << ISIF_SYNCEN_WEN_SHIFT, SYNCEN); in isif_enable_output_to_sdram() 334 if (bc->en) { in isif_config_bclamp() [all …]
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D | ccdc_hw_device.h | 40 void (*enable) (int en); 44 void (*enable_out_to_sdram) (int en);
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/drivers/gpu/drm/nouveau/nvkm/engine/ce/ |
D | gt215.c | 53 const struct nvkm_enum *en = in gt215_ce_intr() local 58 en ? en->name : "", chan ? chan->chid : -1, in gt215_ce_intr()
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D | gp100.c | 54 const struct nvkm_enum *en = in gp100_ce_intr_launcherr() local 56 nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : ""); in gp100_ce_intr_launcherr()
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D | gk104.c | 52 const struct nvkm_enum *en = in gk104_ce_intr_launcherr() local 54 nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : ""); in gk104_ce_intr_launcherr()
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/drivers/tty/serial/ |
D | etraxfs-uart.c | 63 if (tr_dma_en.en == regk_ser_yes) { in cris_console_write() 64 tr_dma_en.en = regk_ser_no; in cris_console_write() 85 if (tr_dma_en.en != old.en) in cris_console_write() 257 tr_dma_en.en = 0; in etraxfs_uart_send_xchar() 349 tr_dma_en.en = 0; in etraxfs_uart_stop_tx() 364 rec_ctrl.en = regk_ser_no; in etraxfs_uart_stop_rx() 424 tr_dma_en.en = 0; in etraxfs_uart_break_ctl() 670 tx_ctrl.en = 0; in etraxfs_uart_set_termios() 757 tx_ctrl.en = regk_ser_yes; in etraxfs_uart_set_termios() 758 rx_ctrl.en = regk_ser_yes; in etraxfs_uart_set_termios() [all …]
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/drivers/clk/qcom/ |
D | gdsc.c | 58 static int gdsc_toggle_logic(struct gdsc *sc, bool en) in gdsc_toggle_logic() argument 61 u32 val = en ? 0 : SW_COLLAPSE_MASK; in gdsc_toggle_logic() 70 if ((sc->flags & VOTABLE) && !en) { in gdsc_toggle_logic() 97 if (gdsc_is_enabled(sc, status_reg) == en) in gdsc_toggle_logic() 101 if (gdsc_is_enabled(sc, status_reg) == en) in gdsc_toggle_logic()
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D | clk-branch.c | 103 static int clk_branch_toggle(struct clk_hw *hw, bool en, in clk_branch_toggle() argument 109 if (en) { in clk_branch_toggle() 117 return clk_branch_wait(br, en, check_halt); in clk_branch_toggle()
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/drivers/misc/mic/ |
D | Kconfig | 16 <http://software.intel.com/en-us/mic-developer>. 33 <http://software.intel.com/en-us/mic-developer>. 50 <http://software.intel.com/en-us/mic-developer>. 70 <http://software.intel.com/en-us/mic-developer>. 89 <http://software.intel.com/en-us/mic-developer>. 109 <http://software.intel.com/en-us/mic-developer>. 127 <http://software.intel.com/en-us/mic-developer>. 148 <http://software.intel.com/en-us/mic-developer>.
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/drivers/rtc/ |
D | rtc-pcap.c | 116 static int pcap_rtc_irq_enable(struct device *dev, int pirq, unsigned int en) in pcap_rtc_irq_enable() argument 121 if (en) in pcap_rtc_irq_enable() 129 static int pcap_rtc_alarm_irq_enable(struct device *dev, unsigned int en) in pcap_rtc_alarm_irq_enable() argument 131 return pcap_rtc_irq_enable(dev, PCAP_IRQ_TODA, en); in pcap_rtc_alarm_irq_enable()
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/drivers/dma/ |
D | omap-dma.c | 70 uint32_t en; member 82 uint32_t en; /* number of elements (24-bit) */ member 253 t2_desc->en = sg->en; in omap_dma_fill_type2_desc() 267 t2_desc->en |= DESC_NXT_DV_REFRESH; in omap_dma_fill_type2_desc() 268 t2_desc->en |= DESC_NXT_SV_REUSE; in omap_dma_fill_type2_desc() 276 t2_desc->en |= DESC_NXT_SV_REFRESH; in omap_dma_fill_type2_desc() 277 t2_desc->en |= DESC_NXT_DV_REUSE; in omap_dma_fill_type2_desc() 283 t2_desc->en |= DESC_NTYPE_TYPE2; in omap_dma_fill_type2_desc() 506 omap_dma_chan_write(c, CEN, sg->en); in omap_dma_start_sg() 698 return sg->en * sg->fn; in omap_dma_sg_size() [all …]
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/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
D | gk104.c | 198 const struct nvkm_enum *en = in gk104_fifo_intr_bind() local 201 nvkm_error(subdev, "BIND_ERROR %02x [%s]\n", code, en ? en->name : ""); in gk104_fifo_intr_bind() 252 const struct nvkm_enum *en = in gk104_fifo_intr_sched() local 255 nvkm_error(subdev, "SCHED_ERROR %02x [%s]\n", code, en ? en->name : ""); in gk104_fifo_intr_sched() 303 char gpcid[8] = "", en[16] = ""; in gk104_fifo_intr_fault() local 335 char *dst = en; in gk104_fifo_intr_fault() 342 snprintf(en, sizeof(en), "%s", eu->name); in gk104_fifo_intr_fault() 351 unit, en, client, gpcid, ec ? ec->name : "", in gk104_fifo_intr_fault()
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/drivers/staging/fsl-mc/bus/ |
D | dpbp.c | 233 int *en) in dpbp_is_enabled() argument 249 *en = rsp_params->enabled & DPBP_ENABLE; in dpbp_is_enabled() 372 u8 en) in dpbp_set_irq_enable() argument 381 cmd_params->enable = en & DPBP_ENABLE; in dpbp_set_irq_enable() 402 u8 *en) in dpbp_get_irq_enable() argument 422 *en = rsp_params->enabled & DPBP_ENABLE; in dpbp_get_irq_enable()
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/drivers/staging/fsl-mc/include/ |
D | dpbp.h | 78 int *en); 113 u8 en); 119 u8 *en);
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/drivers/edac/ |
D | octeon_edac-lmc.c | 270 union cvmx_lmcx_int_en en; in octeon_lmc_edac_probe() local 296 en.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc)); in octeon_lmc_edac_probe() 297 en.s.intr_ded_ena = 0; /* We poll */ in octeon_lmc_edac_probe() 298 en.s.intr_sec_ena = 0; in octeon_lmc_edac_probe() 299 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mc), en.u64); in octeon_lmc_edac_probe()
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