/drivers/irqchip/ |
D | irq-crossbar.c | 81 struct irq_fwspec fwspec; in allocate_gic_irq() local 100 fwspec.fwnode = domain->parent->fwnode; in allocate_gic_irq() 101 fwspec.param_count = 3; in allocate_gic_irq() 102 fwspec.param[0] = 0; /* SPI */ in allocate_gic_irq() 103 fwspec.param[1] = i; in allocate_gic_irq() 104 fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH; in allocate_gic_irq() 106 err = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); in allocate_gic_irq() 118 struct irq_fwspec *fwspec = data; in crossbar_domain_alloc() local 122 if (fwspec->param_count != 3) in crossbar_domain_alloc() 124 if (fwspec->param[0] != 0) in crossbar_domain_alloc() [all …]
|
D | irq-mtk-sysirq.c | 71 struct irq_fwspec *fwspec, in mtk_sysirq_domain_translate() argument 75 if (is_of_node(fwspec->fwnode)) { in mtk_sysirq_domain_translate() 76 if (fwspec->param_count != 3) in mtk_sysirq_domain_translate() 80 if (fwspec->param[0] != 0) in mtk_sysirq_domain_translate() 83 *hwirq = fwspec->param[1]; in mtk_sysirq_domain_translate() 84 *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; in mtk_sysirq_domain_translate() 96 struct irq_fwspec *fwspec = arg; in mtk_sysirq_domain_alloc() local 97 struct irq_fwspec gic_fwspec = *fwspec; in mtk_sysirq_domain_alloc() 99 if (fwspec->param_count != 3) in mtk_sysirq_domain_alloc() 103 if (fwspec->param[0]) in mtk_sysirq_domain_alloc() [all …]
|
D | irq-mbigen.c | 176 struct irq_fwspec *fwspec, in mbigen_domain_translate() argument 180 if (is_of_node(fwspec->fwnode)) { in mbigen_domain_translate() 181 if (fwspec->param_count != 2) in mbigen_domain_translate() 184 if ((fwspec->param[0] > MAXIMUM_IRQ_PIN_NUM) || in mbigen_domain_translate() 185 (fwspec->param[0] < RESERVED_IRQ_PER_MBIGEN_CHIP)) in mbigen_domain_translate() 188 *hwirq = fwspec->param[0]; in mbigen_domain_translate() 191 if ((fwspec->param[1] == IRQ_TYPE_EDGE_RISING) || in mbigen_domain_translate() 192 (fwspec->param[1] == IRQ_TYPE_LEVEL_HIGH)) in mbigen_domain_translate() 193 *type = fwspec->param[1]; in mbigen_domain_translate() 207 struct irq_fwspec *fwspec = args; in mbigen_irq_domain_alloc() local [all …]
|
D | irq-vf610-mscm-ir.c | 133 struct irq_fwspec *fwspec = arg; in vf610_mscm_ir_domain_alloc() local 139 if (fwspec->param_count != 2) in vf610_mscm_ir_domain_alloc() 142 hwirq = fwspec->param[0]; in vf610_mscm_ir_domain_alloc() 152 parent_fwspec.param[0] = fwspec->param[0]; in vf610_mscm_ir_domain_alloc() 156 parent_fwspec.param[1] = fwspec->param[0]; in vf610_mscm_ir_domain_alloc() 157 parent_fwspec.param[2] = fwspec->param[1]; in vf610_mscm_ir_domain_alloc() 165 struct irq_fwspec *fwspec, in vf610_mscm_ir_domain_translate() argument 169 if (WARN_ON(fwspec->param_count < 2)) in vf610_mscm_ir_domain_translate() 171 *hwirq = fwspec->param[0]; in vf610_mscm_ir_domain_translate() 172 *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; in vf610_mscm_ir_domain_translate()
|
D | irq-tegra.c | 225 struct irq_fwspec *fwspec, in tegra_ictlr_domain_translate() argument 229 if (is_of_node(fwspec->fwnode)) { in tegra_ictlr_domain_translate() 230 if (fwspec->param_count != 3) in tegra_ictlr_domain_translate() 234 if (fwspec->param[0] != 0) in tegra_ictlr_domain_translate() 237 *hwirq = fwspec->param[1]; in tegra_ictlr_domain_translate() 238 *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; in tegra_ictlr_domain_translate() 249 struct irq_fwspec *fwspec = data; in tegra_ictlr_domain_alloc() local 255 if (fwspec->param_count != 3) in tegra_ictlr_domain_alloc() 257 if (fwspec->param[0] != GIC_SPI) in tegra_ictlr_domain_alloc() 260 hwirq = fwspec->param[1]; in tegra_ictlr_domain_alloc() [all …]
|
D | irq-imx-gpcv2.c | 154 struct irq_fwspec *fwspec, in imx_gpcv2_domain_translate() argument 158 if (is_of_node(fwspec->fwnode)) { in imx_gpcv2_domain_translate() 159 if (fwspec->param_count != 3) in imx_gpcv2_domain_translate() 163 if (fwspec->param[0] != 0) in imx_gpcv2_domain_translate() 166 *hwirq = fwspec->param[1]; in imx_gpcv2_domain_translate() 167 *type = fwspec->param[2]; in imx_gpcv2_domain_translate() 178 struct irq_fwspec *fwspec = data; in imx_gpcv2_domain_alloc() local 185 err = imx_gpcv2_domain_translate(domain, fwspec, &hwirq, &type); in imx_gpcv2_domain_alloc() 197 parent_fwspec = *fwspec; in imx_gpcv2_domain_alloc()
|
D | irq-gic-v3.c | 785 struct irq_fwspec *fwspec, in gic_irq_domain_translate() argument 789 if (is_of_node(fwspec->fwnode)) { in gic_irq_domain_translate() 790 if (fwspec->param_count < 3) in gic_irq_domain_translate() 793 switch (fwspec->param[0]) { in gic_irq_domain_translate() 795 *hwirq = fwspec->param[1] + 32; in gic_irq_domain_translate() 798 *hwirq = fwspec->param[1] + 16; in gic_irq_domain_translate() 801 *hwirq = fwspec->param[1]; in gic_irq_domain_translate() 807 *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; in gic_irq_domain_translate() 811 if (is_fwnode_irqchip(fwspec->fwnode)) { in gic_irq_domain_translate() 812 if(fwspec->param_count != 2) in gic_irq_domain_translate() [all …]
|
D | irq-mvebu-odmi.c | 82 struct irq_fwspec fwspec; in odmi_irq_domain_alloc() local 100 fwspec.fwnode = domain->parent->fwnode; in odmi_irq_domain_alloc() 101 fwspec.param_count = 3; in odmi_irq_domain_alloc() 102 fwspec.param[0] = GIC_SPI; in odmi_irq_domain_alloc() 103 fwspec.param[1] = odmi->spi_base - 32 + odmin; in odmi_irq_domain_alloc() 104 fwspec.param[2] = IRQ_TYPE_EDGE_RISING; in odmi_irq_domain_alloc() 106 ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); in odmi_irq_domain_alloc()
|
D | irq-gic-v2m.c | 129 struct irq_fwspec fwspec; in gicv2m_irq_gic_domain_alloc() local 134 fwspec.fwnode = domain->parent->fwnode; in gicv2m_irq_gic_domain_alloc() 135 fwspec.param_count = 3; in gicv2m_irq_gic_domain_alloc() 136 fwspec.param[0] = 0; in gicv2m_irq_gic_domain_alloc() 137 fwspec.param[1] = hwirq - 32; in gicv2m_irq_gic_domain_alloc() 138 fwspec.param[2] = IRQ_TYPE_EDGE_RISING; in gicv2m_irq_gic_domain_alloc() 140 fwspec.fwnode = domain->parent->fwnode; in gicv2m_irq_gic_domain_alloc() 141 fwspec.param_count = 2; in gicv2m_irq_gic_domain_alloc() 142 fwspec.param[0] = hwirq; in gicv2m_irq_gic_domain_alloc() 143 fwspec.param[1] = IRQ_TYPE_EDGE_RISING; in gicv2m_irq_gic_domain_alloc() [all …]
|
D | irq-nvic.c | 52 struct irq_fwspec *fwspec, in nvic_irq_domain_translate() argument 55 if (WARN_ON(fwspec->param_count < 1)) in nvic_irq_domain_translate() 57 *hwirq = fwspec->param[0]; in nvic_irq_domain_translate() 68 struct irq_fwspec *fwspec = arg; in nvic_irq_domain_alloc() local 70 ret = nvic_irq_domain_translate(domain, fwspec, &hwirq, &type); in nvic_irq_domain_alloc()
|
D | irq-alpine-msi.c | 122 struct irq_fwspec fwspec; in alpine_msix_gic_domain_alloc() local 129 fwspec.fwnode = domain->parent->fwnode; in alpine_msix_gic_domain_alloc() 130 fwspec.param_count = 3; in alpine_msix_gic_domain_alloc() 131 fwspec.param[0] = 0; in alpine_msix_gic_domain_alloc() 132 fwspec.param[1] = sgi; in alpine_msix_gic_domain_alloc() 133 fwspec.param[2] = IRQ_TYPE_EDGE_RISING; in alpine_msix_gic_domain_alloc() 135 ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); in alpine_msix_gic_domain_alloc()
|
D | irq-gic.c | 978 struct irq_fwspec *fwspec, in gic_irq_domain_translate() argument 982 if (is_of_node(fwspec->fwnode)) { in gic_irq_domain_translate() 983 if (fwspec->param_count < 3) in gic_irq_domain_translate() 987 *hwirq = fwspec->param[1] + 16; in gic_irq_domain_translate() 993 if (!fwspec->param[0]) in gic_irq_domain_translate() 996 *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; in gic_irq_domain_translate() 1000 if (is_fwnode_irqchip(fwspec->fwnode)) { in gic_irq_domain_translate() 1001 if(fwspec->param_count != 2) in gic_irq_domain_translate() 1004 *hwirq = fwspec->param[0]; in gic_irq_domain_translate() 1005 *type = fwspec->param[1]; in gic_irq_domain_translate() [all …]
|
D | irq-gic-v3-its.c | 1438 struct irq_fwspec fwspec; in its_irq_gic_domain_alloc() local 1441 fwspec.fwnode = domain->parent->fwnode; in its_irq_gic_domain_alloc() 1442 fwspec.param_count = 3; in its_irq_gic_domain_alloc() 1443 fwspec.param[0] = GIC_IRQ_TYPE_LPI; in its_irq_gic_domain_alloc() 1444 fwspec.param[1] = hwirq; in its_irq_gic_domain_alloc() 1445 fwspec.param[2] = IRQ_TYPE_EDGE_RISING; in its_irq_gic_domain_alloc() 1447 fwspec.fwnode = domain->parent->fwnode; in its_irq_gic_domain_alloc() 1448 fwspec.param_count = 2; in its_irq_gic_domain_alloc() 1449 fwspec.param[0] = hwirq; in its_irq_gic_domain_alloc() 1450 fwspec.param[1] = IRQ_TYPE_EDGE_RISING; in its_irq_gic_domain_alloc() [all …]
|
D | irq-stm32-exti.c | 105 struct irq_fwspec *fwspec = data; in stm32_exti_alloc() local 108 hwirq = fwspec->param[0]; in stm32_exti_alloc()
|
D | irq-partition-percpu.c | 155 struct irq_fwspec *fwspec = arg; in partition_domain_alloc() local 159 ret = domain->ops->translate(domain, fwspec, &hwirq, &type); in partition_domain_alloc()
|
D | irq-mips-gic.c | 844 struct irq_fwspec *fwspec = arg; in gic_dev_domain_alloc() local 850 if (fwspec->param[0] == GIC_SHARED) in gic_dev_domain_alloc() 851 spec.hwirq = GIC_SHARED_TO_HWIRQ(fwspec->param[1]); in gic_dev_domain_alloc() 853 spec.hwirq = GIC_LOCAL_TO_HWIRQ(fwspec->param[1]); in gic_dev_domain_alloc()
|
/drivers/gpio/ |
D | gpio-xgene-sb.c | 127 struct irq_fwspec fwspec; in xgene_gpio_sb_to_irq() local 134 fwspec.fwnode = of_node_to_fwnode(gc->parent->of_node); in xgene_gpio_sb_to_irq() 136 fwspec.fwnode = gc->parent->fwnode; in xgene_gpio_sb_to_irq() 137 fwspec.param_count = 2; in xgene_gpio_sb_to_irq() 138 fwspec.param[0] = GPIO_TO_HWIRQ(priv, gpio); in xgene_gpio_sb_to_irq() 139 fwspec.param[1] = IRQ_TYPE_NONE; in xgene_gpio_sb_to_irq() 140 return irq_create_fwspec_mapping(&fwspec); in xgene_gpio_sb_to_irq() 172 struct irq_fwspec *fwspec, in xgene_gpio_sb_domain_translate() argument 178 if ((fwspec->param_count != 2) || in xgene_gpio_sb_domain_translate() 179 (fwspec->param[0] >= priv->nirq)) in xgene_gpio_sb_domain_translate() [all …]
|
/drivers/acpi/ |
D | gsi.c | 57 struct irq_fwspec fwspec; in acpi_register_gsi() local 64 fwspec.fwnode = acpi_gsi_domain_id; in acpi_register_gsi() 65 fwspec.param[0] = gsi; in acpi_register_gsi() 66 fwspec.param[1] = acpi_dev_get_irq_type(trigger, polarity); in acpi_register_gsi() 67 fwspec.param_count = 2; in acpi_register_gsi() 69 return irq_create_fwspec_mapping(&fwspec); in acpi_register_gsi()
|
/drivers/iommu/ |
D | arm-smmu.c | 1126 struct iommu_fwspec *fwspec = dev->iommu_fwspec; in arm_smmu_master_alloc_smes() local 1127 struct arm_smmu_master_cfg *cfg = fwspec->iommu_priv; in arm_smmu_master_alloc_smes() 1135 for_each_cfg_sme(fwspec, i, idx) { in arm_smmu_master_alloc_smes() 1136 u16 sid = fwspec->ids[i]; in arm_smmu_master_alloc_smes() 1137 u16 mask = fwspec->ids[i] >> SMR_MASK_SHIFT; in arm_smmu_master_alloc_smes() 1168 for_each_cfg_sme(fwspec, i, idx) { in arm_smmu_master_alloc_smes() 1185 static void arm_smmu_master_free_smes(struct iommu_fwspec *fwspec) in arm_smmu_master_free_smes() argument 1187 struct arm_smmu_device *smmu = fwspec_smmu(fwspec); in arm_smmu_master_free_smes() 1188 struct arm_smmu_master_cfg *cfg = fwspec->iommu_priv; in arm_smmu_master_free_smes() 1192 for_each_cfg_sme(fwspec, i, idx) { in arm_smmu_master_free_smes() [all …]
|
D | iommu.c | 1632 struct iommu_fwspec *fwspec = dev->iommu_fwspec; in iommu_fwspec_init() local 1634 if (fwspec) in iommu_fwspec_init() 1635 return ops == fwspec->ops ? 0 : -EINVAL; in iommu_fwspec_init() 1637 fwspec = kzalloc(sizeof(*fwspec), GFP_KERNEL); in iommu_fwspec_init() 1638 if (!fwspec) in iommu_fwspec_init() 1642 fwspec->iommu_fwnode = iommu_fwnode; in iommu_fwspec_init() 1643 fwspec->ops = ops; in iommu_fwspec_init() 1644 dev->iommu_fwspec = fwspec; in iommu_fwspec_init() 1651 struct iommu_fwspec *fwspec = dev->iommu_fwspec; in iommu_fwspec_free() local 1653 if (fwspec) { in iommu_fwspec_free() [all …]
|
D | arm-smmu-v3.c | 1583 static int arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec) in arm_smmu_install_ste_for_dev() argument 1586 struct arm_smmu_master_data *master = fwspec->iommu_priv; in arm_smmu_install_ste_for_dev() 1589 for (i = 0; i < fwspec->num_ids; ++i) { in arm_smmu_install_ste_for_dev() 1590 u32 sid = fwspec->ids[i]; in arm_smmu_install_ste_for_dev() 1595 if (fwspec->ids[j] == sid) in arm_smmu_install_ste_for_dev() 1757 struct iommu_fwspec *fwspec = dev->iommu_fwspec; in arm_smmu_add_device() local 1760 if (!fwspec || fwspec->ops != &arm_smmu_ops) in arm_smmu_add_device() 1767 if (WARN_ON_ONCE(fwspec->iommu_priv)) { in arm_smmu_add_device() 1768 master = fwspec->iommu_priv; in arm_smmu_add_device() 1771 smmu = arm_smmu_get_by_node(to_of_node(fwspec->iommu_fwnode)); in arm_smmu_add_device() [all …]
|
/drivers/pinctrl/stm32/ |
D | pinctrl-stm32.c | 190 struct irq_fwspec fwspec; in stm32_gpio_to_irq() local 192 fwspec.fwnode = bank->fwnode; in stm32_gpio_to_irq() 193 fwspec.param_count = 2; in stm32_gpio_to_irq() 194 fwspec.param[0] = offset; in stm32_gpio_to_irq() 195 fwspec.param[1] = IRQ_TYPE_NONE; in stm32_gpio_to_irq() 197 return irq_create_fwspec_mapping(&fwspec); in stm32_gpio_to_irq() 219 struct irq_fwspec *fwspec, in stm32_gpio_domain_translate() argument 223 if ((fwspec->param_count != 2) || in stm32_gpio_domain_translate() 224 (fwspec->param[0] >= STM32_GPIO_IRQ_LINE)) in stm32_gpio_domain_translate() 227 *hwirq = fwspec->param[0]; in stm32_gpio_domain_translate() [all …]
|