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Searched refs:io_base (Results 1 – 25 of 96) sorted by relevance

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/drivers/staging/vt6655/
Dmac.c77 void __iomem *io_base = priv->PortOffset; in MACbIsRegBitsOn() local
79 return (ioread8(io_base + byRegOfs) & byTestBits) == byTestBits; in MACbIsRegBitsOn()
100 void __iomem *io_base = priv->PortOffset; in MACbIsRegBitsOff() local
102 return !(ioread8(io_base + byRegOfs) & byTestBits); in MACbIsRegBitsOff()
120 void __iomem *io_base = priv->PortOffset; in MACbIsIntDisable() local
122 if (ioread32(io_base + MAC_REG_IMR)) in MACbIsIntDisable()
145 void __iomem *io_base = priv->PortOffset; in MACvSetShortRetryLimit() local
147 iowrite8(byRetryLimit, io_base + MAC_REG_SRT); in MACvSetShortRetryLimit()
168 void __iomem *io_base = priv->PortOffset; in MACvSetLongRetryLimit() local
170 iowrite8(byRetryLimit, io_base + MAC_REG_LRT); in MACvSetLongRetryLimit()
[all …]
/drivers/watchdog/
Dni903x_wdt.c49 u16 io_base; member
67 u8 control = inb(wdt->io_base + NIWD_CONTROL); in ni903x_start()
69 outb(control | NIWD_CONTROL_RESET, wdt->io_base + NIWD_CONTROL); in ni903x_start()
70 outb(control | NIWD_CONTROL_PET, wdt->io_base + NIWD_CONTROL); in ni903x_start()
79 outb(((0x00FF0000 & counter) >> 16), wdt->io_base + NIWD_SEED2); in ni903x_wdd_set_timeout()
80 outb(((0x0000FF00 & counter) >> 8), wdt->io_base + NIWD_SEED1); in ni903x_wdd_set_timeout()
81 outb((0x000000FF & counter), wdt->io_base + NIWD_SEED0); in ni903x_wdd_set_timeout()
94 control = inb(wdt->io_base + NIWD_CONTROL); in ni903x_wdd_get_timeleft()
96 outb(control, wdt->io_base + NIWD_CONTROL); in ni903x_wdd_get_timeleft()
98 counter2 = inb(wdt->io_base + NIWD_COUNTER2); in ni903x_wdd_get_timeleft()
[all …]
/drivers/mtd/nand/
Dams-delta.c68 void __iomem *io_base = (void __iomem *)nand_get_controller_data(this); in ams_delta_write_byte() local
70 writew(0, io_base + OMAP_MPUIO_IO_CNTL); in ams_delta_write_byte()
81 void __iomem *io_base = (void __iomem *)nand_get_controller_data(this); in ams_delta_read_byte() local
85 writew(~0, io_base + OMAP_MPUIO_IO_CNTL); in ams_delta_read_byte()
179 void __iomem *io_base; in ams_delta_init() local
202 io_base = ioremap(res->start, resource_size(res)); in ams_delta_init()
203 if (io_base == NULL) { in ams_delta_init()
209 nand_set_controller_data(this, (void *)io_base); in ams_delta_init()
212 this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH; in ams_delta_init()
213 this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT; in ams_delta_init()
[all …]
Dlpc32xx_slc.c230 void __iomem *io_base; member
252 writel(SLCCTRL_SW_RESET, SLC_CTRL(host->io_base)); in lpc32xx_nand_setup()
256 writel(0, SLC_CFG(host->io_base)); in lpc32xx_nand_setup()
257 writel(0, SLC_IEN(host->io_base)); in lpc32xx_nand_setup()
259 SLC_ICR(host->io_base)); in lpc32xx_nand_setup()
275 writel(tmp, SLC_TAC(host->io_base)); in lpc32xx_nand_setup()
289 tmp = readl(SLC_CFG(host->io_base)); in lpc32xx_nand_cmd_ctrl()
294 writel(tmp, SLC_CFG(host->io_base)); in lpc32xx_nand_cmd_ctrl()
298 writel(cmd, SLC_CMD(host->io_base)); in lpc32xx_nand_cmd_ctrl()
300 writel(cmd, SLC_ADDR(host->io_base)); in lpc32xx_nand_cmd_ctrl()
[all …]
Dlpc32xx_mlc.c190 void __iomem *io_base; member
246 writel(MLCCMD_RESET, MLC_CMD(host->io_base)); in lpc32xx_nand_setup()
256 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); in lpc32xx_nand_setup()
260 writel(tmp, MLC_ICR(host->io_base)); in lpc32xx_nand_setup()
264 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); in lpc32xx_nand_setup()
275 writel(tmp, MLC_TIME_REG(host->io_base)); in lpc32xx_nand_setup()
279 MLC_IRQ_MR(host->io_base)); in lpc32xx_nand_setup()
282 writel(MLCCEH_NORMAL, MLC_CEH(host->io_base)); in lpc32xx_nand_setup()
296 writel(cmd, MLC_CMD(host->io_base)); in lpc32xx_nand_cmd_ctrl()
298 writel(cmd, MLC_ADDR(host->io_base)); in lpc32xx_nand_cmd_ctrl()
[all …]
Dsocrates_nand.c33 void __iomem *io_base; member
51 out_be32(host->io_base, FPGA_NAND_ENABLE | in socrates_nand_write_buf()
72 out_be32(host->io_base, val); in socrates_nand_read_buf()
74 buf[i] = (in_be32(host->io_base) >> in socrates_nand_read_buf()
124 out_be32(host->io_base, val); in socrates_nand_cmd_ctrl()
135 if (in_be32(host->io_base) & FPGA_NAND_BUSY) in socrates_nand_device_ready()
155 host->io_base = of_iomap(ofdev->dev.of_node, 0); in socrates_nand_probe()
156 if (host->io_base == NULL) { in socrates_nand_probe()
209 iounmap(host->io_base); in socrates_nand_probe()
223 iounmap(host->io_base); in socrates_nand_remove()
Dorion_nand.c56 void __iomem *io_base = chip->IO_ADDR_R; in orion_nand_read_buf() local
61 *buf++ = readb(io_base); in orion_nand_read_buf()
73 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); in orion_nand_read_buf()
78 buf[i++] = readb(io_base); in orion_nand_read_buf()
88 void __iomem *io_base; in orion_nand_probe() local
101 io_base = devm_ioremap_resource(&pdev->dev, res); in orion_nand_probe()
103 if (IS_ERR(io_base)) in orion_nand_probe()
104 return PTR_ERR(io_base); in orion_nand_probe()
135 nc->IO_ADDR_R = nc->IO_ADDR_W = io_base; in orion_nand_probe()
Dplat_nand.c23 void __iomem *io_base; member
55 data->io_base = devm_ioremap_resource(&pdev->dev, res); in plat_nand_probe()
56 if (IS_ERR(data->io_base)) in plat_nand_probe()
57 return PTR_ERR(data->io_base); in plat_nand_probe()
63 data->chip.IO_ADDR_R = data->io_base; in plat_nand_probe()
64 data->chip.IO_ADDR_W = data->io_base; in plat_nand_probe()
Dfsl_upm.c40 void __iomem *io_base; member
120 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr]; in fun_select_chip()
165 fun->chip.IO_ADDR_R = fun->io_base; in fun_chip_init()
166 fun->chip.IO_ADDR_W = fun->io_base; in fun_chip_init()
294 fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start, in fun_probe()
296 if (!fun->io_base) { in fun_probe()
/drivers/hwspinlock/
Du8500_hsem.c100 void __iomem *io_base; in u8500_hsem_probe() local
111 io_base = ioremap(res->start, resource_size(res)); in u8500_hsem_probe()
112 if (!io_base) in u8500_hsem_probe()
116 val = readl(io_base + HSEM_CTRL_REG); in u8500_hsem_probe()
117 writel((val & ~HSEM_PROTOCOL_1), io_base + HSEM_CTRL_REG); in u8500_hsem_probe()
120 writel(0xFFFF, io_base + HSEM_ICRALL); in u8500_hsem_probe()
131 hwlock->priv = io_base + HSEM_REGISTER_OFFSET + sizeof(u32) * i; in u8500_hsem_probe()
147 iounmap(io_base); in u8500_hsem_probe()
154 void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET; in u8500_hsem_remove() local
158 writel(0xFFFF, io_base + HSEM_ICRALL); in u8500_hsem_remove()
[all …]
Domap_hwspinlock.c88 void __iomem *io_base; in omap_hwspinlock_probe() local
100 io_base = ioremap(res->start, resource_size(res)); in omap_hwspinlock_probe()
101 if (!io_base) in omap_hwspinlock_probe()
116 i = readl(io_base + SYSSTATUS_OFFSET); in omap_hwspinlock_probe()
144 hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i; in omap_hwspinlock_probe()
157 iounmap(io_base); in omap_hwspinlock_probe()
164 void __iomem *io_base = bank->lock[0].priv - LOCK_BASE_OFFSET; in omap_hwspinlock_remove() local
174 iounmap(io_base); in omap_hwspinlock_remove()
Dsirf_hwspinlock.c24 void __iomem *io_base; member
71 hwspin->io_base = of_iomap(pdev->dev.of_node, 0); in sirf_hwspinlock_probe()
72 if (!hwspin->io_base) in sirf_hwspinlock_probe()
77 hwlock->priv = hwspin->io_base + HW_SPINLOCK_OFFSET(idx); in sirf_hwspinlock_probe()
94 iounmap(hwspin->io_base); in sirf_hwspinlock_probe()
112 iounmap(hwspin->io_base); in sirf_hwspinlock_remove()
/drivers/mtd/devices/
Dspear_smi.c174 void __iomem *io_base; member
229 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_read_sr()
231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1); in spear_smi_read_sr()
235 dev->io_base + SMI_CR2); in spear_smi_read_sr()
248 writel(ctrlreg1, dev->io_base + SMI_CR1); in spear_smi_read_sr()
249 writel(0, dev->io_base + SMI_CR2); in spear_smi_read_sr()
301 status = readl(dev->io_base + SMI_SR); in spear_smi_int_handler()
307 writel(0, dev->io_base + SMI_SR); in spear_smi_int_handler()
343 writel(0, dev->io_base + SMI_SR); in spear_smi_hw_init()
345 writel(val, dev->io_base + SMI_CR1); in spear_smi_hw_init()
[all …]
/drivers/mtd/spi-nor/
Dnxp-spifi.c61 void __iomem *io_base; member
73 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_wait_for_cmd()
86 writel(SPIFI_STAT_RESET, spifi->io_base + SPIFI_STAT); in nxp_spifi_reset()
87 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_reset()
119 writel(spifi->mcmd, spifi->io_base + SPIFI_MCMD); in nxp_spifi_set_memory_mode_on()
120 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_set_memory_mode_on()
144 writel(cmd, spifi->io_base + SPIFI_CMD); in nxp_spifi_read_reg()
147 *buf++ = readb(spifi->io_base + SPIFI_DATA); in nxp_spifi_read_reg()
167 writel(cmd, spifi->io_base + SPIFI_CMD); in nxp_spifi_write_reg()
170 writeb(*buf++, spifi->io_base + SPIFI_DATA); in nxp_spifi_write_reg()
[all …]
/drivers/input/keyboard/
Dspear-keyboard.c57 void __iomem *io_base; member
76 sts = readl_relaxed(kbd->io_base + STATUS_REG); in spear_kbd_interrupt()
86 val = readl_relaxed(kbd->io_base + DATA_REG) & in spear_kbd_interrupt()
97 writel_relaxed(0, kbd->io_base + STATUS_REG); in spear_kbd_interrupt()
121 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); in spear_kbd_open()
122 writel_relaxed(1, kbd->io_base + STATUS_REG); in spear_kbd_open()
125 val = readl_relaxed(kbd->io_base + MODE_CTL_REG); in spear_kbd_open()
127 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); in spear_kbd_open()
138 val = readl_relaxed(kbd->io_base + MODE_CTL_REG); in spear_kbd_close()
140 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); in spear_kbd_close()
[all …]
/drivers/scsi/
DNCR_Q720.c148 __u16 io_base; in NCR_Q720_probe() local
161 io_base = (pos2 & NCR_Q720_POS2_IO_MASK) << NCR_Q720_POS2_IO_SHIFT; in NCR_Q720_probe()
170 io_base = mca_device_transform_ioport(mca_dev, io_base); in NCR_Q720_probe()
177 i = inb(io_base) | (inb(io_base+1)<<8); in NCR_Q720_probe()
179 …tk(KERN_ERR "NCR_Q720, adapter failed to I/O map registers correctly at 0x%x(0x%x)\n", io_base, i); in NCR_Q720_probe()
185 pos4 = inb(io_base + 4); in NCR_Q720_probe()
188 outb(pos4, io_base + 4); in NCR_Q720_probe()
191 asr10 = inb(io_base + 0x12); in NCR_Q720_probe()
197 asr9 = inb(io_base + 0x11); in NCR_Q720_probe()
210 outb(asr9, io_base + 0x11); in NCR_Q720_probe()
[all …]
/drivers/platform/x86/
Dfujitsu-tablet.c177 int io_base; member
183 return inb(fujitsu.io_base + 2); in fujitsu_ack()
188 return inb(fujitsu.io_base + 6); in fujitsu_status()
193 outb(addr, fujitsu.io_base); in fujitsu_read_register()
194 return inb(fujitsu.io_base + 4); in fujitsu_read_register()
442 fujitsu.io_base = res->data.io.minimum; in fujitsu_walk_resources()
447 if (fujitsu.irq && fujitsu.io_base) in fujitsu_walk_resources()
467 if (ACPI_FAILURE(status) || !fujitsu.irq || !fujitsu.io_base) in acpi_fujitsu_add()
481 if (!request_region(fujitsu.io_base, fujitsu.io_length, MODULENAME)) { in acpi_fujitsu_add()
491 release_region(fujitsu.io_base, fujitsu.io_length); in acpi_fujitsu_add()
[all …]
/drivers/char/hw_random/
Dtimeriomem-rng.c37 void __iomem *io_base; member
72 *data = readl(priv->io_base); in timeriomem_rng_data_read()
161 priv->io_base = devm_ioremap_resource(&pdev->dev, res); in timeriomem_rng_probe()
162 if (IS_ERR(priv->io_base)) { in timeriomem_rng_probe()
163 err = PTR_ERR(priv->io_base); in timeriomem_rng_probe()
174 priv->io_base, period); in timeriomem_rng_probe()
/drivers/gpio/
Dgpio-it87.c71 u16 io_base; member
201 reg = (gpio_num / 8) + it87_gpio->io_base; in it87_gpio_get()
239 reg = (gpio_num / 8) + it87_gpio->io_base; in it87_gpio_set()
347 it87_gpio->io_base = superio_inw(gpio_ba_reg); in it87_gpio_init()
353 it87_gpio->io_base); in it87_gpio_init()
355 if (!request_region(it87_gpio->io_base, it87_gpio->io_size, in it87_gpio_init()
397 release_region(it87_gpio->io_base, it87_gpio->io_size); in it87_gpio_init()
406 release_region(it87_gpio->io_base, it87_gpio->io_size); in it87_gpio_exit()
/drivers/pcmcia/
Di82092.c59 unsigned int io_base; /* base io address of the socket */ member
107 sockets[i].io_base = pci_resource_start(dev, 0); in i82092aa_pci_probe()
188 port = sockets[socket].io_base; in indirect_read()
203 port = sockets[socket].io_base;
220 port = sockets[socket].io_base; in indirect_write()
233 port = sockets[socket].io_base; in indirect_setbit()
250 port = sockets[socket].io_base; in indirect_resetbit()
266 port = sockets[socket].io_base; in indirect_write16()
366 if (sockets[socketno].io_base == 0) in card_present()
697 if (sockets[0].io_base>0) in i82092aa_module_exit()
[all …]
Delectra_cf.c54 unsigned int io_base; member
238 cf->io_base = (unsigned long)cf->io_virt - VMALLOC_END; in electra_cf_probe()
275 cf->socket.io_offset = cf->io_base; in electra_cf_probe()
284 if (!request_region(cf->io_base, cf->io_size, driver_name)) { in electra_cf_probe()
312 release_region(cf->io_base, cf->io_size); in electra_cf_probe()
348 release_region(cf->io_base, cf->io_size); in electra_cf_remove()
Dbcm63xx_pcmcia.c370 skt->io_base = ioremap(res->start, iomem_size); in bcm63xx_drv_pcmcia_probe()
371 if (!skt->io_base) { in bcm63xx_drv_pcmcia_probe()
382 sock->io_offset = (unsigned long)skt->io_base; in bcm63xx_drv_pcmcia_probe()
429 if (skt->io_base) in bcm63xx_drv_pcmcia_probe()
430 iounmap(skt->io_base); in bcm63xx_drv_pcmcia_probe()
447 iounmap(skt->io_base); in bcm63xx_drv_pcmcia_remove()
/drivers/of/
Dof_pci.c169 struct list_head *resources, resource_size_t *io_base) in of_pci_get_host_bridge_resources() argument
179 if (io_base) in of_pci_get_host_bridge_resources()
180 *io_base = (resource_size_t)OF_BAD_ADDR; in of_pci_get_host_bridge_resources()
239 if (!io_base) { in of_pci_get_host_bridge_resources()
245 if (*io_base != (resource_size_t)OF_BAD_ADDR) in of_pci_get_host_bridge_resources()
248 *io_base = range.cpu_addr; in of_pci_get_host_bridge_resources()
/drivers/fpga/
Dzynq-fpga.c125 void __iomem *io_base; member
134 writel(val, priv->io_base + offset); in zynq_fpga_write()
140 return readl(priv->io_base + offset); in zynq_fpga_read()
144 readl_poll_timeout(priv->io_base + addr, val, cond, sleep_us, \
422 priv->io_base = devm_ioremap_resource(dev, res); in zynq_fpga_probe()
423 if (IS_ERR(priv->io_base)) in zynq_fpga_probe()
424 return PTR_ERR(priv->io_base); in zynq_fpga_probe()
/drivers/video/fbdev/
Digafb.c65 unsigned long io_base; member
174 #define pci_inb(par, reg) readb(par->io_base+(reg))
175 #define pci_outb(par, val, reg) writeb(val, par->io_base+(reg))
449 if ((par->io_base = (int) ioremap(igafb_fix.mmio_start, igafb_fix.smem_len)) == 0) { in igafb_init()
468 iounmap((void *)par->io_base); in igafb_init()
529 iounmap((void *)par->io_base); in igafb_init()

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