1 /*
2 * drivers/mtd/nand/orion_nand.c
3 *
4 * NAND support for Marvell Orion SoC platforms
5 *
6 * Tzachi Perelstein <tzachi@marvell.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13 #include <linux/slab.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/of.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
22 #include <linux/io.h>
23 #include <asm/sizes.h>
24 #include <linux/platform_data/mtd-orion_nand.h>
25
26 struct orion_nand_info {
27 struct nand_chip chip;
28 struct clk *clk;
29 };
30
orion_nand_cmd_ctrl(struct mtd_info * mtd,int cmd,unsigned int ctrl)31 static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
32 {
33 struct nand_chip *nc = mtd_to_nand(mtd);
34 struct orion_nand_data *board = nand_get_controller_data(nc);
35 u32 offs;
36
37 if (cmd == NAND_CMD_NONE)
38 return;
39
40 if (ctrl & NAND_CLE)
41 offs = (1 << board->cle);
42 else if (ctrl & NAND_ALE)
43 offs = (1 << board->ale);
44 else
45 return;
46
47 if (nc->options & NAND_BUSWIDTH_16)
48 offs <<= 1;
49
50 writeb(cmd, nc->IO_ADDR_W + offs);
51 }
52
orion_nand_read_buf(struct mtd_info * mtd,uint8_t * buf,int len)53 static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
54 {
55 struct nand_chip *chip = mtd_to_nand(mtd);
56 void __iomem *io_base = chip->IO_ADDR_R;
57 uint64_t *buf64;
58 int i = 0;
59
60 while (len && (unsigned long)buf & 7) {
61 *buf++ = readb(io_base);
62 len--;
63 }
64 buf64 = (uint64_t *)buf;
65 while (i < len/8) {
66 /*
67 * Since GCC has no proper constraint (PR 43518)
68 * force x variable to r2/r3 registers as ldrd instruction
69 * requires first register to be even.
70 */
71 register uint64_t x asm ("r2");
72
73 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
74 buf64[i++] = x;
75 }
76 i *= 8;
77 while (i < len)
78 buf[i++] = readb(io_base);
79 }
80
orion_nand_probe(struct platform_device * pdev)81 static int __init orion_nand_probe(struct platform_device *pdev)
82 {
83 struct orion_nand_info *info;
84 struct mtd_info *mtd;
85 struct nand_chip *nc;
86 struct orion_nand_data *board;
87 struct resource *res;
88 void __iomem *io_base;
89 int ret = 0;
90 u32 val = 0;
91
92 info = devm_kzalloc(&pdev->dev,
93 sizeof(struct orion_nand_info),
94 GFP_KERNEL);
95 if (!info)
96 return -ENOMEM;
97 nc = &info->chip;
98 mtd = nand_to_mtd(nc);
99
100 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
101 io_base = devm_ioremap_resource(&pdev->dev, res);
102
103 if (IS_ERR(io_base))
104 return PTR_ERR(io_base);
105
106 if (pdev->dev.of_node) {
107 board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
108 GFP_KERNEL);
109 if (!board)
110 return -ENOMEM;
111 if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
112 board->cle = (u8)val;
113 else
114 board->cle = 0;
115 if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
116 board->ale = (u8)val;
117 else
118 board->ale = 1;
119 if (!of_property_read_u32(pdev->dev.of_node,
120 "bank-width", &val))
121 board->width = (u8)val * 8;
122 else
123 board->width = 8;
124 if (!of_property_read_u32(pdev->dev.of_node,
125 "chip-delay", &val))
126 board->chip_delay = (u8)val;
127 } else {
128 board = dev_get_platdata(&pdev->dev);
129 }
130
131 mtd->dev.parent = &pdev->dev;
132
133 nand_set_controller_data(nc, board);
134 nand_set_flash_node(nc, pdev->dev.of_node);
135 nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
136 nc->cmd_ctrl = orion_nand_cmd_ctrl;
137 nc->read_buf = orion_nand_read_buf;
138 nc->ecc.mode = NAND_ECC_SOFT;
139 nc->ecc.algo = NAND_ECC_HAMMING;
140
141 if (board->chip_delay)
142 nc->chip_delay = board->chip_delay;
143
144 WARN(board->width > 16,
145 "%d bit bus width out of range",
146 board->width);
147
148 if (board->width == 16)
149 nc->options |= NAND_BUSWIDTH_16;
150
151 if (board->dev_ready)
152 nc->dev_ready = board->dev_ready;
153
154 platform_set_drvdata(pdev, info);
155
156 /* Not all platforms can gate the clock, so it is not
157 an error if the clock does not exists. */
158 info->clk = devm_clk_get(&pdev->dev, NULL);
159 if (!IS_ERR(info->clk))
160 clk_prepare_enable(info->clk);
161
162 if (nand_scan(mtd, 1)) {
163 ret = -ENXIO;
164 goto no_dev;
165 }
166
167 mtd->name = "orion_nand";
168 ret = mtd_device_register(mtd, board->parts, board->nr_parts);
169 if (ret) {
170 nand_release(mtd);
171 goto no_dev;
172 }
173
174 return 0;
175
176 no_dev:
177 if (!IS_ERR(info->clk))
178 clk_disable_unprepare(info->clk);
179
180 return ret;
181 }
182
orion_nand_remove(struct platform_device * pdev)183 static int orion_nand_remove(struct platform_device *pdev)
184 {
185 struct orion_nand_info *info = platform_get_drvdata(pdev);
186 struct nand_chip *chip = &info->chip;
187 struct mtd_info *mtd = nand_to_mtd(chip);
188
189 nand_release(mtd);
190
191 if (!IS_ERR(info->clk))
192 clk_disable_unprepare(info->clk);
193
194 return 0;
195 }
196
197 #ifdef CONFIG_OF
198 static const struct of_device_id orion_nand_of_match_table[] = {
199 { .compatible = "marvell,orion-nand", },
200 {},
201 };
202 MODULE_DEVICE_TABLE(of, orion_nand_of_match_table);
203 #endif
204
205 static struct platform_driver orion_nand_driver = {
206 .remove = orion_nand_remove,
207 .driver = {
208 .name = "orion_nand",
209 .of_match_table = of_match_ptr(orion_nand_of_match_table),
210 },
211 };
212
213 module_platform_driver_probe(orion_nand_driver, orion_nand_probe);
214
215 MODULE_LICENSE("GPL");
216 MODULE_AUTHOR("Tzachi Perelstein");
217 MODULE_DESCRIPTION("NAND glue for Orion platforms");
218 MODULE_ALIAS("platform:orion_nand");
219