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Searched refs:num_lanes (Results 1 – 23 of 23) sorted by relevance

/drivers/gpu/drm/amd/powerplay/hwmgr/
Dpppcielanes.c56 uint8_t encode_pcie_lane_width(uint32_t num_lanes) in encode_pcie_lane_width() argument
58 return pp_r600_encode_lanes[num_lanes]; in encode_pcie_lane_width()
61 uint8_t decode_pcie_lane_width(uint32_t num_lanes) in decode_pcie_lane_width() argument
63 return pp_r600_decoded_lanes[num_lanes]; in decode_pcie_lane_width()
Dpppcielanes.h27 extern uint8_t encode_pcie_lane_width(uint32_t num_lanes);
28 extern uint8_t decode_pcie_lane_width(uint32_t num_lanes);
/drivers/nvdimm/
Dregion.c26 if (nd_region->num_lanes > num_online_cpus() in nd_region_probe()
27 && nd_region->num_lanes < num_possible_cpus() in nd_region_probe()
30 num_online_cpus(), nd_region->num_lanes, in nd_region_probe()
33 nd_region->num_lanes); in nd_region_probe()
Dregion_devs.c764 if (nd_region->num_lanes < nr_cpu_ids) { in nd_region_acquire_lane()
767 lane = cpu % nd_region->num_lanes; in nd_region_acquire_lane()
781 if (nd_region->num_lanes < nr_cpu_ids) { in nd_region_release_lane()
875 nd_region->num_lanes = ndr_desc->num_lanes; in nd_region_create()
904 ndr_desc->num_lanes = ND_MAX_LANES; in nvdimm_pmem_region_create()
915 ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES); in nvdimm_blk_region_create()
924 ndr_desc->num_lanes = ND_MAX_LANES; in nvdimm_volatile_region_create()
Dnd.h155 int id, num_lanes, ro, numa_node; member
/drivers/gpu/drm/bridge/adv7511/
Dadv7533.c233 u32 num_lanes; in adv7533_parse_dt() local
236 of_property_read_u32(np, "adi,dsi-lanes", &num_lanes); in adv7533_parse_dt()
238 if (num_lanes < 1 || num_lanes > 4) in adv7533_parse_dt()
241 adv->num_dsi_lanes = num_lanes; in adv7533_parse_dt()
/drivers/media/platform/exynos4-is/
Dmipi-csis.c219 u32 num_lanes; member
325 mask = (1 << (state->num_lanes + 1)) - 1; in s5pcsis_system_enable()
363 val = (val & ~S5PCSIS_CFG_NR_LANE_MASK) | (state->num_lanes - 1); in s5pcsis_set_params()
754 state->num_lanes = endpoint.bus.mipi_csi2.num_data_lanes; in s5pcsis_parse_dt()
793 if (state->num_lanes == 0 || state->num_lanes > state->max_num_lanes) { in s5pcsis_probe()
795 state->num_lanes, state->max_num_lanes); in s5pcsis_probe()
879 state->num_lanes, state->hs_settle, state->wclk_ext, in s5pcsis_probe()
/drivers/gpu/drm/bridge/
Dtc358767.c392 if (tc->link.base.num_lanes == 2) in tc_srcctrl()
611 if (tc->link.base.num_lanes > 2) { in tc_get_display_props()
613 tc->link.base.num_lanes = 2; in tc_get_display_props()
635 tc->link.base.num_lanes, in tc_get_display_props()
789 if ((tc->link.base.num_lanes == 2) && in tc_link_training()
795 if ((tc->link.base.num_lanes == 1) && in tc_link_training()
967 !(drm_dp_channel_eq_ok(tmp + 2, tc->link.base.num_lanes))); in tc_main_link_setup()
/drivers/gpu/drm/tegra/
Ddpaux.c745 for (i = 0; i < link->num_lanes; i++) in drm_dp_aux_train()
752 link->num_lanes); in drm_dp_aux_train()
764 if (!drm_dp_clock_recovery_ok(status, link->num_lanes)) in drm_dp_aux_train()
770 if (!drm_dp_channel_eq_ok(status, link->num_lanes)) in drm_dp_aux_train()
Dsor.c410 for (i = 0, value = 0; i < link->num_lanes; i++) { in tegra_sor_dp_train_fast()
431 for (i = 0, value = 0; i < link->num_lanes; i++) { in tegra_sor_dp_train_fast()
446 for (i = 0, value = 0; i < link->num_lanes; i++) { in tegra_sor_dp_train_fast()
714 if (!link_rate || !link->num_lanes || !pclk || !config->bits_per_pixel) in tegra_sor_compute_config()
717 output = link_rate * 8 * link->num_lanes; in tegra_sor_compute_config()
761 (link->num_lanes * 8); in tegra_sor_compute_config()
781 config->hblank_symbols -= 12 / link->num_lanes; in tegra_sor_compute_config()
786 config->vblank_symbols -= 36 / link->num_lanes + 4; in tegra_sor_compute_config()
1637 if (link.num_lanes <= 2) in tegra_sor_edp_enable()
1642 if (link.num_lanes <= 1) in tegra_sor_edp_enable()
[all …]
/drivers/staging/greybus/
Dgb-camera.h46 unsigned int num_lanes; member
Dcamera.c364 __u8 num_lanes; member
420 csi_cfg.num_lanes = GB_CAMERA_CSI_NUM_DATA_LANES; in gb_camera_setup_data_connection()
445 csi_params->num_lanes = csi_cfg.num_lanes; in gb_camera_setup_data_connection()
/drivers/phy/tegra/
Dxusb.c42 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
202 pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), in tegra_xusb_pad_register()
209 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_register()
257 unsigned int i = pad->soc->num_lanes; in tegra_xusb_pad_unregister()
340 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_program()
Dxusb-tegra124.c669 .num_lanes = ARRAY_SIZE(tegra124_usb2_lanes),
804 .num_lanes = ARRAY_SIZE(tegra124_ulpi_lanes),
1020 .num_lanes = ARRAY_SIZE(tegra124_hsic_lanes),
1208 .num_lanes = ARRAY_SIZE(tegra124_pcie_lanes),
1404 .num_lanes = ARRAY_SIZE(tegra124_sata_lanes),
Dxusb.h142 unsigned int num_lanes; member
Dxusb-tegra210.c1157 .num_lanes = ARRAY_SIZE(tegra210_usb2_lanes),
1411 .num_lanes = ARRAY_SIZE(tegra210_hsic_lanes),
1595 .num_lanes = ARRAY_SIZE(tegra210_pcie_lanes),
1759 .num_lanes = ARRAY_SIZE(tegra210_sata_lanes),
/drivers/gpu/drm/msm/dsi/
Ddsi_host.c1556 int ret, i, len, num_lanes; in dsi_host_parse_lane_data() local
1564 num_lanes = len / sizeof(u32); in dsi_host_parse_lane_data()
1566 if (num_lanes < 1 || num_lanes > 4) { in dsi_host_parse_lane_data()
1571 msm_host->num_data_lanes = num_lanes; in dsi_host_parse_lane_data()
1574 num_lanes); in dsi_host_parse_lane_data()
1595 for (j = 0; j < num_lanes; j++) { in dsi_host_parse_lane_data()
1604 if (j == num_lanes) { in dsi_host_parse_lane_data()
/drivers/gpu/drm/
Ddrm_dp_helper.c339 link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK; in drm_dp_link_probe()
430 values[1] = link->num_lanes; in drm_dp_link_configure()
/drivers/gpu/drm/msm/edp/
Dedp_ctrl.c414 u8 max_lane = ctrl->dp_link.num_lanes; in edp_fill_link_cfg()
712 max_lane = ctrl->dp_link.num_lanes; in edp_link_rate_down_shift()
770 dp_link.num_lanes = ctrl->lane_cnt; in edp_do_link_train()
/drivers/pinctrl/tegra/
Dpinctrl-tegra-xusb.c70 unsigned int num_lanes; member
866 .num_lanes = ARRAY_SIZE(tegra124_lanes),
/drivers/gpu/drm/omapdrm/dss/
Ddsi.c3755 int num_lanes; in dsi_configure_pins() local
3776 num_lanes = 0; in dsi_configure_pins()
3805 num_lanes++; in dsi_configure_pins()
3809 dsi->num_lanes_used = num_lanes; in dsi_configure_pins()
/drivers/video/fbdev/omap2/omapfb/dss/
Ddsi.c3756 int num_lanes; in dsi_configure_pins() local
3777 num_lanes = 0; in dsi_configure_pins()
3806 num_lanes++; in dsi_configure_pins()
3810 dsi->num_lanes_used = num_lanes; in dsi_configure_pins()
/drivers/acpi/nfit/
Dcore.c2153 ndr_desc->num_lanes = nfit_mem->bdw->windows; in acpi_nfit_init_mapping()