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Searched refs:pcr (Results 1 – 25 of 33) sorted by relevance

12

/drivers/mfd/
Drtsx_pcr.c69 static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr) in rtsx_pci_enable_aspm() argument
71 rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, in rtsx_pci_enable_aspm()
72 0xFC, pcr->aspm_en); in rtsx_pci_enable_aspm()
75 static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr) in rtsx_pci_disable_aspm() argument
77 rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, in rtsx_pci_disable_aspm()
81 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
84 if (pcr->remove_pci) in rtsx_pci_start_run()
87 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
88 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
89 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
[all …]
Drts5249.c28 static u8 rts5249_get_ic_version(struct rtsx_pcr *pcr) in rts5249_get_ic_version() argument
32 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5249_get_ic_version()
36 static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage) in rts5249_fill_driving() argument
54 drive_sel = pcr->sd30_drive_sel_3v3; in rts5249_fill_driving()
57 drive_sel = pcr->sd30_drive_sel_1v8; in rts5249_fill_driving()
60 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL, in rts5249_fill_driving()
62 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL, in rts5249_fill_driving()
64 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL, in rts5249_fill_driving()
68 static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr) in rtsx_base_fetch_vendor_settings() argument
72 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); in rtsx_base_fetch_vendor_settings()
[all …]
Drts5227.c29 static u8 rts5227_get_ic_version(struct rtsx_pcr *pcr) in rts5227_get_ic_version() argument
33 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5227_get_ic_version()
37 static void rts5227_fill_driving(struct rtsx_pcr *pcr, u8 voltage) in rts5227_fill_driving() argument
55 drive_sel = pcr->sd30_drive_sel_3v3; in rts5227_fill_driving()
58 drive_sel = pcr->sd30_drive_sel_1v8; in rts5227_fill_driving()
61 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL, in rts5227_fill_driving()
63 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL, in rts5227_fill_driving()
65 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL, in rts5227_fill_driving()
69 static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr) in rts5227_fetch_vendor_settings() argument
73 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); in rts5227_fetch_vendor_settings()
[all …]
Drts5229.c28 static u8 rts5229_get_ic_version(struct rtsx_pcr *pcr) in rts5229_get_ic_version() argument
32 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5229_get_ic_version()
36 static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr) in rts5229_fetch_vendor_settings() argument
40 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); in rts5229_fetch_vendor_settings()
41 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); in rts5229_fetch_vendor_settings()
46 pcr->aspm_en = rtsx_reg_to_aspm(reg); in rts5229_fetch_vendor_settings()
47 pcr->sd30_drive_sel_1v8 = in rts5229_fetch_vendor_settings()
49 pcr->card_drive_sel &= 0x3F; in rts5229_fetch_vendor_settings()
50 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); in rts5229_fetch_vendor_settings()
52 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg); in rts5229_fetch_vendor_settings()
[all …]
Drts5209.c28 static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr) in rts5209_get_ic_version() argument
32 val = rtsx_pci_readb(pcr, 0x1C); in rts5209_get_ic_version()
36 static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr) in rts5209_fetch_vendor_settings() argument
40 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); in rts5209_fetch_vendor_settings()
41 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); in rts5209_fetch_vendor_settings()
45 pcr->flags |= PCR_MS_PMOS; in rts5209_fetch_vendor_settings()
46 pcr->aspm_en = rts5209_reg_to_aspm(reg); in rts5209_fetch_vendor_settings()
49 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg); in rts5209_fetch_vendor_settings()
50 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); in rts5209_fetch_vendor_settings()
53 pcr->sd30_drive_sel_1v8 = in rts5209_fetch_vendor_settings()
[all …]
Drtl8411.c30 static u8 rtl8411_get_ic_version(struct rtsx_pcr *pcr) in rtl8411_get_ic_version() argument
34 rtsx_pci_read_register(pcr, SYS_VER, &val); in rtl8411_get_ic_version()
38 static int rtl8411b_is_qfn48(struct rtsx_pcr *pcr) in rtl8411b_is_qfn48() argument
42 rtsx_pci_read_register(pcr, RTL8411B_PACKAGE_MODE, &val); in rtl8411b_is_qfn48()
50 static void rtl8411_fetch_vendor_settings(struct rtsx_pcr *pcr) in rtl8411_fetch_vendor_settings() argument
55 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg1); in rtl8411_fetch_vendor_settings()
56 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1); in rtl8411_fetch_vendor_settings()
61 pcr->aspm_en = rtsx_reg_to_aspm(reg1); in rtl8411_fetch_vendor_settings()
62 pcr->sd30_drive_sel_1v8 = in rtl8411_fetch_vendor_settings()
64 pcr->card_drive_sel &= 0x3F; in rtl8411_fetch_vendor_settings()
[all …]
Drtsx_pcr.h35 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
36 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
38 void rts5209_init_params(struct rtsx_pcr *pcr);
39 void rts5229_init_params(struct rtsx_pcr *pcr);
40 void rtl8411_init_params(struct rtsx_pcr *pcr);
41 void rtl8402_init_params(struct rtsx_pcr *pcr);
42 void rts5227_init_params(struct rtsx_pcr *pcr);
43 void rts522a_init_params(struct rtsx_pcr *pcr);
44 void rts5249_init_params(struct rtsx_pcr *pcr);
45 void rts524a_init_params(struct rtsx_pcr *pcr);
[all …]
/drivers/mmc/host/
Drtsx_pci_sdmmc.c38 struct rtsx_pcr *pcr; member
69 rtsx_pci_write_register(host->pcr, CARD_STOP, in sd_clear_error()
86 rtsx_pci_read_register(host->pcr, start + i + j, in dump_reg_range()
104 return rtsx_pci_readl(host->pcr, RTSX_BIPR) & SD_EXIST; in sd_get_cd_int()
107 static void sd_cmd_set_sd_cmd(struct rtsx_pcr *pcr, struct mmc_command *cmd) in sd_cmd_set_sd_cmd() argument
109 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF, in sd_cmd_set_sd_cmd()
111 rtsx_pci_write_be32(pcr, SD_CMD1, cmd->arg); in sd_cmd_set_sd_cmd()
114 static void sd_cmd_set_data_len(struct rtsx_pcr *pcr, u16 blocks, u16 blksz) in sd_cmd_set_data_len() argument
116 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, blocks); in sd_cmd_set_data_len()
117 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, blocks >> 8); in sd_cmd_set_data_len()
[all …]
/drivers/memstick/host/
Drtsx_pci_ms.c32 struct rtsx_pcr *pcr; member
52 rtsx_pci_write_register(host->pcr, CARD_STOP, in ms_clear_error()
60 struct rtsx_pcr *pcr = host->pcr; in ms_print_debug_regs() local
65 rtsx_pci_init_cmd(pcr); in ms_print_debug_regs()
67 rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0); in ms_print_debug_regs()
69 rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0); in ms_print_debug_regs()
70 rtsx_pci_send_cmd(pcr, 100); in ms_print_debug_regs()
72 ptr = rtsx_pci_get_cmd_data(pcr); in ms_print_debug_regs()
87 struct rtsx_pcr *pcr = host->pcr; in ms_power_on() local
90 rtsx_pci_init_cmd(pcr); in ms_power_on()
[all …]
/drivers/video/fbdev/
Dimxfb.c160 u_int pcr; member
354 u32 pcr = 0; in imxfb_check_var() local
390 pcr = (unsigned int)tmp; in imxfb_check_var()
392 if (--pcr > 0x3F) { in imxfb_check_var()
393 pcr = 0x3F; in imxfb_check_var()
395 lcd_clk / pcr); in imxfb_check_var()
400 pcr |= PCR_BPIX_18; in imxfb_check_var()
406 pcr |= PCR_BPIX_12; in imxfb_check_var()
408 pcr |= PCR_BPIX_16; in imxfb_check_var()
410 if (imxfb_mode->pcr & PCR_TFT) in imxfb_check_var()
[all …]
/drivers/pinctrl/
Dpinctrl-coh901.c77 u32 pcr; member
242 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_direction_input()
245 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_direction_input()
259 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_direction_output()
272 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_direction_output()
293 drmode = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_get()
358 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
363 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
366 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
371 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
[all …]
/drivers/atm/
Dhorizon.c2077 static int atm_pcr_check (struct atm_trafprm * tp, unsigned int pcr) { in atm_pcr_check() argument
2083 else if (tp->min_pcr && tp->min_pcr > pcr) in atm_pcr_check()
2093 else if (tp->max_pcr && tp->max_pcr != ATM_MAX_PCR && tp->max_pcr < pcr) in atm_pcr_check()
2101 pcr, tp->min_pcr, tp->pcr, tp->max_pcr); in atm_pcr_check()
2238 int pcr = atm_pcr_goal (txtp); in hrz_open() local
2240 if (!pcr) { in hrz_open()
2250 pcr = dev->tx_avail; in hrz_open()
2251 } else if (pcr < 0) { in hrz_open()
2253 pcr = -pcr; in hrz_open()
2257 error = make_rate_with_tolerance (dev, pcr, r, 10, in hrz_open()
[all …]
Diphase.c163 if (iavcc_r->pcr < dev->rate_limit) { in ia_hack_tcq()
361 srv_p->pcr = dev->LineRate; in init_abr_vc()
388 if (srv_p->pcr == 0) in ia_open_abr_vc()
390 if (srv_p->pcr > dev->LineRate) in ia_open_abr_vc()
391 srv_p->pcr = dev->LineRate; in ia_open_abr_vc()
394 if (srv_p->mcr > srv_p->pcr) in ia_open_abr_vc()
397 srv_p->icr = srv_p->pcr; in ia_open_abr_vc()
398 if ((srv_p->icr < srv_p->mcr) || (srv_p->icr > srv_p->pcr)) in ia_open_abr_vc()
430 f_abr_vc->f_pcr = cellrate_to_float(srv_p->pcr); in ia_open_abr_vc()
448 air = srv_p->pcr << (15 - srv_p->rif); in ia_open_abr_vc()
[all …]
Dfirestream.c988 int pcr = atm_pcr_goal (txtp); in fs_open() local
990 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr); in fs_open()
995 if (pcr > 51840000/53/8) pcr = 51840000/53/8; in fs_open()
997 if (pcr > 155520000/53/8) pcr = 155520000/53/8; in fs_open()
999 if (!pcr) { in fs_open()
1004 if (pcr < 0) { in fs_open()
1006 pcr = -pcr; in fs_open()
1010 error = make_rate (pcr, r, &tmc0, NULL); in fs_open()
1016 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr); in fs_open()
Dzatm.c787 static int alloc_shaper(struct atm_dev *dev,int *pcr,int min,int max,int ubr) in alloc_shaper() argument
804 *pcr = 0; in alloc_shaper()
833 *pcr = i*ATM_OC3_PCR/m; in alloc_shaper()
835 if ((min && *pcr < min) || (max && *pcr > max)) return -EINVAL; in alloc_shaper()
836 if (zatm_dev->tx_bw < *pcr) return -EAGAIN; in alloc_shaper()
837 zatm_dev->tx_bw -= *pcr; in alloc_shaper()
840 DPRINTK("i = %d, m = %d, PCR = %d\n",i,m,*pcr); in alloc_shaper()
941 int uninitialized_var(pcr); in open_tx_first()
944 if ((zatm_vcc->shaper = alloc_shaper(vcc->dev,&pcr, in open_tx_first()
950 if (pcr > ATM_OC3_PCR) pcr = ATM_OC3_PCR; in open_tx_first()
[all …]
Dambassador.c1061 int pcr = atm_pcr_goal (txtp); in amb_open() local
1062 if (!pcr) { in amb_open()
1069 if (pcr < 0) { in amb_open()
1071 pcr = -pcr; in amb_open()
1075 error = make_rate (pcr, r, &tx_rate_bits, NULL); in amb_open()
1085 pcr = atm_pcr_goal (txtp); in amb_open()
1086 PRINTD (DBG_QOS, "pcr goal = %d", pcr); in amb_open()
1125 pcr = atm_pcr_goal (rxtp); in amb_open()
1126 PRINTD (DBG_QOS, "pcr goal = %d", pcr); in amb_open()
Deni.c1250 static int comp_tx(struct eni_dev *eni_dev,int *pcr,int reserved,int *pre, in comp_tx() argument
1258 if (*pcr > 0) { in comp_tx()
1262 if (TS_CLOCK/pre_div[*pre]/64 <= *pcr) break; in comp_tx()
1263 div = pre_div[*pre]**pcr; in comp_tx()
1270 if (!*pcr) *pcr = eni_dev->tx_bw+reserved; in comp_tx()
1272 if (TS_CLOCK/pre_div[*pre]/64 > -*pcr) break; in comp_tx()
1274 div = pre_div[*pre]*-*pcr; in comp_tx()
1281 *pcr = TS_CLOCK/pre_div[*pre]/(*res+1); in comp_tx()
1282 DPRINTK("out pcr: %d (%d:%d)\n",*pcr,*pre,*res); in comp_tx()
1312 txtp->pcr = ATM_OC3_PCR; in reserve_or_set_tx()
[all …]
Diphase.h212 u32 pcr; member
250 u_short pcr; member
811 u32 pcr; /* Peak Cell Rate (24-bit) */ member
Dlanai.c2077 int x, icg, pcr = atm_pcr_goal(&qos->txtp); in pcr_to_cbricg() local
2078 if (pcr == 0) /* Use maximum bandwidth */ in pcr_to_cbricg()
2080 if (pcr < 0) { in pcr_to_cbricg()
2082 pcr = -pcr; in pcr_to_cbricg()
2084 x = pcr * 27; in pcr_to_cbricg()
2092 pcr, rounddown ? 'Y' : 'N', icg); in pcr_to_cbricg()
/drivers/media/platform/omap3isp/
Disph3a_af.c32 u32 pcr; in h3a_af_setup_regs() local
107 pcr = conf->rgb_pos << AF_RGBPOS_SHIFT; in h3a_af_setup_regs()
110 pcr |= AF_FVMODE; in h3a_af_setup_regs()
113 pcr |= AF_ALAW_EN; in h3a_af_setup_regs()
117 pcr |= AF_MED_EN; in h3a_af_setup_regs()
119 pcr |= conf->hmf.threshold << AF_MED_TH_SHIFT; in h3a_af_setup_regs()
123 AF_PCR_MASK, pcr); in h3a_af_setup_regs()
Disph3a_aewb.c31 u32 pcr; in h3a_aewb_setup_regs() local
47 pcr = conf->saturation_limit << ISPH3A_PCR_AEW_AVE2LMT_SHIFT; in h3a_aewb_setup_regs()
48 pcr |= !!conf->alaw_enable << ISPH3A_PCR_AEW_ALAW_EN_SHIFT; in h3a_aewb_setup_regs()
73 ISPH3A_PCR_AEW_MASK, pcr); in h3a_aewb_setup_regs()
/drivers/tty/serial/
Dsunsab.h36 u8 pcr; /* Port Configuration Register */ member
72 u8 pcr; member
108 u8 pcr; member
/drivers/net/wan/
Dn2.c342 u8 cnt, pcr; in n2_run() local
421 pcr = PCR_ENWIN | PCR_VPM | (USE_BUS16BITS ? PCR_BUS16 : 0); in n2_run()
422 outb(pcr, io + N2_PCR); in n2_run()
446 pcr |= PCR_RUNSCA; /* run SCA */ in n2_run()
447 outb(pcr, io + N2_PCR); in n2_run()
/drivers/scsi/qla2xxx/
Dqla_dbg.c760 WRT_REG_WORD(&reg->pcr, 0x2000); in qla2300_fw_dump()
763 WRT_REG_WORD(&reg->pcr, 0x2200); in qla2300_fw_dump()
766 WRT_REG_WORD(&reg->pcr, 0x2400); in qla2300_fw_dump()
769 WRT_REG_WORD(&reg->pcr, 0x2600); in qla2300_fw_dump()
772 WRT_REG_WORD(&reg->pcr, 0x2800); in qla2300_fw_dump()
775 WRT_REG_WORD(&reg->pcr, 0x2A00); in qla2300_fw_dump()
778 WRT_REG_WORD(&reg->pcr, 0x2C00); in qla2300_fw_dump()
781 WRT_REG_WORD(&reg->pcr, 0x2E00); in qla2300_fw_dump()
921 WRT_REG_WORD(&reg->pcr, 0x2000); in qla2100_fw_dump()
924 WRT_REG_WORD(&reg->pcr, 0x2100); in qla2100_fw_dump()
[all …]
/drivers/spi/
Dspi-au1550.c151 u32 pcr; in au1550_spi_reset_fifos() local
156 pcr = hw->regs->psc_spipcr; in au1550_spi_reset_fifos()
158 } while (pcr != 0); in au1550_spi_reset_fifos()

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