| /drivers/clocksource/ |
| D | timer-keystone.c | 80 u32 tcr; in keystone_timer_config() local
83 tcr = keystone_timer_readl(TCR); in keystone_timer_config()
84 off = tcr & ~(TCR_ENAMODE_MASK); in keystone_timer_config()
87 tcr |= mask; in keystone_timer_config()
106 keystone_timer_writel(tcr, TCR); in keystone_timer_config()
112 u32 tcr; in keystone_timer_disable() local
114 tcr = keystone_timer_readl(TCR); in keystone_timer_disable()
117 tcr &= ~(TCR_ENAMODE_MASK); in keystone_timer_disable()
118 keystone_timer_writel(tcr, TCR); in keystone_timer_disable()
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| /drivers/watchdog/ |
| D | txx9wdt.c | 61 &txx9wdt_reg->tcr); in txx9wdt_start()
71 __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE, in txx9wdt_stop()
72 &txx9wdt_reg->tcr); in txx9wdt_stop()
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| /drivers/tty/serial/ |
| D | sunsab.h | 17 u8 tcr; /* Termination Character Register */ member
48 u8 tcr; member
84 u8 tcr; member
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| D | dz.c | 811 unsigned short csr, tcr, trdy, mask; in dz_console_putchar() local
817 tcr = dz_in(dport, DZ_TCR); in dz_console_putchar()
818 tcr |= 1 << dport->port.line; in dz_console_putchar()
819 mask = tcr; in dz_console_putchar()
840 dz_out(dport, DZ_TCR, tcr); in dz_console_putchar()
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| /drivers/iommu/ |
| D | io-pgtable.h | 84 u64 tcr; member
95 u32 tcr; member
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| D | arm-smmu-v3.c | 334 #define ARM_SMMU_TCR2CD(tcr, fld) \ argument
335 (((tcr) >> ARM64_TCR_##fld##_SHIFT & ARM64_TCR_##fld##_MASK) \
543 u64 tcr; member
925 static u64 arm_smmu_cpu_tcr_to_cd(u64 tcr) in arm_smmu_cpu_tcr_to_cd() argument
930 val |= ARM_SMMU_TCR2CD(tcr, T0SZ); in arm_smmu_cpu_tcr_to_cd()
931 val |= ARM_SMMU_TCR2CD(tcr, TG0); in arm_smmu_cpu_tcr_to_cd()
932 val |= ARM_SMMU_TCR2CD(tcr, IRGN0); in arm_smmu_cpu_tcr_to_cd()
933 val |= ARM_SMMU_TCR2CD(tcr, ORGN0); in arm_smmu_cpu_tcr_to_cd()
934 val |= ARM_SMMU_TCR2CD(tcr, SH0); in arm_smmu_cpu_tcr_to_cd()
935 val |= ARM_SMMU_TCR2CD(tcr, EPD0); in arm_smmu_cpu_tcr_to_cd()
[all …]
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| D | io-pgtable-arm.c | 724 cfg->arm_lpae_s1_cfg.tcr = reg; in arm_64_lpae_alloc_pgtable_s1()
859 cfg->arm_lpae_s1_cfg.tcr |= ARM_32_LPAE_TCR_EAE; in arm_32_lpae_alloc_pgtable_s1()
860 cfg->arm_lpae_s1_cfg.tcr &= 0xffffffff; in arm_32_lpae_alloc_pgtable_s1()
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| D | arm-smmu.c | 772 reg = pgtbl_cfg->arm_v7s_cfg.tcr; in arm_smmu_init_context_bank()
775 reg = pgtbl_cfg->arm_lpae_s1_cfg.tcr; in arm_smmu_init_context_bank()
776 reg2 = pgtbl_cfg->arm_lpae_s1_cfg.tcr >> 32; in arm_smmu_init_context_bank()
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| D | msm_iommu.c | 283 SET_TTBCR(base, ctx, priv->cfg.arm_v7s_cfg.tcr); in __program_context()
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| D | io-pgtable-arm-v7s.c | 685 cfg->arm_v7s_cfg.tcr = ARM_V7S_TCR_PD1; in arm_v7s_alloc_pgtable()
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| /drivers/dma/sh/ |
| D | shdmac.c | 223 sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR); in dmae_set_reg()
295 sh_desc->hw.tcr, sh_desc->hw.sar, sh_desc->hw.dar); in sh_dmae_start_xfer()
393 sh_desc->hw.tcr = *len; in sh_dmae_desc_setup()
426 return sh_desc->hw.tcr - in sh_dmae_get_partial()
470 (sh_desc->hw.dar + sh_desc->hw.tcr) == dar_buf) || in sh_dmae_desc_completed()
472 (sh_desc->hw.sar + sh_desc->hw.tcr) == sar_buf); in sh_dmae_desc_completed()
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| D | shdma.h | 51 u32 tcr; /* TCR / transfer count */ member
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| D | rcar-dmac.c | 53 u32 tcr; member
728 hwdesc->tcr = chunk->size >> desc->xfer_shift; in rcar_dmac_fill_hwdesc()
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| /drivers/dma/bestcomm/ |
| D | fec.c | 128 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_fec_rx_reset()
229 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_fec_tx_reset()
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| D | gen_bd.c | 135 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_gen_bd_rx_reset()
219 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_gen_bd_tx_reset()
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| D | bestcomm.c | 315 out_be16(&bcom_eng->regs->tcr[task], 0); in bcom_engine_init()
349 out_be16(&bcom_eng->regs->tcr[task], 0); in bcom_engine_cleanup()
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| D | ata.c | 84 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_ata_init()
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| /drivers/atm/ |
| D | idt77252.c | 2151 int tcr, tcra; in idt77252_init_cbr() local
2166 tcr = atm_pcr_goal(&qos->txtp); in idt77252_init_cbr()
2167 tcra = tcr >= 0 ? tcr : -tcr; in idt77252_init_cbr()
2175 if (tcr > 0) { in idt77252_init_cbr()
2178 } else if (tcr == 0) { in idt77252_init_cbr()
2220 int tcr; in idt77252_init_ubr() local
2230 tcr = atm_pcr_goal(&qos->txtp); in idt77252_init_ubr()
2231 if (tcr == 0) in idt77252_init_ubr()
2232 tcr = card->link_pcr; in idt77252_init_ubr()
2234 vc->estimator = idt77252_init_est(vc, tcr); in idt77252_init_ubr()
[all …]
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| D | nicstar.c | 1234 int tcr, tcra; /* target cell rate, and absolute value */ in ns_open() local
1289 tcr = atm_pcr_goal(&(vcc->qos.txtp)); in ns_open()
1290 tcra = tcr >= 0 ? tcr : -tcr; in ns_open()
1301 if (tcr > 0) { in ns_open()
1304 } else if (tcr == 0) { in ns_open()
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| /drivers/staging/vt6655/ |
| D | desc.h | 228 volatile u8 tcr; member
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| D | device_main.c | 854 if (desc->td1.tcr & TCR_STP) { in device_tx_srv()
1115 head_td->td1.tcr = 0; in vnt_tx_packet()
1133 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU); in vnt_tx_packet()
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| /drivers/net/usb/ |
| D | rtl8150.c | 635 u8 cr, tcr, rcr, msr; in enable_net_traffic() local
642 tcr = 0xd8; in enable_net_traffic()
647 set_registers(dev, TCR, 1, &tcr); in enable_net_traffic()
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| /drivers/tty/ |
| D | synclink_gt.c | 4484 unsigned short tcr; in tx_set_idle() local
4489 tcr = rd_reg16(info, TCR); in tx_set_idle()
4492 tcr = (tcr & ~(BIT6 + BIT5)) | BIT4; in tx_set_idle()
4495 } else if (!(tcr & BIT6)) { in tx_set_idle()
4497 tcr &= ~(BIT5 + BIT4); in tx_set_idle()
4499 wr_reg16(info, TCR, tcr); in tx_set_idle()
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| /drivers/net/can/rcar/ |
| D | rcar_can.c | 77 u8 tcr; /* Test Control Register */ member
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