| /drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi_wp.c | 147 struct omap_video_timings *timings) in hdmi_wp_video_config_interface() argument
153 vsync_pol = timings->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
154 hsync_pol = timings->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
159 r = FLD_MOD(r, timings->interlace, 3, 3); in hdmi_wp_video_config_interface()
165 struct omap_video_timings *timings) in hdmi_wp_video_config_timing() argument
184 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing()
185 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing()
186 timing_h |= FLD_VAL(timings->hsw - hsw_offset, 7, 0); in hdmi_wp_video_config_timing()
189 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing()
190 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing()
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| D | hdmi5_core.c | 295 video_cfg->v_fc_config.timings = cfg->timings; in hdmi_core_init()
299 video_cfg->hblank = cfg->timings.hfp + in hdmi_core_init()
300 cfg->timings.hbp + cfg->timings.hsw; in hdmi_core_init()
302 video_cfg->vblank = cfg->timings.vsw + in hdmi_core_init()
303 cfg->timings.vfp + cfg->timings.vbp; in hdmi_core_init()
306 if (cfg->timings.interlace) { in hdmi_core_init()
311 video_cfg->v_fc_config.timings.y_res /= 2; in hdmi_core_init()
313 video_cfg->v_fc_config.timings.vfp /= 2; in hdmi_core_init()
314 video_cfg->v_fc_config.timings.vsw /= 2; in hdmi_core_init()
315 video_cfg->v_fc_config.timings.vbp /= 2; in hdmi_core_init()
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| /drivers/gpu/drm/omapdrm/ |
| D | omap_connector.c | 46 struct omap_video_timings *timings) in copy_timings_omap_to_drm() argument
48 mode->clock = timings->pixelclock / 1000; in copy_timings_omap_to_drm()
50 mode->hdisplay = timings->x_res; in copy_timings_omap_to_drm()
51 mode->hsync_start = mode->hdisplay + timings->hfp; in copy_timings_omap_to_drm()
52 mode->hsync_end = mode->hsync_start + timings->hsw; in copy_timings_omap_to_drm()
53 mode->htotal = mode->hsync_end + timings->hbp; in copy_timings_omap_to_drm()
55 mode->vdisplay = timings->y_res; in copy_timings_omap_to_drm()
56 mode->vsync_start = mode->vdisplay + timings->vfp; in copy_timings_omap_to_drm()
57 mode->vsync_end = mode->vsync_start + timings->vsw; in copy_timings_omap_to_drm()
58 mode->vtotal = mode->vsync_end + timings->vbp; in copy_timings_omap_to_drm()
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| /drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi_wp.c | 146 struct omap_video_timings *timings) in hdmi_wp_video_config_interface() argument
152 vsync_pol = timings->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
153 hsync_pol = timings->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
158 r = FLD_MOD(r, timings->interlace, 3, 3); in hdmi_wp_video_config_interface()
164 struct omap_video_timings *timings) in hdmi_wp_video_config_timing() argument
171 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing()
172 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing()
173 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing()
176 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing()
177 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing()
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| D | hdmi5_core.c | 297 video_cfg->v_fc_config.timings.hsync_level = cfg->timings.hsync_level; in hdmi_core_init()
298 video_cfg->v_fc_config.timings.x_res = cfg->timings.x_res; in hdmi_core_init()
299 video_cfg->v_fc_config.timings.hsw = cfg->timings.hsw - 1; in hdmi_core_init()
300 video_cfg->v_fc_config.timings.hbp = cfg->timings.hbp; in hdmi_core_init()
301 video_cfg->v_fc_config.timings.hfp = cfg->timings.hfp; in hdmi_core_init()
302 video_cfg->hblank = cfg->timings.hfp + in hdmi_core_init()
303 cfg->timings.hbp + cfg->timings.hsw - 1; in hdmi_core_init()
304 video_cfg->v_fc_config.timings.vsync_level = cfg->timings.vsync_level; in hdmi_core_init()
305 video_cfg->v_fc_config.timings.y_res = cfg->timings.y_res; in hdmi_core_init()
306 video_cfg->v_fc_config.timings.vsw = cfg->timings.vsw; in hdmi_core_init()
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| /drivers/memory/ |
| D | atmel-ebi.c | 43 struct at91sam9_smc_timings timings; member
98 struct at91sam9_smc_timings *timings = &config->timings; in at91sam9_ebi_get_config() local
105 timings->tdf_ns = clk_period * val; in at91sam9_ebi_get_config()
108 timings->ncs_rd_setup_ns = (val >> 24) & 0x1f; in at91sam9_ebi_get_config()
109 timings->ncs_rd_setup_ns += ((val >> 29) & 0x1) * 128; in at91sam9_ebi_get_config()
110 timings->ncs_rd_setup_ns *= clk_period; in at91sam9_ebi_get_config()
111 timings->nrd_setup_ns = (val >> 16) & 0x1f; in at91sam9_ebi_get_config()
112 timings->nrd_setup_ns += ((val >> 21) & 0x1) * 128; in at91sam9_ebi_get_config()
113 timings->nrd_setup_ns *= clk_period; in at91sam9_ebi_get_config()
114 timings->ncs_wr_setup_ns = (val >> 8) & 0x1f; in at91sam9_ebi_get_config()
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| /drivers/video/fbdev/core/ |
| D | fbmon.c | 1237 static void fb_timings_vfreq(struct __fb_timings *timings) in fb_timings_vfreq() argument
1239 timings->hfreq = fb_get_hfreq(timings->vfreq, timings->vactive); in fb_timings_vfreq()
1240 timings->vblank = fb_get_vblank(timings->hfreq); in fb_timings_vfreq()
1241 timings->vtotal = timings->vactive + timings->vblank; in fb_timings_vfreq()
1242 timings->hblank = fb_get_hblank_by_hfreq(timings->hfreq, in fb_timings_vfreq()
1243 timings->hactive); in fb_timings_vfreq()
1244 timings->htotal = timings->hactive + timings->hblank; in fb_timings_vfreq()
1245 timings->dclk = timings->htotal * timings->hfreq; in fb_timings_vfreq()
1248 static void fb_timings_hfreq(struct __fb_timings *timings) in fb_timings_hfreq() argument
1250 timings->vblank = fb_get_vblank(timings->hfreq); in fb_timings_hfreq()
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| /drivers/video/fbdev/omap2/omapfb/displays/ |
| D | encoder-tfp410.c | 27 struct omap_video_timings timings; member
84 in->ops.dpi->set_timings(in, &ddata->timings); in tfp410_enable()
116 static void tfp410_fix_timings(struct omap_video_timings *timings) in tfp410_fix_timings() argument
118 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
119 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
120 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH; in tfp410_fix_timings()
124 struct omap_video_timings *timings) in tfp410_set_timings() argument
129 tfp410_fix_timings(timings); in tfp410_set_timings()
131 ddata->timings = *timings; in tfp410_set_timings()
132 dssdev->panel.timings = *timings; in tfp410_set_timings()
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| D | connector-analog-tv.c | 26 struct omap_video_timings timings; member
94 in->ops.atv->set_timings(in, &ddata->timings); in tvc_enable()
128 struct omap_video_timings *timings) in tvc_set_timings() argument
133 ddata->timings = *timings; in tvc_set_timings()
134 dssdev->panel.timings = *timings; in tvc_set_timings()
136 in->ops.atv->set_timings(in, timings); in tvc_set_timings()
140 struct omap_video_timings *timings) in tvc_get_timings() argument
144 *timings = ddata->timings; in tvc_get_timings()
148 struct omap_video_timings *timings) in tvc_check_timings() argument
153 return in->ops.atv->check_timings(in, timings); in tvc_check_timings()
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| D | connector-hdmi.c | 45 struct omap_video_timings timings; member
97 in->ops.hdmi->set_timings(in, &ddata->timings); in hdmic_enable()
124 struct omap_video_timings *timings) in hdmic_set_timings() argument
129 ddata->timings = *timings; in hdmic_set_timings()
130 dssdev->panel.timings = *timings; in hdmic_set_timings()
132 in->ops.hdmi->set_timings(in, timings); in hdmic_set_timings()
136 struct omap_video_timings *timings) in hdmic_get_timings() argument
140 *timings = ddata->timings; in hdmic_get_timings()
144 struct omap_video_timings *timings) in hdmic_check_timings() argument
149 return in->ops.hdmi->check_timings(in, timings); in hdmic_check_timings()
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| D | connector-dvi.c | 46 struct omap_video_timings timings; member
92 in->ops.dvi->set_timings(in, &ddata->timings); in dvic_enable()
117 struct omap_video_timings *timings) in dvic_set_timings() argument
122 ddata->timings = *timings; in dvic_set_timings()
123 dssdev->panel.timings = *timings; in dvic_set_timings()
125 in->ops.dvi->set_timings(in, timings); in dvic_set_timings()
129 struct omap_video_timings *timings) in dvic_get_timings() argument
133 *timings = ddata->timings; in dvic_get_timings()
137 struct omap_video_timings *timings) in dvic_check_timings() argument
142 return in->ops.dvi->check_timings(in, timings); in dvic_check_timings()
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| D | encoder-opa362.c | 31 struct omap_video_timings timings; member
94 in->ops.atv->set_timings(in, &ddata->timings); in opa362_enable()
127 struct omap_video_timings *timings) in opa362_set_timings() argument
134 ddata->timings = *timings; in opa362_set_timings()
135 dssdev->panel.timings = *timings; in opa362_set_timings()
137 in->ops.atv->set_timings(in, timings); in opa362_set_timings()
141 struct omap_video_timings *timings) in opa362_get_timings() argument
147 *timings = ddata->timings; in opa362_get_timings()
151 struct omap_video_timings *timings) in opa362_check_timings() argument
158 return in->ops.atv->check_timings(in, timings); in opa362_check_timings()
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| /drivers/gpu/drm/omapdrm/displays/ |
| D | encoder-tfp410.c | 27 struct omap_video_timings timings; member
84 in->ops.dpi->set_timings(in, &ddata->timings); in tfp410_enable()
116 static void tfp410_fix_timings(struct omap_video_timings *timings) in tfp410_fix_timings() argument
118 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
119 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
120 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH; in tfp410_fix_timings()
124 struct omap_video_timings *timings) in tfp410_set_timings() argument
129 tfp410_fix_timings(timings); in tfp410_set_timings()
131 ddata->timings = *timings; in tfp410_set_timings()
132 dssdev->panel.timings = *timings; in tfp410_set_timings()
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| D | connector-analog-tv.c | 27 struct omap_video_timings timings; member
95 in->ops.atv->set_timings(in, &ddata->timings); in tvc_enable()
129 struct omap_video_timings *timings) in tvc_set_timings() argument
134 ddata->timings = *timings; in tvc_set_timings()
135 dssdev->panel.timings = *timings; in tvc_set_timings()
137 in->ops.atv->set_timings(in, timings); in tvc_set_timings()
141 struct omap_video_timings *timings) in tvc_get_timings() argument
145 *timings = ddata->timings; in tvc_get_timings()
149 struct omap_video_timings *timings) in tvc_check_timings() argument
154 return in->ops.atv->check_timings(in, timings); in tvc_check_timings()
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| D | connector-hdmi.c | 47 struct omap_video_timings timings; member
99 in->ops.hdmi->set_timings(in, &ddata->timings); in hdmic_enable()
126 struct omap_video_timings *timings) in hdmic_set_timings() argument
131 ddata->timings = *timings; in hdmic_set_timings()
132 dssdev->panel.timings = *timings; in hdmic_set_timings()
134 in->ops.hdmi->set_timings(in, timings); in hdmic_set_timings()
138 struct omap_video_timings *timings) in hdmic_get_timings() argument
142 *timings = ddata->timings; in hdmic_get_timings()
146 struct omap_video_timings *timings) in hdmic_check_timings() argument
151 return in->ops.hdmi->check_timings(in, timings); in hdmic_check_timings()
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| D | connector-dvi.c | 47 struct omap_video_timings timings; member
93 in->ops.dvi->set_timings(in, &ddata->timings); in dvic_enable()
118 struct omap_video_timings *timings) in dvic_set_timings() argument
123 ddata->timings = *timings; in dvic_set_timings()
124 dssdev->panel.timings = *timings; in dvic_set_timings()
126 in->ops.dvi->set_timings(in, timings); in dvic_set_timings()
130 struct omap_video_timings *timings) in dvic_get_timings() argument
134 *timings = ddata->timings; in dvic_get_timings()
138 struct omap_video_timings *timings) in dvic_check_timings() argument
143 return in->ops.dvi->check_timings(in, timings); in dvic_check_timings()
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| D | encoder-opa362.c | 30 struct omap_video_timings timings; member
93 in->ops.atv->set_timings(in, &ddata->timings); in opa362_enable()
126 struct omap_video_timings *timings) in opa362_set_timings() argument
133 ddata->timings = *timings; in opa362_set_timings()
134 dssdev->panel.timings = *timings; in opa362_set_timings()
136 in->ops.atv->set_timings(in, timings); in opa362_set_timings()
140 struct omap_video_timings *timings) in opa362_get_timings() argument
146 *timings = ddata->timings; in opa362_get_timings()
150 struct omap_video_timings *timings) in opa362_check_timings() argument
157 return in->ops.atv->check_timings(in, timings); in opa362_check_timings()
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| D | encoder-tpd12s015.c | 29 struct omap_video_timings timings; member
83 in->ops.hdmi->set_timings(in, &ddata->timings); in tpd_enable()
108 struct omap_video_timings *timings) in tpd_set_timings() argument
113 ddata->timings = *timings; in tpd_set_timings()
114 dssdev->panel.timings = *timings; in tpd_set_timings()
116 in->ops.hdmi->set_timings(in, timings); in tpd_set_timings()
120 struct omap_video_timings *timings) in tpd_get_timings() argument
124 *timings = ddata->timings; in tpd_get_timings()
128 struct omap_video_timings *timings) in tpd_check_timings() argument
134 r = in->ops.hdmi->check_timings(in, timings); in tpd_check_timings()
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| /drivers/ide/ |
| D | cs5536.c | 149 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_set_pio_mode() local
157 timings &= (IDE_DRV_MASK << 8); in cs5536_set_pio_mode()
158 timings |= drv_timings[pio]; in cs5536_set_pio_mode()
159 ide_set_drivedata(drive, (void *)timings); in cs5536_set_pio_mode()
192 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_set_dma_mode() local
203 timings &= IDE_DRV_MASK; in cs5536_set_dma_mode()
204 timings |= mwdma_timings[mode - XFER_MW_DMA_0] << 8; in cs5536_set_dma_mode()
205 ide_set_drivedata(drive, (void *)timings); in cs5536_set_dma_mode()
213 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_dma_start() local
216 (timings >> 8) != (timings & IDE_DRV_MASK)) in cs5536_dma_start()
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| D | cs5530.c | 39 #define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132) argument
106 unsigned int reg, timings = 0; in cs5530_set_dma_mode() local
109 case XFER_UDMA_0: timings = 0x00921250; break; in cs5530_set_dma_mode()
110 case XFER_UDMA_1: timings = 0x00911140; break; in cs5530_set_dma_mode()
111 case XFER_UDMA_2: timings = 0x00911030; break; in cs5530_set_dma_mode()
112 case XFER_MW_DMA_0: timings = 0x00077771; break; in cs5530_set_dma_mode()
113 case XFER_MW_DMA_1: timings = 0x00012121; break; in cs5530_set_dma_mode()
114 case XFER_MW_DMA_2: timings = 0x00002020; break; in cs5530_set_dma_mode()
118 timings |= reg & 0x80000000; /* preserve PIO format bit */ in cs5530_set_dma_mode()
120 outl(timings, basereg + 4); /* write drive0 config register */ in cs5530_set_dma_mode()
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| D | pmac.c | 64 u32 timings[4]; member
421 writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG)); in pmac_ide_apply_timings()
423 writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG)); in pmac_ide_apply_timings()
438 writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG)); in pmac_ide_kauai_apply_timings()
439 writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG)); in pmac_ide_kauai_apply_timings()
441 writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG)); in pmac_ide_kauai_apply_timings()
442 writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG)); in pmac_ide_kauai_apply_timings()
502 u32 *timings, t; in pmac_ide_set_pio_mode() local
508 timings = &pmif->timings[drive->dn & 1]; in pmac_ide_set_pio_mode()
509 t = *timings; in pmac_ide_set_pio_mode()
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| /drivers/media/spi/ |
| D | gs1662.c | 221 static int gs_status_format(u16 status, struct v4l2_dv_timings *timings) in gs_status_format() argument
228 *timings = reg_fmt[i].format; in gs_status_format()
236 static u16 get_register_timings(struct v4l2_dv_timings *timings) in get_register_timings() argument
241 if (v4l2_match_dv_timings(timings, ®_fmt[i].format, 0, in get_register_timings()
255 struct v4l2_dv_timings *timings) in gs_s_dv_timings() argument
260 reg_value = get_register_timings(timings); in gs_s_dv_timings()
264 gs->current_timings = *timings; in gs_s_dv_timings()
269 struct v4l2_dv_timings *timings) in gs_g_dv_timings() argument
273 *timings = gs->current_timings; in gs_g_dv_timings()
278 struct v4l2_dv_timings *timings) in gs_query_dv_timings() argument
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| /drivers/media/i2c/ |
| D | tvp7002.c | 332 struct v4l2_dv_timings timings; member
572 const struct v4l2_bt_timings *t = &tvp7002_timings[i].timings.bt; in tvp7002_s_dv_timings()
587 *dv_timings = device->current_timings->timings; in tvp7002_g_dv_timings()
623 const struct tvp7002_timings_definition *timings = tvp7002_timings; in tvp7002_query_dv() local
655 for (*index = 0; *index < NUM_TIMINGS; (*index)++, timings++) in tvp7002_query_dv()
656 if (lpfr == timings->lines_per_frame && in tvp7002_query_dv()
657 progressive == timings->progressive) { in tvp7002_query_dv()
658 if (timings->cpl_min == 0xffff) in tvp7002_query_dv()
660 if (cpln >= timings->cpl_min && cpln <= timings->cpl_max) in tvp7002_query_dv()
676 struct v4l2_dv_timings *timings) in tvp7002_query_dv_timings() argument
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| /drivers/media/rc/img-ir/ |
| D | img-ir-hw.c | 88 static void img_ir_timings_preprocess(struct img_ir_timings *timings, in img_ir_timings_preprocess() argument
91 img_ir_symbol_timing_preprocess(&timings->ldr, unit); in img_ir_timings_preprocess()
92 img_ir_symbol_timing_preprocess(&timings->s00, unit); in img_ir_timings_preprocess()
93 img_ir_symbol_timing_preprocess(&timings->s01, unit); in img_ir_timings_preprocess()
94 img_ir_symbol_timing_preprocess(&timings->s10, unit); in img_ir_timings_preprocess()
95 img_ir_symbol_timing_preprocess(&timings->s11, unit); in img_ir_timings_preprocess()
99 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000; in img_ir_timings_preprocess()
120 static void img_ir_timings_defaults(struct img_ir_timings *timings, in img_ir_timings_defaults() argument
123 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); in img_ir_timings_defaults()
124 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00); in img_ir_timings_defaults()
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| /drivers/ata/ |
| D | pata_efar.c | 99 u8 timings[][2] = { { 0, 0 }, in efar_set_piomode() local
121 master_data |= (timings[pio][0] << 12) | in efar_set_piomode()
122 (timings[pio][1] << 8); in efar_set_piomode()
133 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; in efar_set_piomode()
168 u8 timings[][2] = { { 0, 0 }, in efar_set_dmamode() local
219 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); in efar_set_dmamode()
226 (timings[pio][0] << 12) | in efar_set_dmamode()
227 (timings[pio][1] << 8); in efar_set_dmamode()
|