1/* 2 * This file is licensed under the terms of the GNU General Public License 3 * version 2. This program is licensed "as is" without any warranty of any 4 * kind, whether express or implied. 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/pinctrl/dm814x.h> 9 10/ { 11 compatible = "ti,dm814"; 12 interrupt-parent = <&intc>; 13 #address-cells = <1>; 14 #size-cells = <1>; 15 chosen { }; 16 17 aliases { 18 i2c0 = &i2c1; 19 i2c1 = &i2c2; 20 serial0 = &uart1; 21 serial1 = &uart2; 22 serial2 = &uart3; 23 ethernet0 = &cpsw_emac0; 24 ethernet1 = &cpsw_emac1; 25 usb0 = &usb0; 26 usb1 = &usb1; 27 phy0 = &usb0_phy; 28 phy1 = &usb1_phy; 29 }; 30 31 cpus { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 cpu@0 { 35 compatible = "arm,cortex-a8"; 36 device_type = "cpu"; 37 reg = <0>; 38 }; 39 }; 40 41 pmu { 42 compatible = "arm,cortex-a8-pmu"; 43 interrupts = <3>; 44 }; 45 46 /* 47 * The soc node represents the soc top level view. It is used for IPs 48 * that are not memory mapped in the MPU view or for the MPU itself. 49 */ 50 soc { 51 compatible = "ti,omap-infra"; 52 mpu { 53 compatible = "ti,omap3-mpu"; 54 ti,hwmods = "mpu"; 55 }; 56 }; 57 58 ocp { 59 compatible = "simple-bus"; 60 #address-cells = <1>; 61 #size-cells = <1>; 62 ranges; 63 ti,hwmods = "l3_main"; 64 65 usb: usb@47400000 { 66 compatible = "ti,am33xx-usb"; 67 reg = <0x47400000 0x1000>; 68 ranges; 69 #address-cells = <1>; 70 #size-cells = <1>; 71 ti,hwmods = "usb_otg_hs"; 72 73 usb0_phy: usb-phy@47401300 { 74 compatible = "ti,am335x-usb-phy"; 75 reg = <0x47401300 0x100>; 76 reg-names = "phy"; 77 ti,ctrl_mod = <&usb_ctrl_mod>; 78 }; 79 80 usb0: usb@47401000 { 81 compatible = "ti,musb-am33xx"; 82 reg = <0x47401400 0x400 83 0x47401000 0x200>; 84 reg-names = "mc", "control"; 85 86 interrupts = <18>; 87 interrupt-names = "mc"; 88 dr_mode = "otg"; 89 mentor,multipoint = <1>; 90 mentor,num-eps = <16>; 91 mentor,ram-bits = <12>; 92 mentor,power = <500>; 93 phys = <&usb0_phy>; 94 95 dmas = <&cppi41dma 0 0 &cppi41dma 1 0 96 &cppi41dma 2 0 &cppi41dma 3 0 97 &cppi41dma 4 0 &cppi41dma 5 0 98 &cppi41dma 6 0 &cppi41dma 7 0 99 &cppi41dma 8 0 &cppi41dma 9 0 100 &cppi41dma 10 0 &cppi41dma 11 0 101 &cppi41dma 12 0 &cppi41dma 13 0 102 &cppi41dma 14 0 &cppi41dma 0 1 103 &cppi41dma 1 1 &cppi41dma 2 1 104 &cppi41dma 3 1 &cppi41dma 4 1 105 &cppi41dma 5 1 &cppi41dma 6 1 106 &cppi41dma 7 1 &cppi41dma 8 1 107 &cppi41dma 9 1 &cppi41dma 10 1 108 &cppi41dma 11 1 &cppi41dma 12 1 109 &cppi41dma 13 1 &cppi41dma 14 1>; 110 dma-names = 111 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 112 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 113 "rx14", "rx15", 114 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 115 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 116 "tx14", "tx15"; 117 }; 118 119 usb1: usb@47401800 { 120 compatible = "ti,musb-am33xx"; 121 reg = <0x47401c00 0x400 122 0x47401800 0x200>; 123 reg-names = "mc", "control"; 124 interrupts = <19>; 125 interrupt-names = "mc"; 126 dr_mode = "otg"; 127 mentor,multipoint = <1>; 128 mentor,num-eps = <16>; 129 mentor,ram-bits = <12>; 130 mentor,power = <500>; 131 phys = <&usb1_phy>; 132 133 dmas = <&cppi41dma 15 0 &cppi41dma 16 0 134 &cppi41dma 17 0 &cppi41dma 18 0 135 &cppi41dma 19 0 &cppi41dma 20 0 136 &cppi41dma 21 0 &cppi41dma 22 0 137 &cppi41dma 23 0 &cppi41dma 24 0 138 &cppi41dma 25 0 &cppi41dma 26 0 139 &cppi41dma 27 0 &cppi41dma 28 0 140 &cppi41dma 29 0 &cppi41dma 15 1 141 &cppi41dma 16 1 &cppi41dma 17 1 142 &cppi41dma 18 1 &cppi41dma 19 1 143 &cppi41dma 20 1 &cppi41dma 21 1 144 &cppi41dma 22 1 &cppi41dma 23 1 145 &cppi41dma 24 1 &cppi41dma 25 1 146 &cppi41dma 26 1 &cppi41dma 27 1 147 &cppi41dma 28 1 &cppi41dma 29 1>; 148 dma-names = 149 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 150 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 151 "rx14", "rx15", 152 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 153 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 154 "tx14", "tx15"; 155 }; 156 157 cppi41dma: dma-controller@47402000 { 158 compatible = "ti,am3359-cppi41"; 159 reg = <0x47400000 0x1000 160 0x47402000 0x1000 161 0x47403000 0x1000 162 0x47404000 0x4000>; 163 reg-names = "glue", "controller", "scheduler", "queuemgr"; 164 interrupts = <17>; 165 interrupt-names = "glue"; 166 #dma-cells = <2>; 167 #dma-channels = <30>; 168 #dma-requests = <256>; 169 }; 170 }; 171 172 /* 173 * See TRM "Table 1-317. L4LS Instance Summary" for hints. 174 * It shows the module target agent registers though, so the 175 * actual device is typically 0x1000 before the target agent 176 * except in cases where the module is larger than 0x1000. 177 */ 178 l4ls: l4ls@48000000 { 179 compatible = "ti,dm814-l4ls", "simple-bus"; 180 #address-cells = <1>; 181 #size-cells = <1>; 182 ranges = <0 0x48000000 0x2000000>; 183 184 i2c1: i2c@28000 { 185 compatible = "ti,omap4-i2c"; 186 #address-cells = <1>; 187 #size-cells = <0>; 188 ti,hwmods = "i2c1"; 189 reg = <0x28000 0x1000>; 190 interrupts = <70>; 191 }; 192 193 elm: elm@80000 { 194 compatible = "ti,814-elm"; 195 ti,hwmods = "elm"; 196 reg = <0x80000 0x2000>; 197 interrupts = <4>; 198 }; 199 200 gpio1: gpio@32000 { 201 compatible = "ti,omap4-gpio"; 202 ti,hwmods = "gpio1"; 203 ti,gpio-always-on; 204 reg = <0x32000 0x2000>; 205 interrupts = <96>; 206 gpio-controller; 207 #gpio-cells = <2>; 208 interrupt-controller; 209 #interrupt-cells = <2>; 210 }; 211 212 gpio2: gpio@4c000 { 213 compatible = "ti,omap4-gpio"; 214 ti,hwmods = "gpio2"; 215 ti,gpio-always-on; 216 reg = <0x4c000 0x2000>; 217 interrupts = <98>; 218 gpio-controller; 219 #gpio-cells = <2>; 220 interrupt-controller; 221 #interrupt-cells = <2>; 222 }; 223 224 i2c2: i2c@2a000 { 225 compatible = "ti,omap4-i2c"; 226 #address-cells = <1>; 227 #size-cells = <0>; 228 ti,hwmods = "i2c2"; 229 reg = <0x2a000 0x1000>; 230 interrupts = <71>; 231 }; 232 233 mcspi1: spi@30000 { 234 compatible = "ti,omap4-mcspi"; 235 reg = <0x30000 0x1000>; 236 #address-cells = <1>; 237 #size-cells = <0>; 238 interrupts = <65>; 239 ti,spi-num-cs = <4>; 240 ti,hwmods = "mcspi1"; 241 dmas = <&edma 16 0 &edma 17 0 242 &edma 18 0 &edma 19 0>; 243 dma-names = "tx0", "rx0", "tx1", "rx1"; 244 }; 245 246 timer1: timer@2e000 { 247 compatible = "ti,dm814-timer"; 248 reg = <0x2e000 0x2000>; 249 interrupts = <67>; 250 ti,hwmods = "timer1"; 251 ti,timer-alwon; 252 }; 253 254 uart1: uart@20000 { 255 compatible = "ti,am3352-uart", "ti,omap3-uart"; 256 ti,hwmods = "uart1"; 257 reg = <0x20000 0x2000>; 258 clock-frequency = <48000000>; 259 interrupts = <72>; 260 dmas = <&edma 26 0 &edma 27 0>; 261 dma-names = "tx", "rx"; 262 }; 263 264 uart2: uart@22000 { 265 compatible = "ti,am3352-uart", "ti,omap3-uart"; 266 ti,hwmods = "uart2"; 267 reg = <0x22000 0x2000>; 268 clock-frequency = <48000000>; 269 interrupts = <73>; 270 dmas = <&edma 28 0 &edma 29 0>; 271 dma-names = "tx", "rx"; 272 }; 273 274 uart3: uart@24000 { 275 compatible = "ti,am3352-uart", "ti,omap3-uart"; 276 ti,hwmods = "uart3"; 277 reg = <0x24000 0x2000>; 278 clock-frequency = <48000000>; 279 interrupts = <74>; 280 dmas = <&edma 30 0 &edma 31 0>; 281 dma-names = "tx", "rx"; 282 }; 283 284 timer2: timer@40000 { 285 compatible = "ti,dm814-timer"; 286 reg = <0x40000 0x2000>; 287 interrupts = <68>; 288 ti,hwmods = "timer2"; 289 }; 290 291 timer3: timer@42000 { 292 compatible = "ti,dm814-timer"; 293 reg = <0x42000 0x2000>; 294 interrupts = <69>; 295 ti,hwmods = "timer3"; 296 }; 297 298 mmc1: mmc@60000 { 299 compatible = "ti,omap4-hsmmc"; 300 ti,hwmods = "mmc1"; 301 dmas = <&edma 24 0 302 &edma 25 0>; 303 dma-names = "tx", "rx"; 304 interrupts = <64>; 305 interrupt-parent = <&intc>; 306 reg = <0x60000 0x1000>; 307 }; 308 309 rtc: rtc@c0000 { 310 compatible = "ti,am3352-rtc", "ti,da830-rtc"; 311 reg = <0xc0000 0x1000>; 312 interrupts = <75 76>; 313 ti,hwmods = "rtc"; 314 }; 315 316 mmc2: mmc@1d8000 { 317 compatible = "ti,omap4-hsmmc"; 318 ti,hwmods = "mmc2"; 319 dmas = <&edma 2 0 320 &edma 3 0>; 321 dma-names = "tx", "rx"; 322 interrupts = <28>; 323 interrupt-parent = <&intc>; 324 reg = <0x1d8000 0x1000>; 325 }; 326 327 control: control@140000 { 328 compatible = "ti,dm814-scm", "simple-bus"; 329 reg = <0x140000 0x20000>; 330 #address-cells = <1>; 331 #size-cells = <1>; 332 ranges = <0 0x140000 0x20000>; 333 334 scm_conf: scm_conf@0 { 335 compatible = "syscon", "simple-bus"; 336 reg = <0x0 0x800>; 337 #address-cells = <1>; 338 #size-cells = <1>; 339 ranges = <0 0 0x800>; 340 341 scm_clocks: clocks { 342 #address-cells = <1>; 343 #size-cells = <0>; 344 }; 345 346 scm_clockdomains: clockdomains { 347 }; 348 }; 349 350 usb_ctrl_mod: control@620 { 351 compatible = "ti,am335x-usb-ctrl-module"; 352 reg = <0x620 0x10 353 0x648 0x4>; 354 reg-names = "phy_ctrl", "wakeup"; 355 }; 356 357 edma_xbar: dma-router@f90 { 358 compatible = "ti,am335x-edma-crossbar"; 359 reg = <0xf90 0x40>; 360 #dma-cells = <3>; 361 dma-requests = <32>; 362 dma-masters = <&edma>; 363 }; 364 365 /* 366 * Note that silicon revision 2.1 and older 367 * require input enabled (bit 18 set) for all 368 * 3.3V I/Os to avoid cumulative hardware damage. 369 * For more info, see errata advisory 2.1.87. 370 * We leave bit 18 out of function-mask and rely 371 * on the bootloader for it. 372 */ 373 pincntl: pinmux@800 { 374 compatible = "pinctrl-single"; 375 reg = <0x800 0x438>; 376 #address-cells = <1>; 377 #size-cells = <0>; 378 pinctrl-single,register-width = <32>; 379 pinctrl-single,function-mask = <0x307ff>; 380 }; 381 382 usb1_phy: usb-phy@1b00 { 383 compatible = "ti,am335x-usb-phy"; 384 reg = <0x1b00 0x100>; 385 reg-names = "phy"; 386 ti,ctrl_mod = <&usb_ctrl_mod>; 387 }; 388 }; 389 390 prcm: prcm@180000 { 391 compatible = "ti,dm814-prcm", "simple-bus"; 392 reg = <0x180000 0x2000>; 393 #address-cells = <1>; 394 #size-cells = <1>; 395 ranges = <0 0x180000 0x2000>; 396 397 prcm_clocks: clocks { 398 #address-cells = <1>; 399 #size-cells = <0>; 400 }; 401 402 prcm_clockdomains: clockdomains { 403 }; 404 }; 405 406 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */ 407 pllss: pllss@1c5000 { 408 compatible = "ti,dm814-pllss", "simple-bus"; 409 reg = <0x1c5000 0x1000>; 410 #address-cells = <1>; 411 #size-cells = <1>; 412 ranges = <0 0x1c5000 0x1000>; 413 414 pllss_clocks: clocks { 415 #address-cells = <1>; 416 #size-cells = <0>; 417 }; 418 419 pllss_clockdomains: clockdomains { 420 }; 421 }; 422 423 wdt1: wdt@1c7000 { 424 compatible = "ti,omap3-wdt"; 425 ti,hwmods = "wd_timer"; 426 reg = <0x1c7000 0x1000>; 427 interrupts = <91>; 428 }; 429 }; 430 431 intc: interrupt-controller@48200000 { 432 compatible = "ti,dm814-intc"; 433 interrupt-controller; 434 #interrupt-cells = <1>; 435 reg = <0x48200000 0x1000>; 436 }; 437 438 /* Board must configure evtmux with edma_xbar for EDMA */ 439 mmc3: mmc@47810000 { 440 compatible = "ti,omap4-hsmmc"; 441 ti,hwmods = "mmc3"; 442 interrupts = <29>; 443 interrupt-parent = <&intc>; 444 reg = <0x47810000 0x1000>; 445 }; 446 447 edma: edma@49000000 { 448 compatible = "ti,edma3-tpcc"; 449 ti,hwmods = "tpcc"; 450 reg = <0x49000000 0x10000>; 451 reg-names = "edma3_cc"; 452 interrupts = <12 13 14>; 453 interrupt-names = "edma3_ccint", "edma3_mperr", 454 "edma3_ccerrint"; 455 dma-requests = <64>; 456 #dma-cells = <2>; 457 458 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, 459 <&edma_tptc2 3>, <&edma_tptc3 0>; 460 461 ti,edma-memcpy-channels = <20 21>; 462 }; 463 464 edma_tptc0: tptc@49800000 { 465 compatible = "ti,edma3-tptc"; 466 ti,hwmods = "tptc0"; 467 reg = <0x49800000 0x100000>; 468 interrupts = <112>; 469 interrupt-names = "edma3_tcerrint"; 470 }; 471 472 edma_tptc1: tptc@49900000 { 473 compatible = "ti,edma3-tptc"; 474 ti,hwmods = "tptc1"; 475 reg = <0x49900000 0x100000>; 476 interrupts = <113>; 477 interrupt-names = "edma3_tcerrint"; 478 }; 479 480 edma_tptc2: tptc@49a00000 { 481 compatible = "ti,edma3-tptc"; 482 ti,hwmods = "tptc2"; 483 reg = <0x49a00000 0x100000>; 484 interrupts = <114>; 485 interrupt-names = "edma3_tcerrint"; 486 }; 487 488 edma_tptc3: tptc@49b00000 { 489 compatible = "ti,edma3-tptc"; 490 ti,hwmods = "tptc3"; 491 reg = <0x49b00000 0x100000>; 492 interrupts = <115>; 493 interrupt-names = "edma3_tcerrint"; 494 }; 495 496 /* See TRM "Table 1-318. L4HS Instance Summary" */ 497 l4hs: l4hs@4a000000 { 498 compatible = "ti,dm814-l4hs", "simple-bus"; 499 #address-cells = <1>; 500 #size-cells = <1>; 501 ranges = <0 0x4a000000 0x1b4040>; 502 }; 503 504 /* REVISIT: Move to live under l4hs once driver is fixed */ 505 mac: ethernet@4a100000 { 506 compatible = "ti,cpsw"; 507 ti,hwmods = "cpgmac0"; 508 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 509 clock-names = "fck", "cpts"; 510 cpdma_channels = <8>; 511 ale_entries = <1024>; 512 bd_ram_size = <0x2000>; 513 no_bd_ram = <0>; 514 mac_control = <0x20>; 515 slaves = <2>; 516 active_slave = <0>; 517 cpts_clock_mult = <0x80000000>; 518 cpts_clock_shift = <29>; 519 reg = <0x4a100000 0x800 520 0x4a100900 0x100>; 521 #address-cells = <1>; 522 #size-cells = <1>; 523 interrupt-parent = <&intc>; 524 /* 525 * c0_rx_thresh_pend 526 * c0_rx_pend 527 * c0_tx_pend 528 * c0_misc_pend 529 */ 530 interrupts = <40 41 42 43>; 531 ranges; 532 syscon = <&scm_conf>; 533 534 davinci_mdio: mdio@4a100800 { 535 compatible = "ti,davinci_mdio"; 536 #address-cells = <1>; 537 #size-cells = <0>; 538 ti,hwmods = "davinci_mdio"; 539 bus_freq = <1000000>; 540 reg = <0x4a100800 0x100>; 541 }; 542 543 cpsw_emac0: slave@4a100200 { 544 /* Filled in by U-Boot */ 545 mac-address = [ 00 00 00 00 00 00 ]; 546 }; 547 548 cpsw_emac1: slave@4a100300 { 549 /* Filled in by U-Boot */ 550 mac-address = [ 00 00 00 00 00 00 ]; 551 }; 552 553 phy_sel: cpsw-phy-sel@48140650 { 554 compatible = "ti,am3352-cpsw-phy-sel"; 555 reg= <0x48140650 0x4>; 556 reg-names = "gmii-sel"; 557 }; 558 }; 559 560 gpmc: gpmc@50000000 { 561 compatible = "ti,am3352-gpmc"; 562 ti,hwmods = "gpmc"; 563 ti,no-idle-on-init; 564 reg = <0x50000000 0x2000>; 565 interrupts = <100>; 566 gpmc,num-cs = <7>; 567 gpmc,num-waitpins = <2>; 568 #address-cells = <2>; 569 #size-cells = <1>; 570 interrupt-controller; 571 #interrupt-cells = <2>; 572 gpio-controller; 573 #gpio-cells = <2>; 574 }; 575 }; 576}; 577 578#include "dm814x-clocks.dtsi" 579