1/* 2 * This file is licensed under the terms of the GNU General Public License 3 * version 2. This program is licensed "as is" without any warranty of any 4 * kind, whether express or implied. 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/pinctrl/omap.h> 9 10/ { 11 compatible = "ti,dm816"; 12 interrupt-parent = <&intc>; 13 #address-cells = <1>; 14 #size-cells = <1>; 15 chosen { }; 16 17 aliases { 18 i2c0 = &i2c1; 19 i2c1 = &i2c2; 20 serial0 = &uart1; 21 serial1 = &uart2; 22 serial2 = &uart3; 23 ethernet0 = ð0; 24 ethernet1 = ð1; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 cpu@0 { 31 compatible = "arm,cortex-a8"; 32 device_type = "cpu"; 33 reg = <0>; 34 }; 35 }; 36 37 pmu { 38 compatible = "arm,cortex-a8-pmu"; 39 interrupts = <3>; 40 }; 41 42 /* 43 * The soc node represents the soc top level view. It is used for IPs 44 * that are not memory mapped in the MPU view or for the MPU itself. 45 */ 46 soc { 47 compatible = "ti,omap-infra"; 48 mpu { 49 compatible = "ti,omap3-mpu"; 50 ti,hwmods = "mpu"; 51 }; 52 }; 53 54 /* 55 * XXX: Use a flat representation of the dm816x interconnect. 56 * The real dm816x interconnect network is quite complex. Since 57 * it will not bring real advantage to represent that in DT 58 * for the moment, just use a fake OCP bus entry to represent 59 * the whole bus hierarchy. 60 */ 61 ocp { 62 compatible = "simple-bus"; 63 reg = <0x44000000 0x10000>; 64 interrupts = <9 10>; 65 #address-cells = <1>; 66 #size-cells = <1>; 67 ranges; 68 69 prcm: prcm@48180000 { 70 compatible = "ti,dm816-prcm"; 71 reg = <0x48180000 0x4000>; 72 73 prcm_clocks: clocks { 74 #address-cells = <1>; 75 #size-cells = <0>; 76 }; 77 78 prcm_clockdomains: clockdomains { 79 }; 80 }; 81 82 scrm: scrm@48140000 { 83 compatible = "ti,dm816-scrm", "simple-bus"; 84 reg = <0x48140000 0x21000>; 85 #address-cells = <1>; 86 #size-cells = <1>; 87 ranges = <0 0x48140000 0x21000>; 88 89 dm816x_pinmux: pinmux@800 { 90 compatible = "pinctrl-single"; 91 reg = <0x800 0x50a>; 92 #address-cells = <1>; 93 #size-cells = <0>; 94 pinctrl-single,register-width = <16>; 95 pinctrl-single,function-mask = <0xf>; 96 }; 97 98 /* Device Configuration Registers */ 99 scm_conf: syscon@600 { 100 compatible = "syscon", "simple-bus"; 101 reg = <0x600 0x110>; 102 #address-cells = <1>; 103 #size-cells = <1>; 104 ranges = <0 0x600 0x110>; 105 106 usb_phy0: usb-phy@20 { 107 compatible = "ti,dm8168-usb-phy"; 108 reg = <0x20 0x8>; 109 reg-names = "phy"; 110 clocks = <&main_fapll 6>; 111 clock-names = "refclk"; 112 #phy-cells = <0>; 113 syscon = <&scm_conf>; 114 }; 115 116 usb_phy1: usb-phy@28 { 117 compatible = "ti,dm8168-usb-phy"; 118 reg = <0x28 0x8>; 119 reg-names = "phy"; 120 clocks = <&main_fapll 6>; 121 clock-names = "refclk"; 122 #phy-cells = <0>; 123 syscon = <&scm_conf>; 124 }; 125 }; 126 127 scrm_clocks: clocks { 128 #address-cells = <1>; 129 #size-cells = <0>; 130 }; 131 132 scrm_clockdomains: clockdomains { 133 }; 134 }; 135 136 edma: edma@49000000 { 137 compatible = "ti,edma3"; 138 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3"; 139 reg = <0x49000000 0x10000>, 140 <0x44e10f90 0x40>; 141 interrupts = <12 13 14>; 142 #dma-cells = <1>; 143 }; 144 145 elm: elm@48080000 { 146 compatible = "ti,816-elm"; 147 ti,hwmods = "elm"; 148 reg = <0x48080000 0x2000>; 149 interrupts = <4>; 150 }; 151 152 gpio1: gpio@48032000 { 153 compatible = "ti,omap4-gpio"; 154 ti,hwmods = "gpio1"; 155 ti,gpio-always-on; 156 reg = <0x48032000 0x1000>; 157 interrupts = <96>; 158 gpio-controller; 159 #gpio-cells = <2>; 160 interrupt-controller; 161 #interrupt-cells = <2>; 162 }; 163 164 gpio2: gpio@4804c000 { 165 compatible = "ti,omap4-gpio"; 166 ti,hwmods = "gpio2"; 167 ti,gpio-always-on; 168 reg = <0x4804c000 0x1000>; 169 interrupts = <98>; 170 gpio-controller; 171 #gpio-cells = <2>; 172 interrupt-controller; 173 #interrupt-cells = <2>; 174 }; 175 176 gpmc: gpmc@50000000 { 177 compatible = "ti,am3352-gpmc"; 178 ti,hwmods = "gpmc"; 179 reg = <0x50000000 0x2000>; 180 #address-cells = <2>; 181 #size-cells = <1>; 182 interrupts = <100>; 183 dmas = <&edma 52>; 184 dma-names = "rxtx"; 185 gpmc,num-cs = <6>; 186 gpmc,num-waitpins = <2>; 187 interrupt-controller; 188 #interrupt-cells = <2>; 189 gpio-controller; 190 #gpio-cells = <2>; 191 }; 192 193 i2c1: i2c@48028000 { 194 compatible = "ti,omap4-i2c"; 195 ti,hwmods = "i2c1"; 196 reg = <0x48028000 0x1000>; 197 #address-cells = <1>; 198 #size-cells = <0>; 199 interrupts = <70>; 200 dmas = <&edma 58 &edma 59>; 201 dma-names = "tx", "rx"; 202 }; 203 204 i2c2: i2c@4802a000 { 205 compatible = "ti,omap4-i2c"; 206 ti,hwmods = "i2c2"; 207 reg = <0x4802a000 0x1000>; 208 #address-cells = <1>; 209 #size-cells = <0>; 210 interrupts = <71>; 211 dmas = <&edma 60 &edma 61>; 212 dma-names = "tx", "rx"; 213 }; 214 215 intc: interrupt-controller@48200000 { 216 compatible = "ti,dm816-intc"; 217 interrupt-controller; 218 #interrupt-cells = <1>; 219 reg = <0x48200000 0x1000>; 220 }; 221 222 rtc: rtc@480c0000 { 223 compatible = "ti,am3352-rtc", "ti,da830-rtc"; 224 reg = <0x480c0000 0x1000>; 225 interrupts = <75 76>; 226 ti,hwmods = "rtc"; 227 }; 228 229 mailbox: mailbox@480c8000 { 230 compatible = "ti,omap4-mailbox"; 231 reg = <0x480c8000 0x2000>; 232 interrupts = <77>; 233 ti,hwmods = "mailbox"; 234 #mbox-cells = <1>; 235 ti,mbox-num-users = <4>; 236 ti,mbox-num-fifos = <12>; 237 mbox_dsp: mbox_dsp { 238 ti,mbox-tx = <3 0 0>; 239 ti,mbox-rx = <0 0 0>; 240 }; 241 }; 242 243 spinbox: spinbox@480ca000 { 244 compatible = "ti,omap4-hwspinlock"; 245 reg = <0x480ca000 0x2000>; 246 ti,hwmods = "spinbox"; 247 #hwlock-cells = <1>; 248 }; 249 250 mdio: mdio@4a100800 { 251 compatible = "ti,davinci_mdio"; 252 #address-cells = <1>; 253 #size-cells = <0>; 254 reg = <0x4a100800 0x100>; 255 ti,hwmods = "davinci_mdio"; 256 bus_freq = <1000000>; 257 phy0: ethernet-phy@0 { 258 reg = <1>; 259 }; 260 phy1: ethernet-phy@1 { 261 reg = <2>; 262 }; 263 }; 264 265 eth0: ethernet@4a100000 { 266 compatible = "ti,dm816-emac"; 267 ti,hwmods = "emac0"; 268 reg = <0x4a100000 0x800 269 0x4a100900 0x3700>; 270 clocks = <&sysclk24_ck>; 271 syscon = <&scm_conf>; 272 ti,davinci-ctrl-reg-offset = <0>; 273 ti,davinci-ctrl-mod-reg-offset = <0x900>; 274 ti,davinci-ctrl-ram-offset = <0x2000>; 275 ti,davinci-ctrl-ram-size = <0x2000>; 276 interrupts = <40 41 42 43>; 277 phy-handle = <&phy0>; 278 }; 279 280 eth1: ethernet@4a120000 { 281 compatible = "ti,dm816-emac"; 282 ti,hwmods = "emac1"; 283 reg = <0x4a120000 0x4000>; 284 clocks = <&sysclk24_ck>; 285 syscon = <&scm_conf>; 286 ti,davinci-ctrl-reg-offset = <0>; 287 ti,davinci-ctrl-mod-reg-offset = <0x900>; 288 ti,davinci-ctrl-ram-offset = <0x2000>; 289 ti,davinci-ctrl-ram-size = <0x2000>; 290 interrupts = <44 45 46 47>; 291 phy-handle = <&phy1>; 292 }; 293 294 mcspi1: spi@48030000 { 295 compatible = "ti,omap4-mcspi"; 296 reg = <0x48030000 0x1000>; 297 #address-cells = <1>; 298 #size-cells = <0>; 299 interrupts = <65>; 300 ti,spi-num-cs = <4>; 301 ti,hwmods = "mcspi1"; 302 dmas = <&edma 16 &edma 17 303 &edma 18 &edma 19 304 &edma 20 &edma 21 305 &edma 22 &edma 23>; 306 dma-names = "tx0", "rx0", "tx1", "rx1", 307 "tx2", "rx2", "tx3", "rx3"; 308 }; 309 310 mmc1: mmc@48060000 { 311 compatible = "ti,omap4-hsmmc"; 312 reg = <0x48060000 0x11000>; 313 ti,hwmods = "mmc1"; 314 interrupts = <64>; 315 dmas = <&edma 24 &edma 25>; 316 dma-names = "tx", "rx"; 317 }; 318 319 timer1: timer@4802e000 { 320 compatible = "ti,dm816-timer"; 321 reg = <0x4802e000 0x2000>; 322 interrupts = <67>; 323 ti,hwmods = "timer1"; 324 ti,timer-alwon; 325 }; 326 327 timer2: timer@48040000 { 328 compatible = "ti,dm816-timer"; 329 reg = <0x48040000 0x2000>; 330 interrupts = <68>; 331 ti,hwmods = "timer2"; 332 }; 333 334 timer3: timer@48042000 { 335 compatible = "ti,dm816-timer"; 336 reg = <0x48042000 0x2000>; 337 interrupts = <69>; 338 ti,hwmods = "timer3"; 339 }; 340 341 timer4: timer@48044000 { 342 compatible = "ti,dm816-timer"; 343 reg = <0x48044000 0x2000>; 344 interrupts = <92>; 345 ti,hwmods = "timer4"; 346 ti,timer-pwm; 347 }; 348 349 timer5: timer@48046000 { 350 compatible = "ti,dm816-timer"; 351 reg = <0x48046000 0x2000>; 352 interrupts = <93>; 353 ti,hwmods = "timer5"; 354 ti,timer-pwm; 355 }; 356 357 timer6: timer@48048000 { 358 compatible = "ti,dm816-timer"; 359 reg = <0x48048000 0x2000>; 360 interrupts = <94>; 361 ti,hwmods = "timer6"; 362 ti,timer-pwm; 363 }; 364 365 timer7: timer@4804a000 { 366 compatible = "ti,dm816-timer"; 367 reg = <0x4804a000 0x2000>; 368 interrupts = <95>; 369 ti,hwmods = "timer7"; 370 ti,timer-pwm; 371 }; 372 373 uart1: uart@48020000 { 374 compatible = "ti,am3352-uart", "ti,omap3-uart"; 375 ti,hwmods = "uart1"; 376 reg = <0x48020000 0x2000>; 377 clock-frequency = <48000000>; 378 interrupts = <72>; 379 dmas = <&edma 26 &edma 27>; 380 dma-names = "tx", "rx"; 381 }; 382 383 uart2: uart@48022000 { 384 compatible = "ti,am3352-uart", "ti,omap3-uart"; 385 ti,hwmods = "uart2"; 386 reg = <0x48022000 0x2000>; 387 clock-frequency = <48000000>; 388 interrupts = <73>; 389 dmas = <&edma 28 &edma 29>; 390 dma-names = "tx", "rx"; 391 }; 392 393 uart3: uart@48024000 { 394 compatible = "ti,am3352-uart", "ti,omap3-uart"; 395 ti,hwmods = "uart3"; 396 reg = <0x48024000 0x2000>; 397 clock-frequency = <48000000>; 398 interrupts = <74>; 399 dmas = <&edma 30 &edma 31>; 400 dma-names = "tx", "rx"; 401 }; 402 403 /* NOTE: USB needs a transceiver driver for phys to work */ 404 usb: usb_otg_hs@47401000 { 405 compatible = "ti,am33xx-usb"; 406 reg = <0x47401000 0x400000>; 407 ranges; 408 #address-cells = <1>; 409 #size-cells = <1>; 410 ti,hwmods = "usb_otg_hs"; 411 412 usb0: usb@47401000 { 413 compatible = "ti,musb-dm816"; 414 reg = <0x47401400 0x400 415 0x47401000 0x200>; 416 reg-names = "mc", "control"; 417 interrupts = <18>; 418 interrupt-names = "mc"; 419 dr_mode = "host"; 420 interface-type = <0>; 421 phys = <&usb_phy0>; 422 phy-names = "usb2-phy"; 423 mentor,multipoint = <1>; 424 mentor,num-eps = <16>; 425 mentor,ram-bits = <12>; 426 mentor,power = <500>; 427 428 dmas = <&cppi41dma 0 0 &cppi41dma 1 0 429 &cppi41dma 2 0 &cppi41dma 3 0 430 &cppi41dma 4 0 &cppi41dma 5 0 431 &cppi41dma 6 0 &cppi41dma 7 0 432 &cppi41dma 8 0 &cppi41dma 9 0 433 &cppi41dma 10 0 &cppi41dma 11 0 434 &cppi41dma 12 0 &cppi41dma 13 0 435 &cppi41dma 14 0 &cppi41dma 0 1 436 &cppi41dma 1 1 &cppi41dma 2 1 437 &cppi41dma 3 1 &cppi41dma 4 1 438 &cppi41dma 5 1 &cppi41dma 6 1 439 &cppi41dma 7 1 &cppi41dma 8 1 440 &cppi41dma 9 1 &cppi41dma 10 1 441 &cppi41dma 11 1 &cppi41dma 12 1 442 &cppi41dma 13 1 &cppi41dma 14 1>; 443 dma-names = 444 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 445 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 446 "rx14", "rx15", 447 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 448 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 449 "tx14", "tx15"; 450 }; 451 452 usb1: usb@47401800 { 453 compatible = "ti,musb-dm816"; 454 reg = <0x47401c00 0x400 455 0x47401800 0x200>; 456 reg-names = "mc", "control"; 457 interrupts = <19>; 458 interrupt-names = "mc"; 459 dr_mode = "host"; 460 interface-type = <0>; 461 phys = <&usb_phy1>; 462 phy-names = "usb2-phy"; 463 mentor,multipoint = <1>; 464 mentor,num-eps = <16>; 465 mentor,ram-bits = <12>; 466 mentor,power = <500>; 467 468 dmas = <&cppi41dma 15 0 &cppi41dma 16 0 469 &cppi41dma 17 0 &cppi41dma 18 0 470 &cppi41dma 19 0 &cppi41dma 20 0 471 &cppi41dma 21 0 &cppi41dma 22 0 472 &cppi41dma 23 0 &cppi41dma 24 0 473 &cppi41dma 25 0 &cppi41dma 26 0 474 &cppi41dma 27 0 &cppi41dma 28 0 475 &cppi41dma 29 0 &cppi41dma 15 1 476 &cppi41dma 16 1 &cppi41dma 17 1 477 &cppi41dma 18 1 &cppi41dma 19 1 478 &cppi41dma 20 1 &cppi41dma 21 1 479 &cppi41dma 22 1 &cppi41dma 23 1 480 &cppi41dma 24 1 &cppi41dma 25 1 481 &cppi41dma 26 1 &cppi41dma 27 1 482 &cppi41dma 28 1 &cppi41dma 29 1>; 483 dma-names = 484 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 485 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 486 "rx14", "rx15", 487 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 488 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 489 "tx14", "tx15"; 490 }; 491 492 cppi41dma: dma-controller@47402000 { 493 compatible = "ti,am3359-cppi41"; 494 reg = <0x47400000 0x1000 495 0x47402000 0x1000 496 0x47403000 0x1000 497 0x47404000 0x4000>; 498 reg-names = "glue", "controller", "scheduler", "queuemgr"; 499 interrupts = <17>; 500 interrupt-names = "glue"; 501 #dma-cells = <2>; 502 #dma-channels = <30>; 503 #dma-requests = <256>; 504 }; 505 }; 506 507 wd_timer2: wd_timer@480c2000 { 508 compatible = "ti,omap3-wdt"; 509 ti,hwmods = "wd_timer"; 510 reg = <0x480c2000 0x1000>; 511 interrupts = <0>; 512 }; 513 }; 514}; 515 516#include "dm816x-clocks.dtsi" 517