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1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include "skeleton.dtsi"
13#include "imx25-pinfunc.h"
14
15/ {
16	aliases {
17		ethernet0 = &fec;
18		gpio0 = &gpio1;
19		gpio1 = &gpio2;
20		gpio2 = &gpio3;
21		gpio3 = &gpio4;
22		i2c0 = &i2c1;
23		i2c1 = &i2c2;
24		i2c2 = &i2c3;
25		mmc0 = &esdhc1;
26		mmc1 = &esdhc2;
27		pwm0 = &pwm1;
28		pwm1 = &pwm2;
29		pwm2 = &pwm3;
30		pwm3 = &pwm4;
31		serial0 = &uart1;
32		serial1 = &uart2;
33		serial2 = &uart3;
34		serial3 = &uart4;
35		serial4 = &uart5;
36		spi0 = &spi1;
37		spi1 = &spi2;
38		spi2 = &spi3;
39		usb0 = &usbotg;
40		usb1 = &usbhost1;
41	};
42
43	cpus {
44		#address-cells = <0>;
45		#size-cells = <0>;
46
47		cpu {
48			compatible = "arm,arm926ej-s";
49			device_type = "cpu";
50		};
51	};
52
53	asic: asic-interrupt-controller@68000000 {
54		compatible = "fsl,imx25-asic", "fsl,avic";
55		interrupt-controller;
56		#interrupt-cells = <1>;
57		reg = <0x68000000 0x8000000>;
58	};
59
60	clocks {
61		#address-cells = <1>;
62		#size-cells = <0>;
63
64		osc {
65			compatible = "fsl,imx-osc", "fixed-clock";
66			#clock-cells = <0>;
67			clock-frequency = <24000000>;
68		};
69	};
70
71	soc {
72		#address-cells = <1>;
73		#size-cells = <1>;
74		compatible = "simple-bus";
75		interrupt-parent = <&asic>;
76		ranges;
77
78		aips@43f00000 { /* AIPS1 */
79			compatible = "fsl,aips-bus", "simple-bus";
80			#address-cells = <1>;
81			#size-cells = <1>;
82			reg = <0x43f00000 0x100000>;
83			ranges;
84
85			i2c1: i2c@43f80000 {
86				#address-cells = <1>;
87				#size-cells = <0>;
88				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
89				reg = <0x43f80000 0x4000>;
90				clocks = <&clks 48>;
91				clock-names = "";
92				interrupts = <3>;
93				status = "disabled";
94			};
95
96			i2c3: i2c@43f84000 {
97				#address-cells = <1>;
98				#size-cells = <0>;
99				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
100				reg = <0x43f84000 0x4000>;
101				clocks = <&clks 48>;
102				clock-names = "";
103				interrupts = <10>;
104				status = "disabled";
105			};
106
107			can1: can@43f88000 {
108				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
109				reg = <0x43f88000 0x4000>;
110				interrupts = <43>;
111				clocks = <&clks 75>, <&clks 75>;
112				clock-names = "ipg", "per";
113				status = "disabled";
114			};
115
116			can2: can@43f8c000 {
117				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
118				reg = <0x43f8c000 0x4000>;
119				interrupts = <44>;
120				clocks = <&clks 76>, <&clks 76>;
121				clock-names = "ipg", "per";
122				status = "disabled";
123			};
124
125			uart1: serial@43f90000 {
126				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
127				reg = <0x43f90000 0x4000>;
128				interrupts = <45>;
129				clocks = <&clks 120>, <&clks 57>;
130				clock-names = "ipg", "per";
131				status = "disabled";
132			};
133
134			uart2: serial@43f94000 {
135				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
136				reg = <0x43f94000 0x4000>;
137				interrupts = <32>;
138				clocks = <&clks 121>, <&clks 57>;
139				clock-names = "ipg", "per";
140				status = "disabled";
141			};
142
143			i2c2: i2c@43f98000 {
144				#address-cells = <1>;
145				#size-cells = <0>;
146				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
147				reg = <0x43f98000 0x4000>;
148				clocks = <&clks 48>;
149				clock-names = "";
150				interrupts = <4>;
151				status = "disabled";
152			};
153
154			owire@43f9c000 {
155				#address-cells = <1>;
156				#size-cells = <0>;
157				reg = <0x43f9c000 0x4000>;
158				clocks = <&clks 51>;
159				clock-names = "";
160				interrupts = <2>;
161				status = "disabled";
162			};
163
164			spi1: cspi@43fa4000 {
165				#address-cells = <1>;
166				#size-cells = <0>;
167				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
168				reg = <0x43fa4000 0x4000>;
169				clocks = <&clks 78>, <&clks 78>;
170				clock-names = "ipg", "per";
171				interrupts = <14>;
172				status = "disabled";
173			};
174
175			kpp: kpp@43fa8000 {
176				#address-cells = <1>;
177				#size-cells = <0>;
178				compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
179				reg = <0x43fa8000 0x4000>;
180				clocks = <&clks 102>;
181				clock-names = "";
182				interrupts = <24>;
183				status = "disabled";
184			};
185
186			iomuxc: iomuxc@43fac000 {
187				compatible = "fsl,imx25-iomuxc";
188				reg = <0x43fac000 0x4000>;
189			};
190
191			audmux: audmux@43fb0000 {
192				compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
193				reg = <0x43fb0000 0x4000>;
194				status = "disabled";
195			};
196		};
197
198		spba@50000000 {
199			compatible = "fsl,spba-bus", "simple-bus";
200			#address-cells = <1>;
201			#size-cells = <1>;
202			reg = <0x50000000 0x40000>;
203			ranges;
204
205			spi3: cspi@50004000 {
206				#address-cells = <1>;
207				#size-cells = <0>;
208				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
209				reg = <0x50004000 0x4000>;
210				interrupts = <0>;
211				clocks = <&clks 80>, <&clks 80>;
212				clock-names = "ipg", "per";
213				status = "disabled";
214			};
215
216			uart4: serial@50008000 {
217				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
218				reg = <0x50008000 0x4000>;
219				interrupts = <5>;
220				clocks = <&clks 123>, <&clks 57>;
221				clock-names = "ipg", "per";
222				status = "disabled";
223			};
224
225			uart3: serial@5000c000 {
226				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
227				reg = <0x5000c000 0x4000>;
228				interrupts = <18>;
229				clocks = <&clks 122>, <&clks 57>;
230				clock-names = "ipg", "per";
231				status = "disabled";
232			};
233
234			spi2: cspi@50010000 {
235				#address-cells = <1>;
236				#size-cells = <0>;
237				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
238				reg = <0x50010000 0x4000>;
239				clocks = <&clks 79>, <&clks 79>;
240				clock-names = "ipg", "per";
241				interrupts = <13>;
242				status = "disabled";
243			};
244
245			ssi2: ssi@50014000 {
246				#sound-dai-cells = <0>;
247				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
248				reg = <0x50014000 0x4000>;
249				interrupts = <11>;
250				clocks = <&clks 118>;
251				clock-names = "ipg";
252				dmas = <&sdma 24 1 0>,
253				       <&sdma 25 1 0>;
254				dma-names = "rx", "tx";
255				status = "disabled";
256			};
257
258			esai@50018000 {
259				reg = <0x50018000 0x4000>;
260				interrupts = <7>;
261			};
262
263			uart5: serial@5002c000 {
264				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
265				reg = <0x5002c000 0x4000>;
266				interrupts = <40>;
267				clocks = <&clks 124>, <&clks 57>;
268				clock-names = "ipg", "per";
269				status = "disabled";
270			};
271
272			tscadc: tscadc@50030000 {
273				compatible = "fsl,imx25-tsadc";
274				reg = <0x50030000 0xc>;
275				interrupts = <46>;
276				clocks = <&clks 119>;
277				clock-names = "ipg";
278				interrupt-controller;
279				#interrupt-cells = <1>;
280				#address-cells = <1>;
281				#size-cells = <1>;
282				status = "disabled";
283
284				adc: adc@50030800 {
285					compatible = "fsl,imx25-gcq";
286					reg = <0x50030800 0x60>;
287					interrupt-parent = <&tscadc>;
288					interrupts = <1>;
289					#address-cells = <1>;
290					#size-cells = <0>;
291					status = "disabled";
292				};
293
294				tsc: tcq@50030400 {
295					compatible = "fsl,imx25-tcq";
296					reg = <0x50030400 0x60>;
297					interrupt-parent = <&tscadc>;
298					interrupts = <0>;
299					fsl,wires = <4>;
300					status = "disabled";
301				};
302			};
303
304			ssi1: ssi@50034000 {
305				#sound-dai-cells = <0>;
306				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
307				reg = <0x50034000 0x4000>;
308				interrupts = <12>;
309				clocks = <&clks 117>;
310				clock-names = "ipg";
311				dmas = <&sdma 28 1 0>,
312				       <&sdma 29 1 0>;
313				dma-names = "rx", "tx";
314				status = "disabled";
315			};
316
317			fec: ethernet@50038000 {
318				compatible = "fsl,imx25-fec";
319				reg = <0x50038000 0x4000>;
320				interrupts = <57>;
321				clocks = <&clks 88>, <&clks 65>;
322				clock-names = "ipg", "ahb";
323				status = "disabled";
324			};
325		};
326
327		aips@53f00000 { /* AIPS2 */
328			compatible = "fsl,aips-bus", "simple-bus";
329			#address-cells = <1>;
330			#size-cells = <1>;
331			reg = <0x53f00000 0x100000>;
332			ranges;
333
334			clks: ccm@53f80000 {
335				compatible = "fsl,imx25-ccm";
336				reg = <0x53f80000 0x4000>;
337				interrupts = <31>;
338				#clock-cells = <1>;
339			};
340
341			gpt4: timer@53f84000 {
342				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
343				reg = <0x53f84000 0x4000>;
344				clocks = <&clks 95>, <&clks 47>;
345				clock-names = "ipg", "per";
346				interrupts = <1>;
347			};
348
349			gpt3: timer@53f88000 {
350				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
351				reg = <0x53f88000 0x4000>;
352				clocks = <&clks 94>, <&clks 47>;
353				clock-names = "ipg", "per";
354				interrupts = <29>;
355			};
356
357			gpt2: timer@53f8c000 {
358				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
359				reg = <0x53f8c000 0x4000>;
360				clocks = <&clks 93>, <&clks 47>;
361				clock-names = "ipg", "per";
362				interrupts = <53>;
363			};
364
365			gpt1: timer@53f90000 {
366				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
367				reg = <0x53f90000 0x4000>;
368				clocks = <&clks 92>, <&clks 47>;
369				clock-names = "ipg", "per";
370				interrupts = <54>;
371			};
372
373			epit1: timer@53f94000 {
374				compatible = "fsl,imx25-epit";
375				reg = <0x53f94000 0x4000>;
376				interrupts = <28>;
377			};
378
379			epit2: timer@53f98000 {
380				compatible = "fsl,imx25-epit";
381				reg = <0x53f98000 0x4000>;
382				interrupts = <27>;
383			};
384
385			gpio4: gpio@53f9c000 {
386				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
387				reg = <0x53f9c000 0x4000>;
388				interrupts = <23>;
389				gpio-controller;
390				#gpio-cells = <2>;
391				interrupt-controller;
392				#interrupt-cells = <2>;
393			};
394
395			pwm2: pwm@53fa0000 {
396				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
397				#pwm-cells = <2>;
398				reg = <0x53fa0000 0x4000>;
399				clocks = <&clks 106>, <&clks 52>;
400				clock-names = "ipg", "per";
401				interrupts = <36>;
402			};
403
404			gpio3: gpio@53fa4000 {
405				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
406				reg = <0x53fa4000 0x4000>;
407				interrupts = <16>;
408				gpio-controller;
409				#gpio-cells = <2>;
410				interrupt-controller;
411				#interrupt-cells = <2>;
412			};
413
414			pwm3: pwm@53fa8000 {
415				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
416				#pwm-cells = <2>;
417				reg = <0x53fa8000 0x4000>;
418				clocks = <&clks 107>, <&clks 52>;
419				clock-names = "ipg", "per";
420				interrupts = <41>;
421			};
422
423			scc: crypto@53fac000 {
424				compatible = "fsl,imx25-scc";
425				reg = <0x53fac000 0x4000>;
426				clocks = <&clks 111>;
427				clock-names = "ipg";
428				interrupts = <49>, <50>;
429				interrupt-names = "scm", "smn";
430			};
431
432			esdhc1: esdhc@53fb4000 {
433				compatible = "fsl,imx25-esdhc";
434				reg = <0x53fb4000 0x4000>;
435				interrupts = <9>;
436				clocks = <&clks 86>, <&clks 63>, <&clks 45>;
437				clock-names = "ipg", "ahb", "per";
438				status = "disabled";
439			};
440
441			esdhc2: esdhc@53fb8000 {
442				compatible = "fsl,imx25-esdhc";
443				reg = <0x53fb8000 0x4000>;
444				interrupts = <8>;
445				clocks = <&clks 87>, <&clks 64>, <&clks 46>;
446				clock-names = "ipg", "ahb", "per";
447				status = "disabled";
448			};
449
450			lcdc: lcdc@53fbc000 {
451				compatible = "fsl,imx25-fb", "fsl,imx21-fb";
452				reg = <0x53fbc000 0x4000>;
453				interrupts = <39>;
454				clocks = <&clks 103>, <&clks 66>, <&clks 49>;
455				clock-names = "ipg", "ahb", "per";
456				status = "disabled";
457			};
458
459			slcdc@53fc0000 {
460				reg = <0x53fc0000 0x4000>;
461				interrupts = <38>;
462				status = "disabled";
463			};
464
465			pwm4: pwm@53fc8000 {
466				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
467				#pwm-cells = <2>;
468				reg = <0x53fc8000 0x4000>;
469				clocks = <&clks 108>, <&clks 52>;
470				clock-names = "ipg", "per";
471				interrupts = <42>;
472			};
473
474			gpio1: gpio@53fcc000 {
475				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
476				reg = <0x53fcc000 0x4000>;
477				interrupts = <52>;
478				gpio-controller;
479				#gpio-cells = <2>;
480				interrupt-controller;
481				#interrupt-cells = <2>;
482			};
483
484			gpio2: gpio@53fd0000 {
485				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
486				reg = <0x53fd0000 0x4000>;
487				interrupts = <51>;
488				gpio-controller;
489				#gpio-cells = <2>;
490				interrupt-controller;
491				#interrupt-cells = <2>;
492			};
493
494			sdma: sdma@53fd4000 {
495				compatible = "fsl,imx25-sdma";
496				reg = <0x53fd4000 0x4000>;
497				clocks = <&clks 112>, <&clks 68>;
498				clock-names = "ipg", "ahb";
499				#dma-cells = <3>;
500				interrupts = <34>;
501				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
502			};
503
504			wdog@53fdc000 {
505				compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
506				reg = <0x53fdc000 0x4000>;
507				clocks = <&clks 126>;
508				clock-names = "";
509				interrupts = <55>;
510			};
511
512			pwm1: pwm@53fe0000 {
513				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
514				#pwm-cells = <2>;
515				reg = <0x53fe0000 0x4000>;
516				clocks = <&clks 105>, <&clks 52>;
517				clock-names = "ipg", "per";
518				interrupts = <26>;
519			};
520
521			iim: iim@53ff0000 {
522				compatible = "fsl,imx25-iim", "fsl,imx27-iim";
523				reg = <0x53ff0000 0x4000>;
524				interrupts = <19>;
525				clocks = <&clks 99>;
526			};
527
528			usbotg: usb@53ff4000 {
529				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
530				reg = <0x53ff4000 0x0200>;
531				interrupts = <37>;
532				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
533				clock-names = "ipg", "ahb", "per";
534				fsl,usbmisc = <&usbmisc 0>;
535				fsl,usbphy = <&usbphy0>;
536				status = "disabled";
537			};
538
539			usbhost1: usb@53ff4400 {
540				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
541				reg = <0x53ff4400 0x0200>;
542				interrupts = <35>;
543				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
544				clock-names = "ipg", "ahb", "per";
545				fsl,usbmisc = <&usbmisc 1>;
546				fsl,usbphy = <&usbphy1>;
547				status = "disabled";
548			};
549
550			usbmisc: usbmisc@53ff4600 {
551				#index-cells = <1>;
552				compatible = "fsl,imx25-usbmisc";
553				reg = <0x53ff4600 0x00f>;
554			};
555
556			dryice@53ffc000 {
557				compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
558				reg = <0x53ffc000 0x4000>;
559				clocks = <&clks 81>;
560				clock-names = "ipg";
561				interrupts = <25>;
562			};
563		};
564
565		iram: sram@78000000 {
566			compatible = "mmio-sram";
567			reg = <0x78000000 0x20000>;
568		};
569
570		emi@80000000 {
571			compatible = "fsl,emi-bus", "simple-bus";
572			#address-cells = <1>;
573			#size-cells = <1>;
574			reg = <0x80000000 0x3b002000>;
575			ranges;
576
577			nfc: nand@bb000000 {
578				#address-cells = <1>;
579				#size-cells = <1>;
580
581				compatible = "fsl,imx25-nand";
582				reg = <0xbb000000 0x2000>;
583				clocks = <&clks 50>;
584				clock-names = "";
585				interrupts = <33>;
586				status = "disabled";
587			};
588		};
589	};
590
591	usbphy {
592		compatible = "simple-bus";
593		#address-cells = <1>;
594		#size-cells = <0>;
595
596		usbphy0: usb-phy@0 {
597			reg = <0>;
598			compatible = "usb-nop-xceiv";
599		};
600
601		usbphy1: usb-phy@1 {
602			reg = <1>;
603			compatible = "usb-nop-xceiv";
604		};
605	};
606};
607