1/* 2 * Copyright 2015 Timesys Corporation. 3 * Copyright 2015 General Electric Company 4 * 5 * This file is dual-licensed: you can use it either under the terms 6 * of the GPL or the X11 license, at your option. Note that this dual 7 * licensing only applies to this file, and not this project as a 8 * whole. 9 * 10 * a) This file is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * version 2 as published by the Free Software Foundation. 13 * 14 * This file is distributed in the hope that it will be useful 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43/dts-v1/; 44 45#include "imx6q-bx50v3.dtsi" 46 47/ { 48 model = "General Electric B850v3"; 49 compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q"; 50 51 chosen { 52 stdout-path = &uart3; 53 }; 54}; 55 56&clks { 57 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 58 <&clks IMX6QDL_CLK_LDB_DI1_SEL>, 59 <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>, 60 <&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>; 61 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, 62 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, 63 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, 64 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>; 65}; 66 67&ldb { 68 fsl,dual-channel; 69 status = "okay"; 70 71 lvds0: lvds-channel@0 { 72 fsl,data-mapping = "spwg"; 73 fsl,data-width = <24>; 74 status = "okay"; 75 }; 76}; 77 78&i2c2 { 79 pca9547_ddc: mux@70 { 80 compatible = "nxp,pca9547"; 81 reg = <0x70>; 82 #address-cells = <1>; 83 #size-cells = <0>; 84 85 mux2_i2c1: i2c@0 { 86 #address-cells = <1>; 87 #size-cells = <0>; 88 reg = <0x0>; 89 }; 90 91 mux2_i2c2: i2c@1 { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 reg = <0x1>; 95 }; 96 97 mux2_i2c3: i2c@2 { 98 #address-cells = <1>; 99 #size-cells = <0>; 100 reg = <0x2>; 101 }; 102 103 mux2_i2c4: i2c@3 { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 reg = <0x3>; 107 }; 108 109 mux2_i2c5: i2c@4 { 110 #address-cells = <1>; 111 #size-cells = <0>; 112 reg = <0x4>; 113 }; 114 115 mux2_i2c6: i2c@5 { 116 #address-cells = <1>; 117 #size-cells = <0>; 118 reg = <0x5>; 119 }; 120 121 mux2_i2c7: i2c@6 { 122 #address-cells = <1>; 123 #size-cells = <0>; 124 reg = <0x6>; 125 }; 126 127 mux2_i2c8: i2c@7 { 128 #address-cells = <1>; 129 #size-cells = <0>; 130 reg = <0x7>; 131 }; 132 }; 133}; 134 135&hdmi { 136 ddc-i2c-bus = <&mux2_i2c1>; 137}; 138 139&mux1_i2c1 { 140 ads7830@4a { 141 compatible = "ti,ads7830"; 142 reg = <0x4a>; 143 }; 144}; 145