1/* 2 * Copyright 2015 Boundary Devices, Inc. 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * version 2 as published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * Or, alternatively 19 * 20 * b) Permission is hereby granted, free of charge, to any person 21 * obtaining a copy of this software and associated documentation 22 * files (the "Software"), to deal in the Software without 23 * restriction, including without limitation the rights to use 24 * copy, modify, merge, publish, distribute, sublicense, and/or 25 * sell copies of the Software, and to permit persons to whom the 26 * Software is furnished to do so, subject to the following 27 * conditions: 28 * 29 * The above copyright notice and this permission notice shall be 30 * included in all copies or substantial portions of the Software. 31 * 32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39 * OTHER DEALINGS IN THE SOFTWARE. 40 */ 41#include <dt-bindings/gpio/gpio.h> 42#include <dt-bindings/input/input.h> 43 44/ { 45 chosen { 46 stdout-path = &uart2; 47 }; 48 49 memory { 50 reg = <0x10000000 0x20000000>; 51 }; 52 53 regulators { 54 compatible = "simple-bus"; 55 #address-cells = <1>; 56 #size-cells = <0>; 57 58 reg_2p5v: regulator@0 { 59 compatible = "regulator-fixed"; 60 reg = <0>; 61 regulator-name = "2P5V"; 62 regulator-min-microvolt = <2500000>; 63 regulator-max-microvolt = <2500000>; 64 regulator-always-on; 65 }; 66 67 reg_3p3v: regulator@1 { 68 compatible = "regulator-fixed"; 69 reg = <1>; 70 regulator-name = "3P3V"; 71 regulator-min-microvolt = <3300000>; 72 regulator-max-microvolt = <3300000>; 73 regulator-always-on; 74 }; 75 76 reg_usb_otg_vbus: regulator@2 { 77 compatible = "regulator-fixed"; 78 reg = <2>; 79 regulator-name = "usb_otg_vbus"; 80 regulator-min-microvolt = <5000000>; 81 regulator-max-microvolt = <5000000>; 82 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 83 enable-active-high; 84 }; 85 86 reg_wlan_vmmc: regulator@3 { 87 compatible = "regulator-fixed"; 88 reg = <3>; 89 pinctrl-names = "default"; 90 pinctrl-0 = <&pinctrl_wlan_vmmc>; 91 regulator-name = "reg_wlan_vmmc"; 92 regulator-min-microvolt = <1800000>; 93 regulator-max-microvolt = <1800000>; 94 gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>; 95 startup-delay-us = <70000>; 96 enable-active-high; 97 }; 98 }; 99 100 bt_rfkill { 101 compatible = "rfkill-gpio"; 102 pinctrl-names = "default"; 103 pinctrl-0 = <&pinctrl_bt_rfkill>; 104 gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>; 105 name = "bt_rfkill"; 106 type = <2>; 107 }; 108 109 gpio-keys { 110 compatible = "gpio-keys"; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&pinctrl_gpio_keys>; 113 114 home { 115 label = "Home"; 116 gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>; 117 linux,code = <102>; 118 }; 119 120 back { 121 label = "Back"; 122 gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>; 123 linux,code = <158>; 124 }; 125 }; 126 127 leds { 128 compatible = "gpio-leds"; 129 pinctrl-names = "default"; 130 pinctrl-0 = <&pinctrl_leds>; 131 132 j14-pin1 { 133 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 134 retain-state-suspended; 135 default-state = "off"; 136 }; 137 138 j14-pin3 { 139 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; 140 retain-state-suspended; 141 default-state = "off"; 142 }; 143 144 j14-pins8-9 { 145 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; 146 retain-state-suspended; 147 default-state = "off"; 148 }; 149 150 j46-pin2 { 151 gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; 152 retain-state-suspended; 153 default-state = "off"; 154 }; 155 156 j46-pin3 { 157 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 158 retain-state-suspended; 159 default-state = "off"; 160 }; 161 }; 162 163 backlight_lcd { 164 compatible = "pwm-backlight"; 165 pwms = <&pwm1 0 5000000>; 166 brightness-levels = <0 4 8 16 32 64 128 255>; 167 default-brightness-level = <7>; 168 power-supply = <®_3p3v>; 169 status = "okay"; 170 }; 171 172 backlight_lvds0: backlight_lvds0 { 173 compatible = "pwm-backlight"; 174 pwms = <&pwm4 0 5000000>; 175 brightness-levels = <0 4 8 16 32 64 128 255>; 176 default-brightness-level = <7>; 177 power-supply = <®_3p3v>; 178 status = "okay"; 179 }; 180 181 panel_lvds0 { 182 compatible = "hannstar,hsd100pxn1"; 183 backlight = <&backlight_lvds0>; 184 185 port { 186 panel_in_lvds0: endpoint { 187 remote-endpoint = <&lvds0_out>; 188 }; 189 }; 190 }; 191 192 sound { 193 compatible = "fsl,imx6dl-nit6xlite-sgtl5000", 194 "fsl,imx-audio-sgtl5000"; 195 model = "imx6dl-nit6xlite-sgtl5000"; 196 ssi-controller = <&ssi1>; 197 audio-codec = <&codec>; 198 audio-routing = 199 "MIC_IN", "Mic Jack", 200 "Mic Jack", "Mic Bias", 201 "Headphone Jack", "HP_OUT"; 202 mux-int-port = <1>; 203 mux-ext-port = <3>; 204 }; 205}; 206 207&audmux { 208 pinctrl-names = "default"; 209 pinctrl-0 = <&pinctrl_audmux>; 210 status = "okay"; 211}; 212 213&clks { 214 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 215 <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 216 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 217 <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 218}; 219 220&ecspi1 { 221 fsl,spi-num-chipselects = <1>; 222 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 223 pinctrl-names = "default"; 224 pinctrl-0 = <&pinctrl_ecspi1>; 225 status = "okay"; 226 227 flash: m25p80@0 { 228 compatible = "microchip,sst25vf016b"; 229 spi-max-frequency = <20000000>; 230 reg = <0>; 231 }; 232}; 233 234&fec { 235 pinctrl-names = "default"; 236 pinctrl-0 = <&pinctrl_enet>; 237 phy-mode = "rgmii"; 238 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 239 txen-skew-ps = <0>; 240 txc-skew-ps = <3000>; 241 rxdv-skew-ps = <0>; 242 rxc-skew-ps = <3000>; 243 rxd0-skew-ps = <0>; 244 rxd1-skew-ps = <0>; 245 rxd2-skew-ps = <0>; 246 rxd3-skew-ps = <0>; 247 txd0-skew-ps = <0>; 248 txd1-skew-ps = <0>; 249 txd2-skew-ps = <0>; 250 txd3-skew-ps = <0>; 251 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 252 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 253 fsl,err006687-workaround-present; 254 status = "okay"; 255}; 256 257&hdmi { 258 ddc-i2c-bus = <&i2c2>; 259 status = "okay"; 260}; 261 262&i2c1 { 263 clock-frequency = <100000>; 264 pinctrl-names = "default"; 265 pinctrl-0 = <&pinctrl_i2c1>; 266 status = "okay"; 267 268 codec: sgtl5000@0a { 269 compatible = "fsl,sgtl5000"; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pinctrl_sgtl5000>; 272 reg = <0x0a>; 273 clocks = <&clks IMX6QDL_CLK_CKO>; 274 VDDA-supply = <®_2p5v>; 275 VDDIO-supply = <®_3p3v>; 276 }; 277}; 278 279&i2c2 { 280 clock-frequency = <100000>; 281 pinctrl-names = "default"; 282 pinctrl-0 = <&pinctrl_i2c2>; 283 status = "okay"; 284}; 285 286&i2c3 { 287 clock-frequency = <100000>; 288 pinctrl-names = "default"; 289 pinctrl-0 = <&pinctrl_i2c3>; 290 status = "okay"; 291 292 touchscreen@04 { 293 compatible = "eeti,egalax_ts"; 294 reg = <0x04>; 295 interrupt-parent = <&gpio1>; 296 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 297 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 298 }; 299 300 touchscreen@38 { 301 compatible = "edt,edt-ft5x06"; 302 reg = <0x38>; 303 interrupt-parent = <&gpio1>; 304 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 305 }; 306 307 rtc@6f { 308 compatible = "isil,isl1208"; 309 pinctrl-names = "default"; 310 pinctrl-0 = <&pinctrl_rtc>; 311 reg = <0x6f>; 312 interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>; 313 }; 314}; 315 316&iomuxc { 317 pinctrl-names = "default"; 318 pinctrl-0 = <&pinctrl_j10>; 319 pinctrl-1 = <&pinctrl_j28>; 320 321 imx6dl-nit6xlite { 322 pinctrl_audmux: audmuxgrp { 323 fsl,pins = < 324 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 325 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 326 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 327 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 328 >; 329 }; 330 331 pinctrl_bt_rfkill: bt_rfkillgrp { 332 fsl,pins = < 333 /* BT wake */ 334 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 335 /* BT reset */ 336 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0b0b0 337 /* BT reg en */ 338 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 339 /* BT host wake irq */ 340 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x100b0 341 >; 342 }; 343 344 pinctrl_ecspi1: ecspi1grp { 345 fsl,pins = < 346 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 347 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 348 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 349 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 350 >; 351 }; 352 353 pinctrl_enet: enetgrp { 354 fsl,pins = < 355 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 356 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 357 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 358 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 359 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 360 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 361 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 362 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 363 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 364 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 365 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 366 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 367 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 368 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 369 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 370 /* Phy reset */ 371 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 372 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 373 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 374 >; 375 }; 376 377 pinctrl_gpio_keys: gpio_keysgrp { 378 fsl,pins = < 379 /* Home Button: J14 pin 5 */ 380 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 381 /* Back Button: J14 pin 7 */ 382 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 383 >; 384 }; 385 386 pinctrl_i2c1: i2c1grp { 387 fsl,pins = < 388 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 389 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 390 >; 391 }; 392 393 pinctrl_i2c2: i2c2grp { 394 fsl,pins = < 395 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 396 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 397 >; 398 }; 399 400 pinctrl_i2c3: i2c3grp { 401 fsl,pins = < 402 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 403 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 404 /* Touch IRQ: J7 pin 4 */ 405 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 406 /* tcs2004 IRQ */ 407 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0 408 /* tsc2004 reset */ 409 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x0b0b0 410 >; 411 }; 412 413 pinctrl_j10: j10grp { 414 fsl,pins = < 415 /* Broadcom WiFi module pins */ 416 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 417 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 418 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 419 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 420 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0 421 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 422 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0 423 >; 424 }; 425 426 pinctrl_j28: j28grp { 427 fsl,pins = < 428 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 429 >; 430 }; 431 432 pinctrl_leds: ledsgrp { 433 fsl,pins = < 434 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0b0b0 435 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x0b0b0 436 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x030b0 437 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0b0b0 438 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0b0b0 439 >; 440 }; 441 442 pinctrl_pwm1: pwm1grp { 443 fsl,pins = < 444 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 445 >; 446 }; 447 448 pinctrl_pwm3: pwm3grp { 449 fsl,pins = < 450 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 451 >; 452 }; 453 454 pinctrl_pwm4: pwm4grp { 455 fsl,pins = < 456 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 457 >; 458 }; 459 460 pinctrl_wlan_vmmc: wlan_vmmcgrp { 461 fsl,pins = < 462 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x030b0 463 >; 464 }; 465 466 pinctrl_rtc: rtcgrp { 467 fsl,pins = < 468 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b0 469 >; 470 }; 471 472 pinctrl_sgtl5000: sgtl5000grp { 473 fsl,pins = < 474 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 475 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 476 >; 477 }; 478 479 pinctrl_uart1: uart1grp { 480 fsl,pins = < 481 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 482 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 483 >; 484 }; 485 486 pinctrl_uart2: uart2grp { 487 fsl,pins = < 488 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 489 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 490 >; 491 }; 492 493 pinctrl_uart3: uart3grp { 494 fsl,pins = < 495 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 496 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 497 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 498 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 499 >; 500 }; 501 502 pinctrl_usbotg: usbotggrp { 503 fsl,pins = < 504 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 505 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 506 /* power enable, high active */ 507 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 508 >; 509 }; 510 511 pinctrl_usdhc2: usdhc2grp { 512 fsl,pins = < 513 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 514 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 515 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 516 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 517 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 518 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 519 >; 520 }; 521 522 pinctrl_usdhc3: usdhc3grp { 523 fsl,pins = < 524 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 525 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 526 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 527 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 528 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 529 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 530 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 531 >; 532 }; 533 }; 534}; 535 536&ldb { 537 status = "okay"; 538 539 lvds-channel@0 { 540 fsl,data-mapping = "spwg"; 541 fsl,data-width = <18>; 542 status = "okay"; 543 544 port@4 { 545 reg = <4>; 546 547 lvds0_out: endpoint { 548 remote-endpoint = <&panel_in_lvds0>; 549 }; 550 }; 551 }; 552}; 553 554&pcie { 555 status = "okay"; 556}; 557 558&pwm1 { 559 pinctrl-names = "default"; 560 pinctrl-0 = <&pinctrl_pwm1>; 561 status = "okay"; 562}; 563 564&pwm3 { 565 pinctrl-names = "default"; 566 pinctrl-0 = <&pinctrl_pwm3>; 567 status = "okay"; 568}; 569 570&pwm4 { 571 pinctrl-names = "default"; 572 pinctrl-0 = <&pinctrl_pwm4>; 573 status = "okay"; 574}; 575 576&ssi1 { 577 status = "okay"; 578}; 579 580&uart1 { 581 pinctrl-names = "default"; 582 pinctrl-0 = <&pinctrl_uart1>; 583 status = "okay"; 584}; 585 586&uart2 { 587 pinctrl-names = "default"; 588 pinctrl-0 = <&pinctrl_uart2>; 589 status = "okay"; 590}; 591 592&uart3 { 593 pinctrl-names = "default"; 594 pinctrl-0 = <&pinctrl_uart3>; 595 uart-has-rtscts; 596 status = "okay"; 597}; 598 599&usbh1 { 600 status = "okay"; 601}; 602 603&usbotg { 604 vbus-supply = <®_usb_otg_vbus>; 605 pinctrl-names = "default"; 606 pinctrl-0 = <&pinctrl_usbotg>; 607 disable-over-current; 608 status = "okay"; 609}; 610 611&usdhc2 { 612 pinctrl-names = "default"; 613 pinctrl-0 = <&pinctrl_usdhc2>; 614 bus-width = <4>; 615 non-removable; 616 vmmc-supply = <®_3p3v>; 617 vqmmc-supply = <®_wlan_vmmc>; 618 vqmmc-1-8-v; 619 ocr-limit = <0x180>; /* 1.65v - 2.1v */ 620 cap-power-off-card; 621 keep-power-in-suspend; 622 status = "okay"; 623}; 624 625&usdhc3 { 626 pinctrl-names = "default"; 627 pinctrl-0 = <&pinctrl_usdhc3>; 628 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 629 vmmc-supply = <®_3p3v>; 630 status = "okay"; 631}; 632