1/* 2 * Copyright 2013-2014 Texas Instruments, Inc. 3 * 4 * Keystone 2 Edison soc device tree 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11/ { 12 compatible = "ti,k2e", "ti,keystone"; 13 model = "Texas Instruments Keystone 2 Edison SoC"; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 interrupt-parent = <&gic>; 20 21 cpu@0 { 22 compatible = "arm,cortex-a15"; 23 device_type = "cpu"; 24 reg = <0>; 25 }; 26 27 cpu@1 { 28 compatible = "arm,cortex-a15"; 29 device_type = "cpu"; 30 reg = <1>; 31 }; 32 33 cpu@2 { 34 compatible = "arm,cortex-a15"; 35 device_type = "cpu"; 36 reg = <2>; 37 }; 38 39 cpu@3 { 40 compatible = "arm,cortex-a15"; 41 device_type = "cpu"; 42 reg = <3>; 43 }; 44 }; 45 46 soc { 47 /include/ "keystone-k2e-clocks.dtsi" 48 49 usb: usb@2680000 { 50 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; 51 dwc3@2690000 { 52 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; 53 }; 54 }; 55 56 usb1_phy: usb_phy@2620750 { 57 compatible = "ti,keystone-usbphy"; 58 #address-cells = <1>; 59 #size-cells = <1>; 60 reg = <0x2620750 24>; 61 status = "disabled"; 62 }; 63 64 keystone_usb1: usb@25000000 { 65 compatible = "ti,keystone-dwc3"; 66 #address-cells = <1>; 67 #size-cells = <1>; 68 reg = <0x25000000 0x10000>; 69 clocks = <&clkusb1>; 70 clock-names = "usb"; 71 interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>; 72 ranges; 73 dma-coherent; 74 dma-ranges; 75 status = "disabled"; 76 77 usb1: dwc3@25010000 { 78 compatible = "synopsys,dwc3"; 79 reg = <0x25010000 0x70000>; 80 interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>; 81 usb-phy = <&usb1_phy>, <&usb1_phy>; 82 }; 83 }; 84 85 dspgpio0: keystone_dsp_gpio@02620240 { 86 compatible = "ti,keystone-dsp-gpio"; 87 gpio-controller; 88 #gpio-cells = <2>; 89 gpio,syscon-dev = <&devctrl 0x240>; 90 }; 91 92 pcie1: pcie@21020000 { 93 compatible = "ti,keystone-pcie","snps,dw-pcie"; 94 clocks = <&clkpcie1>; 95 clock-names = "pcie"; 96 #address-cells = <3>; 97 #size-cells = <2>; 98 reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>; 99 ranges = <0x82000000 0 0x60000000 0x60000000 100 0 0x10000000>; 101 102 status = "disabled"; 103 device_type = "pci"; 104 num-lanes = <2>; 105 bus-range = <0x00 0xff>; 106 107 /* error interrupt */ 108 interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>; 109 #interrupt-cells = <1>; 110 interrupt-map-mask = <0 0 0 7>; 111 interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */ 112 <0 0 0 2 &pcie_intc1 1>, /* INT B */ 113 <0 0 0 3 &pcie_intc1 2>, /* INT C */ 114 <0 0 0 4 &pcie_intc1 3>; /* INT D */ 115 116 pcie_msi_intc1: msi-interrupt-controller { 117 interrupt-controller; 118 #interrupt-cells = <1>; 119 interrupt-parent = <&gic>; 120 interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>, 121 <GIC_SPI 378 IRQ_TYPE_EDGE_RISING>, 122 <GIC_SPI 379 IRQ_TYPE_EDGE_RISING>, 123 <GIC_SPI 380 IRQ_TYPE_EDGE_RISING>, 124 <GIC_SPI 381 IRQ_TYPE_EDGE_RISING>, 125 <GIC_SPI 382 IRQ_TYPE_EDGE_RISING>, 126 <GIC_SPI 383 IRQ_TYPE_EDGE_RISING>, 127 <GIC_SPI 384 IRQ_TYPE_EDGE_RISING>; 128 }; 129 130 pcie_intc1: legacy-interrupt-controller { 131 interrupt-controller; 132 #interrupt-cells = <1>; 133 interrupt-parent = <&gic>; 134 interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>, 135 <GIC_SPI 374 IRQ_TYPE_EDGE_RISING>, 136 <GIC_SPI 375 IRQ_TYPE_EDGE_RISING>, 137 <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>; 138 }; 139 }; 140 141 mdio: mdio@24200f00 { 142 compatible = "ti,keystone_mdio", "ti,davinci_mdio"; 143 #address-cells = <1>; 144 #size-cells = <0>; 145 reg = <0x24200f00 0x100>; 146 status = "disabled"; 147 clocks = <&clkcpgmac>; 148 clock-names = "fck"; 149 bus_freq = <2500000>; 150 }; 151 /include/ "keystone-k2e-netcp.dtsi" 152 }; 153}; 154