1/* 2 * Device Tree Source for K2G SOC 3 * 4 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11 * kind, whether express or implied; without even the implied warranty 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16#include <dt-bindings/interrupt-controller/arm-gic.h> 17#include <dt-bindings/pinctrl/keystone.h> 18#include "skeleton.dtsi" 19 20/ { 21 compatible = "ti,k2g","ti,keystone"; 22 model = "Texas Instruments K2G SoC"; 23 #address-cells = <2>; 24 #size-cells = <2>; 25 interrupt-parent = <&gic>; 26 27 aliases { 28 serial0 = &uart0; 29 }; 30 31 cpus { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 35 cpu@0 { 36 compatible = "arm,cortex-a15"; 37 device_type = "cpu"; 38 reg = <0>; 39 }; 40 }; 41 42 gic: interrupt-controller@02561000 { 43 compatible = "arm,cortex-a15-gic"; 44 #interrupt-cells = <3>; 45 interrupt-controller; 46 reg = <0x0 0x02561000 0x0 0x1000>, 47 <0x0 0x02562000 0x0 0x2000>, 48 <0x0 0x02564000 0x0 0x1000>, 49 <0x0 0x02566000 0x0 0x2000>; 50 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 51 IRQ_TYPE_LEVEL_HIGH)>; 52 }; 53 54 timer { 55 compatible = "arm,armv7-timer"; 56 interrupts = 57 <GIC_PPI 13 58 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 59 <GIC_PPI 14 60 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 61 <GIC_PPI 11 62 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 63 <GIC_PPI 10 64 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 65 }; 66 67 pmu { 68 compatible = "arm,cortex-a15-pmu"; 69 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; 70 }; 71 72 soc { 73 #address-cells = <1>; 74 #size-cells = <1>; 75 compatible = "ti,keystone","simple-bus"; 76 ranges = <0x0 0x0 0x0 0xc0000000>; 77 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; 78 79 k2g_pinctrl: pinmux@02621000 { 80 compatible = "pinctrl-single"; 81 reg = <0x02621000 0x410>; 82 pinctrl-single,register-width = <32>; 83 pinctrl-single,function-mask = <0x001b0007>; 84 }; 85 86 devctrl: device-state-control@02620000 { 87 compatible = "ti,keystone-devctrl", "syscon"; 88 reg = <0x02620000 0x1000>; 89 }; 90 91 uart0: serial@02530c00 { 92 compatible = "ns16550a"; 93 current-speed = <115200>; 94 reg-shift = <2>; 95 reg-io-width = <4>; 96 reg = <0x02530c00 0x100>; 97 interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; 98 clock-frequency = <200000000>; 99 status = "disabled"; 100 }; 101 102 kirq0: keystone_irq@026202a0 { 103 compatible = "ti,keystone-irq"; 104 interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>; 105 interrupt-controller; 106 #interrupt-cells = <1>; 107 ti,syscon-dev = <&devctrl 0x2a0>; 108 }; 109 110 dspgpio0: keystone_dsp_gpio@02620240 { 111 compatible = "ti,keystone-dsp-gpio"; 112 gpio-controller; 113 #gpio-cells = <2>; 114 gpio,syscon-dev = <&devctrl 0x240>; 115 }; 116 117 msgmgr: msgmgr@02a00000 { 118 compatible = "ti,k2g-message-manager"; 119 #mbox-cells = <2>; 120 reg-names = "queue_proxy_region", 121 "queue_state_debug_region"; 122 reg = <0x02a00000 0x400000>, <0x028c3400 0x400>; 123 interrupt-names = "rx_005", 124 "rx_057"; 125 interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 126 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>; 127 }; 128 }; 129}; 130