1/* 2 * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/* 10 * The Gumstix Overo must be combined with an expansion board. 11 */ 12 13/ { 14 15 memory@0 { 16 device_type = "memory"; 17 reg = <0 0>; 18 }; 19 20 pwmleds { 21 compatible = "pwm-leds"; 22 23 overo { 24 label = "overo:blue:COM"; 25 pwms = <&twl_pwmled 1 7812500>; 26 max-brightness = <127>; 27 linux,default-trigger = "mmc0"; 28 }; 29 }; 30 31 sound { 32 compatible = "ti,omap-twl4030"; 33 ti,model = "overo"; 34 35 ti,mcbsp = <&mcbsp2>; 36 }; 37 38 /* HS USB Port 2 Power */ 39 hsusb2_power: hsusb2_power_reg { 40 compatible = "regulator-fixed"; 41 regulator-name = "hsusb2_vbus"; 42 regulator-min-microvolt = <5000000>; 43 regulator-max-microvolt = <5000000>; 44 gpio = <&gpio6 8 GPIO_ACTIVE_HIGH>; /* gpio_168: vbus enable */ 45 startup-delay-us = <70000>; 46 enable-active-high; 47 }; 48 49 /* HS USB Host PHY on PORT 2 */ 50 hsusb2_phy: hsusb2_phy { 51 compatible = "usb-nop-xceiv"; 52 reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>; /* gpio_183 */ 53 vcc-supply = <&hsusb2_power>; 54 }; 55 56 /* Regulator to trigger the nPoweron signal of the Wifi module */ 57 w3cbw003c_npoweron: regulator-w3cbw003c-npoweron { 58 compatible = "regulator-fixed"; 59 regulator-name = "regulator-w3cbw003c-npoweron"; 60 regulator-min-microvolt = <3300000>; 61 regulator-max-microvolt = <3300000>; 62 gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54: nPoweron */ 63 enable-active-high; 64 }; 65 66 /* Regulator to trigger the nReset signal of the Wifi module */ 67 w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset { 68 pinctrl-names = "default"; 69 pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>; 70 compatible = "regulator-fixed"; 71 regulator-name = "regulator-w3cbw003c-wifi-nreset"; 72 regulator-min-microvolt = <3300000>; 73 regulator-max-microvolt = <3300000>; 74 gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */ 75 startup-delay-us = <10000>; 76 }; 77 78 /* Regulator to trigger the nReset signal of the Bluetooth module */ 79 w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset { 80 compatible = "regulator-fixed"; 81 regulator-name = "regulator-w3cbw003c-bt-nreset"; 82 regulator-min-microvolt = <3300000>; 83 regulator-max-microvolt = <3300000>; 84 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164: BT nReset */ 85 startup-delay-us = <10000>; 86 }; 87}; 88 89&omap3_pmx_core { 90 pinctrl-names = "default"; 91 pinctrl-0 = < 92 &hsusb2_pins 93 >; 94 95 uart2_pins: pinmux_uart2_pins { 96 pinctrl-single,pins = < 97 OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */ 98 OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */ 99 OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */ 100 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */ 101 >; 102 }; 103 104 i2c1_pins: pinmux_i2c1_pins { 105 pinctrl-single,pins = < 106 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 107 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ 108 >; 109 }; 110 111 mmc1_pins: pinmux_mmc1_pins { 112 pinctrl-single,pins = < 113 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 114 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 115 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 116 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 117 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 118 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 119 >; 120 }; 121 122 mmc2_pins: pinmux_mmc2_pins { 123 pinctrl-single,pins = < 124 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ 125 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ 126 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ 127 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ 128 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ 129 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ 130 >; 131 }; 132 133 /* WiFi/BT combo */ 134 w3cbw003c_pins: pinmux_w3cbw003c_pins { 135 pinctrl-single,pins = < 136 OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs3.gpio_54 */ 137 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */ 138 >; 139 }; 140 141 hsusb2_pins: pinmux_hsusb2_pins { 142 pinctrl-single,pins = < 143 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ 144 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ 145 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ 146 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ 147 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ 148 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ 149 OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4) /* i2c2_scl.gpio_168 */ 150 OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4) /* i2c2_sda.gpio_183 */ 151 >; 152 }; 153}; 154 155&i2c1 { 156 pinctrl-names = "default"; 157 pinctrl-0 = <&i2c1_pins>; 158 clock-frequency = <2600000>; 159 160 twl: twl@48 { 161 reg = <0x48>; 162 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 163 interrupt-parent = <&intc>; 164 165 twl_audio: audio { 166 compatible = "ti,twl4030-audio"; 167 codec { 168 }; 169 }; 170 }; 171}; 172 173#include "twl4030.dtsi" 174#include "twl4030_omap3.dtsi" 175 176/* i2c2 pins are used for gpio */ 177&i2c2 { 178 status = "disabled"; 179}; 180 181/* on board microSD slot */ 182&mmc1 { 183 pinctrl-names = "default"; 184 pinctrl-0 = <&mmc1_pins>; 185 vmmc-supply = <&vmmc1>; 186 bus-width = <4>; 187}; 188 189/* optional on board WiFi */ 190&mmc2 { 191 pinctrl-names = "default"; 192 pinctrl-0 = <&mmc2_pins>; 193 vmmc-supply = <&w3cbw003c_npoweron>; 194 vqmmc-supply = <&w3cbw003c_bt_nreset>; 195 vmmc_aux-supply = <&w3cbw003c_wifi_nreset>; 196 bus-width = <4>; 197 cap-sdio-irq; 198 non-removable; 199}; 200 201&twl_gpio { 202 ti,use-leds; 203}; 204 205&usb_otg_hs { 206 interface-type = <0>; 207 usb-phy = <&usb2_phy>; 208 phys = <&usb2_phy>; 209 phy-names = "usb2-phy"; 210 mode = <3>; 211 power = <50>; 212}; 213 214&usbhshost { 215 port2-mode = "ehci-phy"; 216}; 217 218&usbhsehci { 219 phys = <0 &hsusb2_phy>; 220}; 221 222&uart2 { 223 pinctrl-names = "default"; 224 pinctrl-0 = <&uart2_pins>; 225}; 226 227&mcbsp2 { 228 status = "okay"; 229}; 230 231&gpmc { 232 ranges = <0 0 0x30000000 0x1000000>, /* CS0 */ 233 <4 0 0x2b000000 0x1000000>, /* CS4 */ 234 <5 0 0x2c000000 0x1000000>; /* CS5 */ 235 236 nand@0,0 { 237 compatible = "ti,omap2-nand"; 238 linux,mtd-name= "micron,mt29c4g96maz"; 239 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 240 interrupt-parent = <&gpmc>; 241 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 242 <1 IRQ_TYPE_NONE>; /* termcount */ 243 nand-bus-width = <16>; 244 gpmc,device-width = <2>; 245 ti,nand-ecc-opt = "bch8"; 246 247 gpmc,sync-clk-ps = <0>; 248 gpmc,cs-on-ns = <0>; 249 gpmc,cs-rd-off-ns = <44>; 250 gpmc,cs-wr-off-ns = <44>; 251 gpmc,adv-on-ns = <6>; 252 gpmc,adv-rd-off-ns = <34>; 253 gpmc,adv-wr-off-ns = <44>; 254 gpmc,we-off-ns = <40>; 255 gpmc,oe-off-ns = <54>; 256 gpmc,access-ns = <64>; 257 gpmc,rd-cycle-ns = <82>; 258 gpmc,wr-cycle-ns = <82>; 259 gpmc,wr-access-ns = <40>; 260 gpmc,wr-data-mux-bus-ns = <0>; 261 262 #address-cells = <1>; 263 #size-cells = <1>; 264 265 partition@0 { 266 label = "SPL"; 267 reg = <0 0x80000>; /* 512KiB */ 268 }; 269 partition@80000 { 270 label = "U-Boot"; 271 reg = <0x80000 0x1C0000>; /* 1792KiB */ 272 }; 273 partition@1c0000 { 274 label = "Environment"; 275 reg = <0x240000 0x40000>; /* 256KiB */ 276 }; 277 partition@280000 { 278 label = "Kernel"; 279 reg = <0x280000 0x800000>; /* 8192KiB */ 280 }; 281 partition@780000 { 282 label = "Filesystem"; 283 reg = <0xA80000 0>; 284 /* HACK: MTDPART_SIZ_FULL=0 so fill to end */ 285 }; 286 }; 287}; 288