1/* 2 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board 3 * 4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 5 * 6 * Licensed under GPLv2. 7 */ 8/dts-v1/; 9#include "at91sam9g45.dtsi" 10 11/ { 12 model = "Ronetix pm9g45"; 13 compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9"; 14 15 chosen { 16 bootargs = "console=ttyS0,115200"; 17 }; 18 19 memory { 20 reg = <0x70000000 0x8000000>; 21 }; 22 23 clocks { 24 slow_xtal { 25 clock-frequency = <32768>; 26 }; 27 28 main_xtal { 29 clock-frequency = <12000000>; 30 }; 31 }; 32 33 ahb { 34 apb { 35 dbgu: serial@ffffee00 { 36 status = "okay"; 37 }; 38 39 pinctrl@fffff200 { 40 41 board { 42 pinctrl_board_nand: nand0-board { 43 atmel,pins = 44 <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/ 45 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ 46 }; 47 }; 48 49 mmc { 50 pinctrl_board_mmc: mmc0-board { 51 atmel,pins = 52 <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */ 53 }; 54 }; 55 }; 56 57 mmc0: mmc@fff80000 { 58 pinctrl-0 = < 59 &pinctrl_board_mmc 60 &pinctrl_mmc0_slot0_clk_cmd_dat0 61 &pinctrl_mmc0_slot0_dat1_3>; 62 status = "okay"; 63 slot@0 { 64 reg = <0>; 65 bus-width = <4>; 66 cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>; 67 }; 68 }; 69 70 macb0: ethernet@fffbc000 { 71 phy-mode = "rmii"; 72 status = "okay"; 73 }; 74 75 }; 76 77 nand0: nand@40000000 { 78 nand-bus-width = <8>; 79 nand-ecc-mode = "soft"; 80 nand-on-flash-bbt; 81 pinctrl-0 = <&pinctrl_board_nand>; 82 83 gpios = <&pioD 3 GPIO_ACTIVE_HIGH 84 &pioC 14 GPIO_ACTIVE_HIGH 85 0 86 >; 87 88 status = "okay"; 89 90 at91bootstrap@0 { 91 label = "at91bootstrap"; 92 reg = <0x0 0x20000>; 93 }; 94 95 barebox@20000 { 96 label = "barebox"; 97 reg = <0x20000 0x40000>; 98 }; 99 100 bareboxenv@60000 { 101 label = "bareboxenv"; 102 reg = <0x60000 0x1A0000>; 103 }; 104 105 kernel@200000 { 106 label = "bareboxenv2"; 107 reg = <0x200000 0x300000>; 108 }; 109 110 kernel@500000 { 111 label = "root"; 112 reg = <0x500000 0x400000>; 113 }; 114 115 data@900000 { 116 label = "data"; 117 reg = <0x900000 0x8340000>; 118 }; 119 }; 120 121 usb0: ohci@00700000 { 122 status = "okay"; 123 num-ports = <2>; 124 }; 125 126 usb1: ehci@00800000 { 127 status = "okay"; 128 }; 129 }; 130 131 leds { 132 compatible = "gpio-leds"; 133 134 led0 { 135 label = "led0"; 136 gpios = <&pioD 0 GPIO_ACTIVE_LOW>; 137 linux,default-trigger = "nand-disk"; 138 }; 139 140 led1 { 141 label = "led1"; 142 gpios = <&pioD 31 GPIO_ACTIVE_HIGH>; 143 linux,default-trigger = "heartbeat"; 144 }; 145 }; 146 147 gpio_keys { 148 compatible = "gpio-keys"; 149 #address-cells = <1>; 150 #size-cells = <0>; 151 152 right { 153 label = "SW4"; 154 gpios = <&pioE 7 GPIO_ACTIVE_LOW>; 155 linux,code = <106>; 156 }; 157 158 up { 159 label = "SW3"; 160 gpios = <&pioE 8 GPIO_ACTIVE_LOW>; 161 linux,code = <103>; 162 }; 163 }; 164}; 165