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1 /*
2  * TI DaVinci DM646X EVM board
3  *
4  * Derived from: arch/arm/mach-davinci/board-evm.c
5  * Copyright (C) 2006 Texas Instruments.
6  *
7  * (C) 2007-2008, MontaVista Software, Inc.
8  *
9  * This file is licensed under the terms of the GNU General Public License
10  * version 2. This program is licensed "as is" without any warranty of any
11  * kind, whether express or implied.
12  *
13  */
14 
15 /**************************************************************************
16  * Included Files
17  **************************************************************************/
18 
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/platform_data/at24.h>
26 #include <linux/i2c/pcf857x.h>
27 
28 #include <media/i2c/tvp514x.h>
29 #include <media/i2c/adv7343.h>
30 
31 #include <linux/mtd/mtd.h>
32 #include <linux/mtd/nand.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/clk.h>
35 #include <linux/export.h>
36 #include <linux/platform_data/gpio-davinci.h>
37 #include <linux/platform_data/i2c-davinci.h>
38 #include <linux/platform_data/mtd-davinci.h>
39 #include <linux/platform_data/mtd-davinci-aemif.h>
40 
41 #include <asm/mach-types.h>
42 #include <asm/mach/arch.h>
43 
44 #include <mach/common.h>
45 #include <mach/irqs.h>
46 #include <mach/serial.h>
47 #include <mach/clock.h>
48 
49 #include "davinci.h"
50 #include "clock.h"
51 
52 #define NAND_BLOCK_SIZE		SZ_128K
53 
54 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
55  * and U-Boot environment this avoids dependency on any particular combination
56  * of UBL, U-Boot or flashing tools etc.
57  */
58 static struct mtd_partition davinci_nand_partitions[] = {
59 	{
60 		/* UBL, U-Boot with environment */
61 		.name		= "bootloader",
62 		.offset		= MTDPART_OFS_APPEND,
63 		.size		= 16 * NAND_BLOCK_SIZE,
64 		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
65 	}, {
66 		.name		= "kernel",
67 		.offset		= MTDPART_OFS_APPEND,
68 		.size		= SZ_4M,
69 		.mask_flags	= 0,
70 	}, {
71 		.name		= "filesystem",
72 		.offset		= MTDPART_OFS_APPEND,
73 		.size		= MTDPART_SIZ_FULL,
74 		.mask_flags	= 0,
75 	}
76 };
77 
78 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
79 	.wsetup		= 29,
80 	.wstrobe	= 24,
81 	.whold		= 14,
82 	.rsetup		= 19,
83 	.rstrobe	= 33,
84 	.rhold		= 0,
85 	.ta		= 29,
86 };
87 
88 static struct davinci_nand_pdata davinci_nand_data = {
89 	.mask_cle 		= 0x80000,
90 	.mask_ale 		= 0x40000,
91 	.parts			= davinci_nand_partitions,
92 	.nr_parts		= ARRAY_SIZE(davinci_nand_partitions),
93 	.ecc_mode		= NAND_ECC_HW,
94 	.ecc_bits		= 1,
95 	.options		= 0,
96 };
97 
98 static struct resource davinci_nand_resources[] = {
99 	{
100 		.start		= DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
101 		.end		= DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
102 		.flags		= IORESOURCE_MEM,
103 	}, {
104 		.start		= DM646X_ASYNC_EMIF_CONTROL_BASE,
105 		.end		= DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
106 		.flags		= IORESOURCE_MEM,
107 	},
108 };
109 
110 static struct platform_device davinci_nand_device = {
111 	.name			= "davinci_nand",
112 	.id			= 0,
113 
114 	.num_resources		= ARRAY_SIZE(davinci_nand_resources),
115 	.resource		= davinci_nand_resources,
116 
117 	.dev			= {
118 		.platform_data	= &davinci_nand_data,
119 	},
120 };
121 
122 #define HAS_ATA		IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
123 
124 #ifdef CONFIG_I2C
125 /* CPLD Register 0 bits to control ATA */
126 #define DM646X_EVM_ATA_RST		BIT(0)
127 #define DM646X_EVM_ATA_PWD		BIT(1)
128 
129 /* CPLD Register 0 Client: used for I/O Control */
cpld_reg0_probe(struct i2c_client * client,const struct i2c_device_id * id)130 static int cpld_reg0_probe(struct i2c_client *client,
131 			   const struct i2c_device_id *id)
132 {
133 	if (HAS_ATA) {
134 		u8 data;
135 		struct i2c_msg msg[2] = {
136 			{
137 				.addr = client->addr,
138 				.flags = I2C_M_RD,
139 				.len = 1,
140 				.buf = &data,
141 			},
142 			{
143 				.addr = client->addr,
144 				.flags = 0,
145 				.len = 1,
146 				.buf = &data,
147 			},
148 		};
149 
150 		/* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
151 		i2c_transfer(client->adapter, msg, 1);
152 		data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
153 		i2c_transfer(client->adapter, msg + 1, 1);
154 	}
155 
156 	return 0;
157 }
158 
159 static const struct i2c_device_id cpld_reg_ids[] = {
160 	{ "cpld_reg0", 0, },
161 	{ },
162 };
163 
164 static struct i2c_driver dm6467evm_cpld_driver = {
165 	.driver.name	= "cpld_reg0",
166 	.id_table	= cpld_reg_ids,
167 	.probe		= cpld_reg0_probe,
168 };
169 
170 /* LEDS */
171 
172 static struct gpio_led evm_leds[] = {
173 	{ .name = "DS1", .active_low = 1, },
174 	{ .name = "DS2", .active_low = 1, },
175 	{ .name = "DS3", .active_low = 1, },
176 	{ .name = "DS4", .active_low = 1, },
177 };
178 
179 static const struct gpio_led_platform_data evm_led_data = {
180 	.num_leds = ARRAY_SIZE(evm_leds),
181 	.leds     = evm_leds,
182 };
183 
184 static struct platform_device *evm_led_dev;
185 
evm_led_setup(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)186 static int evm_led_setup(struct i2c_client *client, int gpio,
187 			unsigned int ngpio, void *c)
188 {
189 	struct gpio_led *leds = evm_leds;
190 	int status;
191 
192 	while (ngpio--) {
193 		leds->gpio = gpio++;
194 		leds++;
195 	}
196 
197 	evm_led_dev = platform_device_alloc("leds-gpio", 0);
198 	platform_device_add_data(evm_led_dev, &evm_led_data,
199 				sizeof(evm_led_data));
200 
201 	evm_led_dev->dev.parent = &client->dev;
202 	status = platform_device_add(evm_led_dev);
203 	if (status < 0) {
204 		platform_device_put(evm_led_dev);
205 		evm_led_dev = NULL;
206 	}
207 	return status;
208 }
209 
evm_led_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)210 static int evm_led_teardown(struct i2c_client *client, int gpio,
211 				unsigned ngpio, void *c)
212 {
213 	if (evm_led_dev) {
214 		platform_device_unregister(evm_led_dev);
215 		evm_led_dev = NULL;
216 	}
217 	return 0;
218 }
219 
220 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
221 
evm_sw_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)222 static int evm_sw_setup(struct i2c_client *client, int gpio,
223 			unsigned ngpio, void *c)
224 {
225 	int status;
226 	int i;
227 	char label[10];
228 
229 	for (i = 0; i < 4; ++i) {
230 		snprintf(label, 10, "user_sw%d", i);
231 		status = gpio_request(gpio, label);
232 		if (status)
233 			goto out_free;
234 		evm_sw_gpio[i] = gpio++;
235 
236 		status = gpio_direction_input(evm_sw_gpio[i]);
237 		if (status) {
238 			gpio_free(evm_sw_gpio[i]);
239 			evm_sw_gpio[i] = -EINVAL;
240 			goto out_free;
241 		}
242 
243 		status = gpio_export(evm_sw_gpio[i], 0);
244 		if (status) {
245 			gpio_free(evm_sw_gpio[i]);
246 			evm_sw_gpio[i] = -EINVAL;
247 			goto out_free;
248 		}
249 	}
250 	return status;
251 out_free:
252 	for (i = 0; i < 4; ++i) {
253 		if (evm_sw_gpio[i] != -EINVAL) {
254 			gpio_free(evm_sw_gpio[i]);
255 			evm_sw_gpio[i] = -EINVAL;
256 		}
257 	}
258 	return status;
259 }
260 
evm_sw_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)261 static int evm_sw_teardown(struct i2c_client *client, int gpio,
262 			unsigned ngpio, void *c)
263 {
264 	int i;
265 
266 	for (i = 0; i < 4; ++i) {
267 		if (evm_sw_gpio[i] != -EINVAL) {
268 			gpio_unexport(evm_sw_gpio[i]);
269 			gpio_free(evm_sw_gpio[i]);
270 			evm_sw_gpio[i] = -EINVAL;
271 		}
272 	}
273 	return 0;
274 }
275 
evm_pcf_setup(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)276 static int evm_pcf_setup(struct i2c_client *client, int gpio,
277 			unsigned int ngpio, void *c)
278 {
279 	int status;
280 
281 	if (ngpio < 8)
282 		return -EINVAL;
283 
284 	status = evm_sw_setup(client, gpio, 4, c);
285 	if (status)
286 		return status;
287 
288 	return evm_led_setup(client, gpio+4, 4, c);
289 }
290 
evm_pcf_teardown(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)291 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
292 			unsigned int ngpio, void *c)
293 {
294 	BUG_ON(ngpio < 8);
295 
296 	evm_sw_teardown(client, gpio, 4, c);
297 	evm_led_teardown(client, gpio+4, 4, c);
298 
299 	return 0;
300 }
301 
302 static struct pcf857x_platform_data pcf_data = {
303 	.gpio_base	= DAVINCI_N_GPIO+1,
304 	.setup		= evm_pcf_setup,
305 	.teardown	= evm_pcf_teardown,
306 };
307 
308 /* Most of this EEPROM is unused, but U-Boot uses some data:
309  *  - 0x7f00, 6 bytes Ethernet Address
310  *  - ... newer boards may have more
311  */
312 
313 static struct at24_platform_data eeprom_info = {
314 	.byte_len       = (256*1024) / 8,
315 	.page_size      = 64,
316 	.flags          = AT24_FLAG_ADDR16,
317 	.setup          = davinci_get_mac_addr,
318 	.context	= (void *)0x7f00,
319 };
320 #endif
321 
322 static u8 dm646x_iis_serializer_direction[] = {
323        TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
324 };
325 
326 static u8 dm646x_dit_serializer_direction[] = {
327        TX_MODE,
328 };
329 
330 static struct snd_platform_data dm646x_evm_snd_data[] = {
331 	{
332 		.tx_dma_offset  = 0x400,
333 		.rx_dma_offset  = 0x400,
334 		.op_mode        = DAVINCI_MCASP_IIS_MODE,
335 		.num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
336 		.tdm_slots      = 2,
337 		.serial_dir     = dm646x_iis_serializer_direction,
338 		.asp_chan_q     = EVENTQ_0,
339 	},
340 	{
341 		.tx_dma_offset  = 0x400,
342 		.rx_dma_offset  = 0,
343 		.op_mode        = DAVINCI_MCASP_DIT_MODE,
344 		.num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
345 		.tdm_slots      = 32,
346 		.serial_dir     = dm646x_dit_serializer_direction,
347 		.asp_chan_q     = EVENTQ_0,
348 	},
349 };
350 
351 #ifdef CONFIG_I2C
352 static struct i2c_client *cpld_client;
353 
cpld_video_probe(struct i2c_client * client,const struct i2c_device_id * id)354 static int cpld_video_probe(struct i2c_client *client,
355 			const struct i2c_device_id *id)
356 {
357 	cpld_client = client;
358 	return 0;
359 }
360 
cpld_video_remove(struct i2c_client * client)361 static int cpld_video_remove(struct i2c_client *client)
362 {
363 	cpld_client = NULL;
364 	return 0;
365 }
366 
367 static const struct i2c_device_id cpld_video_id[] = {
368 	{ "cpld_video", 0 },
369 	{ }
370 };
371 
372 static struct i2c_driver cpld_video_driver = {
373 	.driver = {
374 		.name	= "cpld_video",
375 	},
376 	.probe		= cpld_video_probe,
377 	.remove		= cpld_video_remove,
378 	.id_table	= cpld_video_id,
379 };
380 
evm_init_cpld(void)381 static void evm_init_cpld(void)
382 {
383 	i2c_add_driver(&cpld_video_driver);
384 }
385 
386 static struct i2c_board_info __initdata i2c_info[] =  {
387 	{
388 		I2C_BOARD_INFO("24c256", 0x50),
389 		.platform_data  = &eeprom_info,
390 	},
391 	{
392 		I2C_BOARD_INFO("pcf8574a", 0x38),
393 		.platform_data	= &pcf_data,
394 	},
395 	{
396 		I2C_BOARD_INFO("cpld_reg0", 0x3a),
397 	},
398 	{
399 		I2C_BOARD_INFO("tlv320aic33", 0x18),
400 	},
401 	{
402 		I2C_BOARD_INFO("cpld_video", 0x3b),
403 	},
404 };
405 
406 static struct davinci_i2c_platform_data i2c_pdata = {
407 	.bus_freq       = 100 /* kHz */,
408 	.bus_delay      = 0 /* usec */,
409 };
410 
411 #define VCH2CLK_MASK		(BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
412 #define VCH2CLK_SYSCLK8		(BIT(9))
413 #define VCH2CLK_AUXCLK		(BIT(9) | BIT(8))
414 #define VCH3CLK_MASK		(BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
415 #define VCH3CLK_SYSCLK8		(BIT(13))
416 #define VCH3CLK_AUXCLK		(BIT(14) | BIT(13))
417 
418 #define VIDCH2CLK		(BIT(10))
419 #define VIDCH3CLK		(BIT(11))
420 #define VIDCH1CLK		(BIT(4))
421 #define TVP7002_INPUT		(BIT(4))
422 #define TVP5147_INPUT		(~BIT(4))
423 #define VPIF_INPUT_ONE_CHANNEL	(BIT(5))
424 #define VPIF_INPUT_TWO_CHANNEL	(~BIT(5))
425 #define TVP5147_CH0		"tvp514x-0"
426 #define TVP5147_CH1		"tvp514x-1"
427 
428 /* spin lock for updating above registers */
429 static spinlock_t vpif_reg_lock;
430 
set_vpif_clock(int mux_mode,int hd)431 static int set_vpif_clock(int mux_mode, int hd)
432 {
433 	unsigned long flags;
434 	unsigned int value;
435 	int val = 0;
436 	int err = 0;
437 
438 	if (!cpld_client)
439 		return -ENXIO;
440 
441 	/* disable the clock */
442 	spin_lock_irqsave(&vpif_reg_lock, flags);
443 	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
444 	value |= (VIDCH3CLK | VIDCH2CLK);
445 	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
446 	spin_unlock_irqrestore(&vpif_reg_lock, flags);
447 
448 	val = i2c_smbus_read_byte(cpld_client);
449 	if (val < 0)
450 		return val;
451 
452 	if (mux_mode == 1)
453 		val &= ~0x40;
454 	else
455 		val |= 0x40;
456 
457 	err = i2c_smbus_write_byte(cpld_client, val);
458 	if (err)
459 		return err;
460 
461 	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
462 	value &= ~(VCH2CLK_MASK);
463 	value &= ~(VCH3CLK_MASK);
464 
465 	if (hd >= 1)
466 		value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
467 	else
468 		value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
469 
470 	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
471 
472 	spin_lock_irqsave(&vpif_reg_lock, flags);
473 	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
474 	/* enable the clock */
475 	value &= ~(VIDCH3CLK | VIDCH2CLK);
476 	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
477 	spin_unlock_irqrestore(&vpif_reg_lock, flags);
478 
479 	return 0;
480 }
481 
482 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
483 	{
484 		.name	= "adv7343",
485 		.board_info = {
486 			I2C_BOARD_INFO("adv7343", 0x2a),
487 		},
488 	},
489 	{
490 		.name	= "ths7303",
491 		.board_info = {
492 			I2C_BOARD_INFO("ths7303", 0x2c),
493 		},
494 	},
495 };
496 
497 static const struct vpif_output dm6467_ch0_outputs[] = {
498 	{
499 		.output = {
500 			.index = 0,
501 			.name = "Composite",
502 			.type = V4L2_OUTPUT_TYPE_ANALOG,
503 			.capabilities = V4L2_OUT_CAP_STD,
504 			.std = V4L2_STD_ALL,
505 		},
506 		.subdev_name = "adv7343",
507 		.output_route = ADV7343_COMPOSITE_ID,
508 	},
509 	{
510 		.output = {
511 			.index = 1,
512 			.name = "Component",
513 			.type = V4L2_OUTPUT_TYPE_ANALOG,
514 			.capabilities = V4L2_OUT_CAP_DV_TIMINGS,
515 		},
516 		.subdev_name = "adv7343",
517 		.output_route = ADV7343_COMPONENT_ID,
518 	},
519 	{
520 		.output = {
521 			.index = 2,
522 			.name = "S-Video",
523 			.type = V4L2_OUTPUT_TYPE_ANALOG,
524 			.capabilities = V4L2_OUT_CAP_STD,
525 			.std = V4L2_STD_ALL,
526 		},
527 		.subdev_name = "adv7343",
528 		.output_route = ADV7343_SVIDEO_ID,
529 	},
530 };
531 
532 static struct vpif_display_config dm646x_vpif_display_config = {
533 	.set_clock	= set_vpif_clock,
534 	.subdevinfo	= dm646x_vpif_subdev,
535 	.subdev_count	= ARRAY_SIZE(dm646x_vpif_subdev),
536 	.chan_config[0] = {
537 		.outputs = dm6467_ch0_outputs,
538 		.output_count = ARRAY_SIZE(dm6467_ch0_outputs),
539 	},
540 	.card_name	= "DM646x EVM",
541 };
542 
543 /**
544  * setup_vpif_input_path()
545  * @channel: channel id (0 - CH0, 1 - CH1)
546  * @sub_dev_name: ptr sub device name
547  *
548  * This will set vpif input to capture data from tvp514x or
549  * tvp7002.
550  */
setup_vpif_input_path(int channel,const char * sub_dev_name)551 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
552 {
553 	int err = 0;
554 	int val;
555 
556 	/* for channel 1, we don't do anything */
557 	if (channel != 0)
558 		return 0;
559 
560 	if (!cpld_client)
561 		return -ENXIO;
562 
563 	val = i2c_smbus_read_byte(cpld_client);
564 	if (val < 0)
565 		return val;
566 
567 	if (!strcmp(sub_dev_name, TVP5147_CH0) ||
568 	    !strcmp(sub_dev_name, TVP5147_CH1))
569 		val &= TVP5147_INPUT;
570 	else
571 		val |= TVP7002_INPUT;
572 
573 	err = i2c_smbus_write_byte(cpld_client, val);
574 	if (err)
575 		return err;
576 	return 0;
577 }
578 
579 /**
580  * setup_vpif_input_channel_mode()
581  * @mux_mode:  mux mode. 0 - 1 channel or (1) - 2 channel
582  *
583  * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
584  */
setup_vpif_input_channel_mode(int mux_mode)585 static int setup_vpif_input_channel_mode(int mux_mode)
586 {
587 	unsigned long flags;
588 	int err = 0;
589 	int val;
590 	u32 value;
591 
592 	if (!cpld_client)
593 		return -ENXIO;
594 
595 	val = i2c_smbus_read_byte(cpld_client);
596 	if (val < 0)
597 		return val;
598 
599 	spin_lock_irqsave(&vpif_reg_lock, flags);
600 	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
601 	if (mux_mode) {
602 		val &= VPIF_INPUT_TWO_CHANNEL;
603 		value |= VIDCH1CLK;
604 	} else {
605 		val |= VPIF_INPUT_ONE_CHANNEL;
606 		value &= ~VIDCH1CLK;
607 	}
608 	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
609 	spin_unlock_irqrestore(&vpif_reg_lock, flags);
610 
611 	err = i2c_smbus_write_byte(cpld_client, val);
612 	if (err)
613 		return err;
614 
615 	return 0;
616 }
617 
618 static struct tvp514x_platform_data tvp5146_pdata = {
619 	.clk_polarity = 0,
620 	.hs_polarity = 1,
621 	.vs_polarity = 1
622 };
623 
624 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
625 
626 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
627 	{
628 		.name	= TVP5147_CH0,
629 		.board_info = {
630 			I2C_BOARD_INFO("tvp5146", 0x5d),
631 			.platform_data = &tvp5146_pdata,
632 		},
633 	},
634 	{
635 		.name	= TVP5147_CH1,
636 		.board_info = {
637 			I2C_BOARD_INFO("tvp5146", 0x5c),
638 			.platform_data = &tvp5146_pdata,
639 		},
640 	},
641 };
642 
643 static const struct vpif_input dm6467_ch0_inputs[] = {
644 	{
645 		.input = {
646 			.index = 0,
647 			.name = "Composite",
648 			.type = V4L2_INPUT_TYPE_CAMERA,
649 			.capabilities = V4L2_IN_CAP_STD,
650 			.std = TVP514X_STD_ALL,
651 		},
652 		.subdev_name = TVP5147_CH0,
653 		.input_route = INPUT_CVBS_VI2B,
654 		.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
655 	},
656 };
657 
658 static const struct vpif_input dm6467_ch1_inputs[] = {
659        {
660 		.input = {
661 			.index = 0,
662 			.name = "S-Video",
663 			.type = V4L2_INPUT_TYPE_CAMERA,
664 			.capabilities = V4L2_IN_CAP_STD,
665 			.std = TVP514X_STD_ALL,
666 		},
667 		.subdev_name = TVP5147_CH1,
668 		.input_route = INPUT_SVIDEO_VI2C_VI1C,
669 		.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
670 	},
671 };
672 
673 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
674 	.setup_input_path = setup_vpif_input_path,
675 	.setup_input_channel_mode = setup_vpif_input_channel_mode,
676 	.subdev_info = vpif_capture_sdev_info,
677 	.subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
678 	.chan_config[0] = {
679 		.inputs = dm6467_ch0_inputs,
680 		.input_count = ARRAY_SIZE(dm6467_ch0_inputs),
681 		.vpif_if = {
682 			.if_type = VPIF_IF_BT656,
683 			.hd_pol = 1,
684 			.vd_pol = 1,
685 			.fid_pol = 0,
686 		},
687 	},
688 	.chan_config[1] = {
689 		.inputs = dm6467_ch1_inputs,
690 		.input_count = ARRAY_SIZE(dm6467_ch1_inputs),
691 		.vpif_if = {
692 			.if_type = VPIF_IF_BT656,
693 			.hd_pol = 1,
694 			.vd_pol = 1,
695 			.fid_pol = 0,
696 		},
697 	},
698 };
699 
evm_init_video(void)700 static void __init evm_init_video(void)
701 {
702 	spin_lock_init(&vpif_reg_lock);
703 
704 	dm646x_setup_vpif(&dm646x_vpif_display_config,
705 			  &dm646x_vpif_capture_cfg);
706 }
707 
evm_init_i2c(void)708 static void __init evm_init_i2c(void)
709 {
710 	davinci_init_i2c(&i2c_pdata);
711 	i2c_add_driver(&dm6467evm_cpld_driver);
712 	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
713 	evm_init_cpld();
714 	evm_init_video();
715 }
716 #endif
717 
718 #define DM6467T_EVM_REF_FREQ		33000000
719 
davinci_map_io(void)720 static void __init davinci_map_io(void)
721 {
722 	dm646x_init();
723 
724 	if (machine_is_davinci_dm6467tevm())
725 		davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
726 }
727 
728 #define DM646X_EVM_PHY_ID		"davinci_mdio-0:01"
729 /*
730  * The following EDMA channels/slots are not being used by drivers (for
731  * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
732  * reserved for codecs on the DSP side.
733  */
734 static const s16 dm646x_dma_rsv_chans[][2] = {
735 	/* (offset, number) */
736 	{ 0,  4},
737 	{13,  3},
738 	{24,  4},
739 	{30,  2},
740 	{54,  3},
741 	{-1, -1}
742 };
743 
744 static const s16 dm646x_dma_rsv_slots[][2] = {
745 	/* (offset, number) */
746 	{ 0,  4},
747 	{13,  3},
748 	{24,  4},
749 	{30,  2},
750 	{54,  3},
751 	{128, 384},
752 	{-1, -1}
753 };
754 
755 static struct edma_rsv_info dm646x_edma_rsv[] = {
756 	{
757 		.rsv_chans	= dm646x_dma_rsv_chans,
758 		.rsv_slots	= dm646x_dma_rsv_slots,
759 	},
760 };
761 
evm_init(void)762 static __init void evm_init(void)
763 {
764 	int ret;
765 	struct davinci_soc_info *soc_info = &davinci_soc_info;
766 
767 	ret = dm646x_gpio_register();
768 	if (ret)
769 		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
770 
771 #ifdef CONFIG_I2C
772 	evm_init_i2c();
773 #endif
774 
775 	davinci_serial_init(dm646x_serial_device);
776 	dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
777 	dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
778 
779 	if (machine_is_davinci_dm6467tevm())
780 		davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
781 
782 	platform_device_register(&davinci_nand_device);
783 
784 	if (davinci_aemif_setup(&davinci_nand_device))
785 		pr_warn("%s: Cannot configure AEMIF.\n", __func__);
786 
787 	dm646x_init_edma(dm646x_edma_rsv);
788 
789 	if (HAS_ATA)
790 		davinci_init_ide();
791 
792 	soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
793 }
794 
795 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
796 	.atag_offset  = 0x100,
797 	.map_io       = davinci_map_io,
798 	.init_irq     = davinci_irq_init,
799 	.init_time	= davinci_timer_init,
800 	.init_machine = evm_init,
801 	.init_late	= davinci_init_late,
802 	.dma_zone_size	= SZ_128M,
803 	.restart	= davinci_restart,
804 MACHINE_END
805 
806 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
807 	.atag_offset  = 0x100,
808 	.map_io       = davinci_map_io,
809 	.init_irq     = davinci_irq_init,
810 	.init_time	= davinci_timer_init,
811 	.init_machine = evm_init,
812 	.init_late	= davinci_init_late,
813 	.dma_zone_size	= SZ_128M,
814 	.restart	= davinci_restart,
815 MACHINE_END
816 
817