1 /*
2 * linux/arch/arm/mach-integrator/integrator_ap.c
3 *
4 * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/syscore_ops.h>
23 #include <linux/amba/bus.h>
24 #include <linux/io.h>
25 #include <linux/irqchip.h>
26 #include <linux/of_irq.h>
27 #include <linux/of_address.h>
28 #include <linux/of_platform.h>
29 #include <linux/termios.h>
30
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
33
34 #include "hardware.h"
35 #include "cm.h"
36 #include "common.h"
37 #include "pci_v3.h"
38 #include "lm.h"
39
40 /* Base address to the AP system controller */
41 void __iomem *ap_syscon_base;
42 /* Base address to the external bus interface */
43 static void __iomem *ebi_base;
44
45
46 /*
47 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
48 * is the (PA >> 12).
49 *
50 * Setup a VA for the Integrator interrupt controller (for header #0,
51 * just for now).
52 */
53 #define VA_IC_BASE __io_address(INTEGRATOR_IC_BASE)
54
55 /*
56 * Logical Physical
57 * f1400000 14000000 Interrupt controller
58 * f1600000 16000000 UART 0
59 */
60
61 static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
62 {
63 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
64 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE
67 }, {
68 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
69 .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
70 .length = SZ_4K,
71 .type = MT_DEVICE
72 }
73 };
74
ap_map_io(void)75 static void __init ap_map_io(void)
76 {
77 iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
78 pci_v3_early_init();
79 }
80
81 #ifdef CONFIG_PM
82 static unsigned long ic_irq_enable;
83
irq_suspend(void)84 static int irq_suspend(void)
85 {
86 ic_irq_enable = readl(VA_IC_BASE + IRQ_ENABLE);
87 return 0;
88 }
89
irq_resume(void)90 static void irq_resume(void)
91 {
92 /* disable all irq sources */
93 cm_clear_irqs();
94 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
95 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
96
97 writel(ic_irq_enable, VA_IC_BASE + IRQ_ENABLE_SET);
98 }
99 #else
100 #define irq_suspend NULL
101 #define irq_resume NULL
102 #endif
103
104 static struct syscore_ops irq_syscore_ops = {
105 .suspend = irq_suspend,
106 .resume = irq_resume,
107 };
108
irq_syscore_init(void)109 static int __init irq_syscore_init(void)
110 {
111 register_syscore_ops(&irq_syscore_ops);
112
113 return 0;
114 }
115
116 device_initcall(irq_syscore_init);
117
118 /*
119 * For the PL010 found in the Integrator/AP some of the UART control is
120 * implemented in the system controller and accessed using a callback
121 * from the driver.
122 */
integrator_uart_set_mctrl(struct amba_device * dev,void __iomem * base,unsigned int mctrl)123 static void integrator_uart_set_mctrl(struct amba_device *dev,
124 void __iomem *base, unsigned int mctrl)
125 {
126 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
127 u32 phybase = dev->res.start;
128
129 if (phybase == INTEGRATOR_UART0_BASE) {
130 /* UART0 */
131 rts_mask = 1 << 4;
132 dtr_mask = 1 << 5;
133 } else {
134 /* UART1 */
135 rts_mask = 1 << 6;
136 dtr_mask = 1 << 7;
137 }
138
139 if (mctrl & TIOCM_RTS)
140 ctrlc |= rts_mask;
141 else
142 ctrls |= rts_mask;
143
144 if (mctrl & TIOCM_DTR)
145 ctrlc |= dtr_mask;
146 else
147 ctrls |= dtr_mask;
148
149 __raw_writel(ctrls, ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);
150 __raw_writel(ctrlc, ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
151 }
152
153 struct amba_pl010_data ap_uart_data = {
154 .set_mctrl = integrator_uart_set_mctrl,
155 };
156
ap_init_early(void)157 void __init ap_init_early(void)
158 {
159 }
160
ap_init_irq_of(void)161 static void __init ap_init_irq_of(void)
162 {
163 cm_init();
164 irqchip_init();
165 }
166
167 /* For the Device Tree, add in the UART callbacks as AUXDATA */
168 static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
169 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
170 "uart0", &ap_uart_data),
171 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
172 "uart1", &ap_uart_data),
173 { /* sentinel */ },
174 };
175
176 static const struct of_device_id ap_syscon_match[] = {
177 { .compatible = "arm,integrator-ap-syscon"},
178 { },
179 };
180
181 static const struct of_device_id ebi_match[] = {
182 { .compatible = "arm,external-bus-interface"},
183 { },
184 };
185
ap_init_of(void)186 static void __init ap_init_of(void)
187 {
188 unsigned long sc_dec;
189 struct device_node *syscon;
190 struct device_node *ebi;
191 int i;
192
193 syscon = of_find_matching_node(NULL, ap_syscon_match);
194 if (!syscon)
195 return;
196 ebi = of_find_matching_node(NULL, ebi_match);
197 if (!ebi)
198 return;
199
200 ap_syscon_base = of_iomap(syscon, 0);
201 if (!ap_syscon_base)
202 return;
203 ebi_base = of_iomap(ebi, 0);
204 if (!ebi_base)
205 return;
206
207 of_platform_default_populate(NULL, ap_auxdata_lookup, NULL);
208
209 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
210 for (i = 0; i < 4; i++) {
211 struct lm_device *lmdev;
212
213 if ((sc_dec & (16 << i)) == 0)
214 continue;
215
216 lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
217 if (!lmdev)
218 continue;
219
220 lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
221 lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
222 lmdev->resource.flags = IORESOURCE_MEM;
223 lmdev->irq = irq_of_parse_and_map(syscon, i);
224 lmdev->id = i;
225
226 lm_device_register(lmdev);
227 }
228 }
229
230 static const char * ap_dt_board_compat[] = {
231 "arm,integrator-ap",
232 NULL,
233 };
234
235 DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
236 .reserve = integrator_reserve,
237 .map_io = ap_map_io,
238 .init_early = ap_init_early,
239 .init_irq = ap_init_irq_of,
240 .init_machine = ap_init_of,
241 .dt_compat = ap_dt_board_compat,
242 MACHINE_END
243