1 /* 2 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 3 * Author: Andrzej Hajda <a.hajda@samsung.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * Device Tree binding constants for Exynos5440 clock controller. 10 */ 11 12 #ifndef _DT_BINDINGS_CLOCK_EXYNOS_5440_H 13 #define _DT_BINDINGS_CLOCK_EXYNOS_5440_H 14 15 #define CLK_XTAL 1 16 #define CLK_ARM_CLK 2 17 #define CLK_CPLLA 3 18 #define CLK_CPLLB 4 19 #define CLK_SPI_BAUD 16 20 #define CLK_PB0_250 17 21 #define CLK_PR0_250 18 22 #define CLK_PR1_250 19 23 #define CLK_B_250 20 24 #define CLK_B_125 21 25 #define CLK_B_200 22 26 #define CLK_SATA 23 27 #define CLK_USB 24 28 #define CLK_GMAC0 25 29 #define CLK_CS250 26 30 #define CLK_PB0_250_O 27 31 #define CLK_PR0_250_O 28 32 #define CLK_PR1_250_O 29 33 #define CLK_B_250_O 30 34 #define CLK_B_125_O 31 35 #define CLK_B_200_O 32 36 #define CLK_SATA_O 33 37 #define CLK_USB_O 34 38 #define CLK_GMAC0_O 35 39 #define CLK_CS250_O 36 40 41 /* must be greater than maximal clock id */ 42 #define CLK_NR_CLKS 37 43 44 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5440_H */ 45