1 /*
2 * Based on arch/arm/kernel/process.c
3 *
4 * Original Copyright (C) 1995 Linus Torvalds
5 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include <stdarg.h>
22
23 #include <linux/compat.h>
24 #include <linux/efi.h>
25 #include <linux/export.h>
26 #include <linux/sched.h>
27 #include <linux/kernel.h>
28 #include <linux/mm.h>
29 #include <linux/stddef.h>
30 #include <linux/unistd.h>
31 #include <linux/user.h>
32 #include <linux/delay.h>
33 #include <linux/reboot.h>
34 #include <linux/interrupt.h>
35 #include <linux/kallsyms.h>
36 #include <linux/init.h>
37 #include <linux/cpu.h>
38 #include <linux/elfcore.h>
39 #include <linux/pm.h>
40 #include <linux/tick.h>
41 #include <linux/utsname.h>
42 #include <linux/uaccess.h>
43 #include <linux/random.h>
44 #include <linux/hw_breakpoint.h>
45 #include <linux/personality.h>
46 #include <linux/notifier.h>
47 #include <trace/events/power.h>
48 #include <linux/percpu.h>
49
50 #include <asm/alternative.h>
51 #include <asm/compat.h>
52 #include <asm/cacheflush.h>
53 #include <asm/exec.h>
54 #include <asm/fpsimd.h>
55 #include <asm/mmu_context.h>
56 #include <asm/processor.h>
57 #include <asm/stacktrace.h>
58
59 #ifdef CONFIG_CC_STACKPROTECTOR
60 #include <linux/stackprotector.h>
61 unsigned long __stack_chk_guard __read_mostly;
62 EXPORT_SYMBOL(__stack_chk_guard);
63 #endif
64
65 /*
66 * Function pointers to optional machine specific functions
67 */
68 void (*pm_power_off)(void);
69 EXPORT_SYMBOL_GPL(pm_power_off);
70
71 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
72
73 /*
74 * This is our default idle handler.
75 */
arch_cpu_idle(void)76 void arch_cpu_idle(void)
77 {
78 /*
79 * This should do all the clock switching and wait for interrupt
80 * tricks
81 */
82 trace_cpu_idle_rcuidle(1, smp_processor_id());
83 cpu_do_idle();
84 local_irq_enable();
85 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
86 }
87
88 #ifdef CONFIG_HOTPLUG_CPU
arch_cpu_idle_dead(void)89 void arch_cpu_idle_dead(void)
90 {
91 cpu_die();
92 }
93 #endif
94
95 /*
96 * Called by kexec, immediately prior to machine_kexec().
97 *
98 * This must completely disable all secondary CPUs; simply causing those CPUs
99 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
100 * kexec'd kernel to use any and all RAM as it sees fit, without having to
101 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
102 * functionality embodied in disable_nonboot_cpus() to achieve this.
103 */
machine_shutdown(void)104 void machine_shutdown(void)
105 {
106 disable_nonboot_cpus();
107 }
108
109 /*
110 * Halting simply requires that the secondary CPUs stop performing any
111 * activity (executing tasks, handling interrupts). smp_send_stop()
112 * achieves this.
113 */
machine_halt(void)114 void machine_halt(void)
115 {
116 local_irq_disable();
117 smp_send_stop();
118 while (1);
119 }
120
121 /*
122 * Power-off simply requires that the secondary CPUs stop performing any
123 * activity (executing tasks, handling interrupts). smp_send_stop()
124 * achieves this. When the system power is turned off, it will take all CPUs
125 * with it.
126 */
machine_power_off(void)127 void machine_power_off(void)
128 {
129 local_irq_disable();
130 smp_send_stop();
131 if (pm_power_off)
132 pm_power_off();
133 }
134
135 /*
136 * Restart requires that the secondary CPUs stop performing any activity
137 * while the primary CPU resets the system. Systems with multiple CPUs must
138 * provide a HW restart implementation, to ensure that all CPUs reset at once.
139 * This is required so that any code running after reset on the primary CPU
140 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
141 * executing pre-reset code, and using RAM that the primary CPU's code wishes
142 * to use. Implementing such co-ordination would be essentially impossible.
143 */
machine_restart(char * cmd)144 void machine_restart(char *cmd)
145 {
146 /* Disable interrupts first */
147 local_irq_disable();
148 smp_send_stop();
149
150 /*
151 * UpdateCapsule() depends on the system being reset via
152 * ResetSystem().
153 */
154 if (efi_enabled(EFI_RUNTIME_SERVICES))
155 efi_reboot(reboot_mode, NULL);
156
157 /* Now call the architecture specific reboot code. */
158 if (arm_pm_restart)
159 arm_pm_restart(reboot_mode, cmd);
160 else
161 do_kernel_restart(cmd);
162
163 /*
164 * Whoops - the architecture was unable to reboot.
165 */
166 printk("Reboot failed -- System halted\n");
167 while (1);
168 }
169
170 /*
171 * dump a block of kernel memory from around the given address
172 */
show_data(unsigned long addr,int nbytes,const char * name)173 static void show_data(unsigned long addr, int nbytes, const char *name)
174 {
175 int i, j;
176 int nlines;
177 u32 *p;
178
179 /*
180 * don't attempt to dump non-kernel addresses or
181 * values that are probably just small negative numbers
182 */
183 if (addr < PAGE_OFFSET || addr > -256UL)
184 return;
185
186 printk("\n%s: %#lx:\n", name, addr);
187
188 /*
189 * round address down to a 32 bit boundary
190 * and always dump a multiple of 32 bytes
191 */
192 p = (u32 *)(addr & ~(sizeof(u32) - 1));
193 nbytes += (addr & (sizeof(u32) - 1));
194 nlines = (nbytes + 31) / 32;
195
196
197 for (i = 0; i < nlines; i++) {
198 /*
199 * just display low 16 bits of address to keep
200 * each line of the dump < 80 characters
201 */
202 printk("%04lx ", (unsigned long)p & 0xffff);
203 for (j = 0; j < 8; j++) {
204 u32 data;
205 if (probe_kernel_address(p, data)) {
206 pr_cont(" ********");
207 } else {
208 pr_cont(" %08x", data);
209 }
210 ++p;
211 }
212 pr_cont("\n");
213 }
214 }
215
show_extra_register_data(struct pt_regs * regs,int nbytes)216 static void show_extra_register_data(struct pt_regs *regs, int nbytes)
217 {
218 mm_segment_t fs;
219 unsigned int i;
220
221 fs = get_fs();
222 set_fs(KERNEL_DS);
223 show_data(regs->pc - nbytes, nbytes * 2, "PC");
224 show_data(regs->regs[30] - nbytes, nbytes * 2, "LR");
225 show_data(regs->sp - nbytes, nbytes * 2, "SP");
226 for (i = 0; i < 30; i++) {
227 char name[4];
228 snprintf(name, sizeof(name), "X%u", i);
229 show_data(regs->regs[i] - nbytes, nbytes * 2, name);
230 }
231 set_fs(fs);
232 }
233
__show_regs(struct pt_regs * regs)234 void __show_regs(struct pt_regs *regs)
235 {
236 int i, top_reg;
237 u64 lr, sp;
238
239 if (compat_user_mode(regs)) {
240 lr = regs->compat_lr;
241 sp = regs->compat_sp;
242 top_reg = 12;
243 } else {
244 lr = regs->regs[30];
245 sp = regs->sp;
246 top_reg = 29;
247 }
248
249 show_regs_print_info(KERN_DEFAULT);
250 print_symbol("PC is at %s\n", instruction_pointer(regs));
251 print_symbol("LR is at %s\n", lr);
252 printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
253 regs->pc, lr, regs->pstate);
254 printk("sp : %016llx\n", sp);
255
256 i = top_reg;
257
258 while (i >= 0) {
259 printk("x%-2d: %016llx ", i, regs->regs[i]);
260 i--;
261
262 if (i % 2 == 0) {
263 pr_cont("x%-2d: %016llx ", i, regs->regs[i]);
264 i--;
265 }
266
267 pr_cont("\n");
268 }
269 if (!user_mode(regs))
270 show_extra_register_data(regs, 128);
271 printk("\n");
272 }
273
show_regs(struct pt_regs * regs)274 void show_regs(struct pt_regs * regs)
275 {
276 printk("\n");
277 __show_regs(regs);
278 }
279
tls_thread_flush(void)280 static void tls_thread_flush(void)
281 {
282 write_sysreg(0, tpidr_el0);
283
284 if (is_compat_task()) {
285 current->thread.tp_value = 0;
286
287 /*
288 * We need to ensure ordering between the shadow state and the
289 * hardware state, so that we don't corrupt the hardware state
290 * with a stale shadow state during context switch.
291 */
292 barrier();
293 write_sysreg(0, tpidrro_el0);
294 }
295 }
296
flush_thread(void)297 void flush_thread(void)
298 {
299 fpsimd_flush_thread();
300 tls_thread_flush();
301 flush_ptrace_hw_breakpoint(current);
302 }
303
release_thread(struct task_struct * dead_task)304 void release_thread(struct task_struct *dead_task)
305 {
306 }
307
arch_dup_task_struct(struct task_struct * dst,struct task_struct * src)308 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
309 {
310 if (current->mm)
311 fpsimd_preserve_current_state();
312 *dst = *src;
313 return 0;
314 }
315
316 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
317
copy_thread(unsigned long clone_flags,unsigned long stack_start,unsigned long stk_sz,struct task_struct * p)318 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
319 unsigned long stk_sz, struct task_struct *p)
320 {
321 struct pt_regs *childregs = task_pt_regs(p);
322
323 memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
324
325 /*
326 * In case p was allocated the same task_struct pointer as some
327 * other recently-exited task, make sure p is disassociated from
328 * any cpu that may have run that now-exited task recently.
329 * Otherwise we could erroneously skip reloading the FPSIMD
330 * registers for p.
331 */
332 fpsimd_flush_task_state(p);
333
334 if (likely(!(p->flags & PF_KTHREAD))) {
335 *childregs = *current_pt_regs();
336 childregs->regs[0] = 0;
337
338 /*
339 * Read the current TLS pointer from tpidr_el0 as it may be
340 * out-of-sync with the saved value.
341 */
342 *task_user_tls(p) = read_sysreg(tpidr_el0);
343
344 if (stack_start) {
345 if (is_compat_thread(task_thread_info(p)))
346 childregs->compat_sp = stack_start;
347 else
348 childregs->sp = stack_start;
349 }
350
351 /*
352 * If a TLS pointer was passed to clone (4th argument), use it
353 * for the new thread.
354 */
355 if (clone_flags & CLONE_SETTLS)
356 p->thread.tp_value = childregs->regs[3];
357 } else {
358 memset(childregs, 0, sizeof(struct pt_regs));
359 childregs->pstate = PSR_MODE_EL1h;
360 if (IS_ENABLED(CONFIG_ARM64_UAO) &&
361 cpus_have_cap(ARM64_HAS_UAO))
362 childregs->pstate |= PSR_UAO_BIT;
363 p->thread.cpu_context.x19 = stack_start;
364 p->thread.cpu_context.x20 = stk_sz;
365 }
366 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
367 p->thread.cpu_context.sp = (unsigned long)childregs;
368
369 ptrace_hw_copy_thread(p);
370
371 return 0;
372 }
373
tls_thread_switch(struct task_struct * next)374 static void tls_thread_switch(struct task_struct *next)
375 {
376 unsigned long tpidr;
377
378 tpidr = read_sysreg(tpidr_el0);
379 *task_user_tls(current) = tpidr;
380
381 if (is_compat_thread(task_thread_info(next)))
382 write_sysreg(next->thread.tp_value, tpidrro_el0);
383 else if (!arm64_kernel_unmapped_at_el0())
384 write_sysreg(0, tpidrro_el0);
385
386 write_sysreg(*task_user_tls(next), tpidr_el0);
387 }
388
389 /* Restore the UAO state depending on next's addr_limit */
uao_thread_switch(struct task_struct * next)390 void uao_thread_switch(struct task_struct *next)
391 {
392 if (IS_ENABLED(CONFIG_ARM64_UAO)) {
393 if (task_thread_info(next)->addr_limit == KERNEL_DS)
394 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
395 else
396 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
397 }
398 }
399
400 /*
401 * We store our current task in sp_el0, which is clobbered by userspace. Keep a
402 * shadow copy so that we can restore this upon entry from userspace.
403 *
404 * This is *only* for exception entry from EL0, and is not valid until we
405 * __switch_to() a user task.
406 */
407 DEFINE_PER_CPU(struct task_struct *, __entry_task);
408
entry_task_switch(struct task_struct * next)409 static void entry_task_switch(struct task_struct *next)
410 {
411 __this_cpu_write(__entry_task, next);
412 }
413
414 /*
415 * Thread switching.
416 */
__switch_to(struct task_struct * prev,struct task_struct * next)417 struct task_struct *__switch_to(struct task_struct *prev,
418 struct task_struct *next)
419 {
420 struct task_struct *last;
421
422 fpsimd_thread_switch(next);
423 tls_thread_switch(next);
424 hw_breakpoint_thread_switch(next);
425 contextidr_thread_switch(next);
426 entry_task_switch(next);
427 uao_thread_switch(next);
428
429 /*
430 * Complete any pending TLB or cache maintenance on this CPU in case
431 * the thread migrates to a different CPU.
432 */
433 dsb(ish);
434
435 /* the actual thread switch */
436 last = cpu_switch_to(prev, next);
437
438 return last;
439 }
440
get_wchan(struct task_struct * p)441 unsigned long get_wchan(struct task_struct *p)
442 {
443 struct stackframe frame;
444 unsigned long stack_page, ret = 0;
445 int count = 0;
446 if (!p || p == current || p->state == TASK_RUNNING)
447 return 0;
448
449 stack_page = (unsigned long)try_get_task_stack(p);
450 if (!stack_page)
451 return 0;
452
453 frame.fp = thread_saved_fp(p);
454 frame.sp = thread_saved_sp(p);
455 frame.pc = thread_saved_pc(p);
456 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
457 frame.graph = p->curr_ret_stack;
458 #endif
459 do {
460 if (frame.sp < stack_page ||
461 frame.sp >= stack_page + THREAD_SIZE ||
462 unwind_frame(p, &frame))
463 goto out;
464 if (!in_sched_functions(frame.pc)) {
465 ret = frame.pc;
466 goto out;
467 }
468 } while (count ++ < 16);
469
470 out:
471 put_task_stack(p);
472 return ret;
473 }
474
arch_align_stack(unsigned long sp)475 unsigned long arch_align_stack(unsigned long sp)
476 {
477 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
478 sp -= get_random_int() & ~PAGE_MASK;
479 return sp & ~0xf;
480 }
481
arch_randomize_brk(struct mm_struct * mm)482 unsigned long arch_randomize_brk(struct mm_struct *mm)
483 {
484 if (is_compat_task())
485 return randomize_page(mm->brk, 0x02000000);
486 else
487 return randomize_page(mm->brk, 0x40000000);
488 }
489