1 /*
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
20 * should be easier.
21 *
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
29 */
30
31 #undef DEBUG
32
33 #include <linux/export.h>
34 #include <linux/threads.h>
35 #include <linux/kernel_stat.h>
36 #include <linux/signal.h>
37 #include <linux/sched.h>
38 #include <linux/ptrace.h>
39 #include <linux/ioport.h>
40 #include <linux/interrupt.h>
41 #include <linux/timex.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/delay.h>
45 #include <linux/irq.h>
46 #include <linux/seq_file.h>
47 #include <linux/cpumask.h>
48 #include <linux/profile.h>
49 #include <linux/bitops.h>
50 #include <linux/list.h>
51 #include <linux/radix-tree.h>
52 #include <linux/mutex.h>
53 #include <linux/pci.h>
54 #include <linux/debugfs.h>
55 #include <linux/of.h>
56 #include <linux/of_irq.h>
57
58 #include <asm/uaccess.h>
59 #include <asm/io.h>
60 #include <asm/pgtable.h>
61 #include <asm/irq.h>
62 #include <asm/cache.h>
63 #include <asm/prom.h>
64 #include <asm/ptrace.h>
65 #include <asm/machdep.h>
66 #include <asm/udbg.h>
67 #include <asm/smp.h>
68 #include <asm/debug.h>
69 #include <asm/livepatch.h>
70 #include <asm/asm-prototypes.h>
71
72 #ifdef CONFIG_PPC64
73 #include <asm/paca.h>
74 #include <asm/firmware.h>
75 #include <asm/lv1call.h>
76 #endif
77 #define CREATE_TRACE_POINTS
78 #include <asm/trace.h>
79 #include <asm/cpu_has_feature.h>
80
81 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
82 EXPORT_PER_CPU_SYMBOL(irq_stat);
83
84 int __irq_offset_value;
85
86 #ifdef CONFIG_PPC32
87 EXPORT_SYMBOL(__irq_offset_value);
88 atomic_t ppc_n_lost_interrupts;
89
90 #ifdef CONFIG_TAU_INT
91 extern int tau_initialized;
92 extern int tau_interrupts(int);
93 #endif
94 #endif /* CONFIG_PPC32 */
95
96 #ifdef CONFIG_PPC64
97
98 int distribute_irqs = 1;
99
get_irq_happened(void)100 static inline notrace unsigned long get_irq_happened(void)
101 {
102 unsigned long happened;
103
104 __asm__ __volatile__("lbz %0,%1(13)"
105 : "=r" (happened) : "i" (offsetof(struct paca_struct, irq_happened)));
106
107 return happened;
108 }
109
set_soft_enabled(unsigned long enable)110 static inline notrace void set_soft_enabled(unsigned long enable)
111 {
112 __asm__ __volatile__("stb %0,%1(13)"
113 : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
114 }
115
decrementer_check_overflow(void)116 static inline notrace int decrementer_check_overflow(void)
117 {
118 u64 now = get_tb_or_rtc();
119 u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
120
121 return now >= *next_tb;
122 }
123
124 /* This is called whenever we are re-enabling interrupts
125 * and returns either 0 (nothing to do) or 500/900/280/a00/e80 if
126 * there's an EE, DEC or DBELL to generate.
127 *
128 * This is called in two contexts: From arch_local_irq_restore()
129 * before soft-enabling interrupts, and from the exception exit
130 * path when returning from an interrupt from a soft-disabled to
131 * a soft enabled context. In both case we have interrupts hard
132 * disabled.
133 *
134 * We take care of only clearing the bits we handled in the
135 * PACA irq_happened field since we can only re-emit one at a
136 * time and we don't want to "lose" one.
137 */
__check_irq_replay(void)138 notrace unsigned int __check_irq_replay(void)
139 {
140 /*
141 * We use local_paca rather than get_paca() to avoid all
142 * the debug_smp_processor_id() business in this low level
143 * function
144 */
145 unsigned char happened = local_paca->irq_happened;
146
147 /* Clear bit 0 which we wouldn't clear otherwise */
148 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
149 if (happened & PACA_IRQ_HARD_DIS) {
150 /*
151 * We may have missed a decrementer interrupt if hard disabled.
152 * Check the decrementer register in case we had a rollover
153 * while hard disabled.
154 */
155 if (!(happened & PACA_IRQ_DEC)) {
156 if (decrementer_check_overflow()) {
157 local_paca->irq_happened |= PACA_IRQ_DEC;
158 happened |= PACA_IRQ_DEC;
159 }
160 }
161 }
162
163 /*
164 * Force the delivery of pending soft-disabled interrupts on PS3.
165 * Any HV call will have this side effect.
166 */
167 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
168 u64 tmp, tmp2;
169 lv1_get_version_info(&tmp, &tmp2);
170 }
171
172 /*
173 * Check if an hypervisor Maintenance interrupt happened.
174 * This is a higher priority interrupt than the others, so
175 * replay it first.
176 */
177 local_paca->irq_happened &= ~PACA_IRQ_HMI;
178 if (happened & PACA_IRQ_HMI)
179 return 0xe60;
180
181 /*
182 * We may have missed a decrementer interrupt. We check the
183 * decrementer itself rather than the paca irq_happened field
184 * in case we also had a rollover while hard disabled
185 */
186 local_paca->irq_happened &= ~PACA_IRQ_DEC;
187 if (happened & PACA_IRQ_DEC)
188 return 0x900;
189
190 /* Finally check if an external interrupt happened */
191 local_paca->irq_happened &= ~PACA_IRQ_EE;
192 if (happened & PACA_IRQ_EE)
193 return 0x500;
194
195 #ifdef CONFIG_PPC_BOOK3E
196 /* Finally check if an EPR external interrupt happened
197 * this bit is typically set if we need to handle another
198 * "edge" interrupt from within the MPIC "EPR" handler
199 */
200 local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE;
201 if (happened & PACA_IRQ_EE_EDGE)
202 return 0x500;
203
204 local_paca->irq_happened &= ~PACA_IRQ_DBELL;
205 if (happened & PACA_IRQ_DBELL)
206 return 0x280;
207 #else
208 local_paca->irq_happened &= ~PACA_IRQ_DBELL;
209 if (happened & PACA_IRQ_DBELL) {
210 if (cpu_has_feature(CPU_FTR_HVMODE))
211 return 0xe80;
212 return 0xa00;
213 }
214 #endif /* CONFIG_PPC_BOOK3E */
215
216 /* There should be nothing left ! */
217 BUG_ON(local_paca->irq_happened != 0);
218
219 return 0;
220 }
221
arch_local_irq_restore(unsigned long en)222 notrace void arch_local_irq_restore(unsigned long en)
223 {
224 unsigned char irq_happened;
225 unsigned int replay;
226
227 /* Write the new soft-enabled value */
228 set_soft_enabled(en);
229 if (!en)
230 return;
231 /*
232 * From this point onward, we can take interrupts, preempt,
233 * etc... unless we got hard-disabled. We check if an event
234 * happened. If none happened, we know we can just return.
235 *
236 * We may have preempted before the check below, in which case
237 * we are checking the "new" CPU instead of the old one. This
238 * is only a problem if an event happened on the "old" CPU.
239 *
240 * External interrupt events will have caused interrupts to
241 * be hard-disabled, so there is no problem, we
242 * cannot have preempted.
243 */
244 irq_happened = get_irq_happened();
245 if (!irq_happened)
246 return;
247
248 /*
249 * We need to hard disable to get a trusted value from
250 * __check_irq_replay(). We also need to soft-disable
251 * again to avoid warnings in there due to the use of
252 * per-cpu variables.
253 *
254 * We know that if the value in irq_happened is exactly 0x01
255 * then we are already hard disabled (there are other less
256 * common cases that we'll ignore for now), so we skip the
257 * (expensive) mtmsrd.
258 */
259 if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
260 __hard_irq_disable();
261 #ifdef CONFIG_TRACE_IRQFLAGS
262 else {
263 /*
264 * We should already be hard disabled here. We had bugs
265 * where that wasn't the case so let's dbl check it and
266 * warn if we are wrong. Only do that when IRQ tracing
267 * is enabled as mfmsr() can be costly.
268 */
269 if (WARN_ON(mfmsr() & MSR_EE))
270 __hard_irq_disable();
271 }
272 #endif /* CONFIG_TRACE_IRQFLAGS */
273
274 set_soft_enabled(0);
275
276 /*
277 * Check if anything needs to be re-emitted. We haven't
278 * soft-enabled yet to avoid warnings in decrementer_check_overflow
279 * accessing per-cpu variables
280 */
281 replay = __check_irq_replay();
282
283 /* We can soft-enable now */
284 set_soft_enabled(1);
285
286 /*
287 * And replay if we have to. This will return with interrupts
288 * hard-enabled.
289 */
290 if (replay) {
291 __replay_interrupt(replay);
292 return;
293 }
294
295 /* Finally, let's ensure we are hard enabled */
296 __hard_irq_enable();
297 }
298 EXPORT_SYMBOL(arch_local_irq_restore);
299
300 /*
301 * This is specifically called by assembly code to re-enable interrupts
302 * if they are currently disabled. This is typically called before
303 * schedule() or do_signal() when returning to userspace. We do it
304 * in C to avoid the burden of dealing with lockdep etc...
305 *
306 * NOTE: This is called with interrupts hard disabled but not marked
307 * as such in paca->irq_happened, so we need to resync this.
308 */
restore_interrupts(void)309 void notrace restore_interrupts(void)
310 {
311 if (irqs_disabled()) {
312 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
313 local_irq_enable();
314 } else
315 __hard_irq_enable();
316 }
317
318 /*
319 * This is a helper to use when about to go into idle low-power
320 * when the latter has the side effect of re-enabling interrupts
321 * (such as calling H_CEDE under pHyp).
322 *
323 * You call this function with interrupts soft-disabled (this is
324 * already the case when ppc_md.power_save is called). The function
325 * will return whether to enter power save or just return.
326 *
327 * In the former case, it will have notified lockdep of interrupts
328 * being re-enabled and generally sanitized the lazy irq state,
329 * and in the latter case it will leave with interrupts hard
330 * disabled and marked as such, so the local_irq_enable() call
331 * in arch_cpu_idle() will properly re-enable everything.
332 */
prep_irq_for_idle(void)333 bool prep_irq_for_idle(void)
334 {
335 /*
336 * First we need to hard disable to ensure no interrupt
337 * occurs before we effectively enter the low power state
338 */
339 hard_irq_disable();
340
341 /*
342 * If anything happened while we were soft-disabled,
343 * we return now and do not enter the low power state.
344 */
345 if (lazy_irq_pending())
346 return false;
347
348 /* Tell lockdep we are about to re-enable */
349 trace_hardirqs_on();
350
351 /*
352 * Mark interrupts as soft-enabled and clear the
353 * PACA_IRQ_HARD_DIS from the pending mask since we
354 * are about to hard enable as well as a side effect
355 * of entering the low power state.
356 */
357 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
358 local_paca->soft_enabled = 1;
359
360 /* Tell the caller to enter the low power state */
361 return true;
362 }
363
364 /*
365 * Force a replay of the external interrupt handler on this CPU.
366 */
force_external_irq_replay(void)367 void force_external_irq_replay(void)
368 {
369 /*
370 * This must only be called with interrupts soft-disabled,
371 * the replay will happen when re-enabling.
372 */
373 WARN_ON(!arch_irqs_disabled());
374
375 /*
376 * Interrupts must always be hard disabled before irq_happened is
377 * modified (to prevent lost update in case of interrupt between
378 * load and store).
379 */
380 __hard_irq_disable();
381 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
382
383 /* Indicate in the PACA that we have an interrupt to replay */
384 local_paca->irq_happened |= PACA_IRQ_EE;
385 }
386
387 #endif /* CONFIG_PPC64 */
388
arch_show_interrupts(struct seq_file * p,int prec)389 int arch_show_interrupts(struct seq_file *p, int prec)
390 {
391 int j;
392
393 #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
394 if (tau_initialized) {
395 seq_printf(p, "%*s: ", prec, "TAU");
396 for_each_online_cpu(j)
397 seq_printf(p, "%10u ", tau_interrupts(j));
398 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
399 }
400 #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
401
402 seq_printf(p, "%*s: ", prec, "LOC");
403 for_each_online_cpu(j)
404 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_event);
405 seq_printf(p, " Local timer interrupts for timer event device\n");
406
407 seq_printf(p, "%*s: ", prec, "LOC");
408 for_each_online_cpu(j)
409 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_others);
410 seq_printf(p, " Local timer interrupts for others\n");
411
412 seq_printf(p, "%*s: ", prec, "SPU");
413 for_each_online_cpu(j)
414 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
415 seq_printf(p, " Spurious interrupts\n");
416
417 seq_printf(p, "%*s: ", prec, "PMI");
418 for_each_online_cpu(j)
419 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
420 seq_printf(p, " Performance monitoring interrupts\n");
421
422 seq_printf(p, "%*s: ", prec, "MCE");
423 for_each_online_cpu(j)
424 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
425 seq_printf(p, " Machine check exceptions\n");
426
427 if (cpu_has_feature(CPU_FTR_HVMODE)) {
428 seq_printf(p, "%*s: ", prec, "HMI");
429 for_each_online_cpu(j)
430 seq_printf(p, "%10u ",
431 per_cpu(irq_stat, j).hmi_exceptions);
432 seq_printf(p, " Hypervisor Maintenance Interrupts\n");
433 }
434
435 #ifdef CONFIG_PPC_DOORBELL
436 if (cpu_has_feature(CPU_FTR_DBELL)) {
437 seq_printf(p, "%*s: ", prec, "DBL");
438 for_each_online_cpu(j)
439 seq_printf(p, "%10u ", per_cpu(irq_stat, j).doorbell_irqs);
440 seq_printf(p, " Doorbell interrupts\n");
441 }
442 #endif
443
444 return 0;
445 }
446
447 /*
448 * /proc/stat helpers
449 */
arch_irq_stat_cpu(unsigned int cpu)450 u64 arch_irq_stat_cpu(unsigned int cpu)
451 {
452 u64 sum = per_cpu(irq_stat, cpu).timer_irqs_event;
453
454 sum += per_cpu(irq_stat, cpu).pmu_irqs;
455 sum += per_cpu(irq_stat, cpu).mce_exceptions;
456 sum += per_cpu(irq_stat, cpu).spurious_irqs;
457 sum += per_cpu(irq_stat, cpu).timer_irqs_others;
458 sum += per_cpu(irq_stat, cpu).hmi_exceptions;
459 #ifdef CONFIG_PPC_DOORBELL
460 sum += per_cpu(irq_stat, cpu).doorbell_irqs;
461 #endif
462
463 return sum;
464 }
465
466 #ifdef CONFIG_HOTPLUG_CPU
migrate_irqs(void)467 void migrate_irqs(void)
468 {
469 struct irq_desc *desc;
470 unsigned int irq;
471 static int warned;
472 cpumask_var_t mask;
473 const struct cpumask *map = cpu_online_mask;
474
475 alloc_cpumask_var(&mask, GFP_KERNEL);
476
477 for_each_irq_desc(irq, desc) {
478 struct irq_data *data;
479 struct irq_chip *chip;
480
481 data = irq_desc_get_irq_data(desc);
482 if (irqd_is_per_cpu(data))
483 continue;
484
485 chip = irq_data_get_irq_chip(data);
486
487 cpumask_and(mask, irq_data_get_affinity_mask(data), map);
488 if (cpumask_any(mask) >= nr_cpu_ids) {
489 pr_warn("Breaking affinity for irq %i\n", irq);
490 cpumask_copy(mask, map);
491 }
492 if (chip->irq_set_affinity)
493 chip->irq_set_affinity(data, mask, true);
494 else if (desc->action && !(warned++))
495 pr_err("Cannot set affinity for irq %i\n", irq);
496 }
497
498 free_cpumask_var(mask);
499
500 local_irq_enable();
501 mdelay(1);
502 local_irq_disable();
503 }
504 #endif
505
check_stack_overflow(void)506 static inline void check_stack_overflow(void)
507 {
508 #ifdef CONFIG_DEBUG_STACKOVERFLOW
509 long sp;
510
511 sp = current_stack_pointer() & (THREAD_SIZE-1);
512
513 /* check for stack overflow: is there less than 2KB free? */
514 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
515 pr_err("do_IRQ: stack overflow: %ld\n",
516 sp - sizeof(struct thread_info));
517 dump_stack();
518 }
519 #endif
520 }
521
__do_irq(struct pt_regs * regs)522 void __do_irq(struct pt_regs *regs)
523 {
524 unsigned int irq;
525
526 irq_enter();
527
528 trace_irq_entry(regs);
529
530 check_stack_overflow();
531
532 /*
533 * Query the platform PIC for the interrupt & ack it.
534 *
535 * This will typically lower the interrupt line to the CPU
536 */
537 irq = ppc_md.get_irq();
538
539 /* We can hard enable interrupts now to allow perf interrupts */
540 may_hard_irq_enable();
541
542 /* And finally process it */
543 if (unlikely(!irq))
544 __this_cpu_inc(irq_stat.spurious_irqs);
545 else
546 generic_handle_irq(irq);
547
548 trace_irq_exit(regs);
549
550 irq_exit();
551 }
552
do_IRQ(struct pt_regs * regs)553 void do_IRQ(struct pt_regs *regs)
554 {
555 struct pt_regs *old_regs = set_irq_regs(regs);
556 struct thread_info *curtp, *irqtp, *sirqtp;
557
558 /* Switch to the irq stack to handle this */
559 curtp = current_thread_info();
560 irqtp = hardirq_ctx[raw_smp_processor_id()];
561 sirqtp = softirq_ctx[raw_smp_processor_id()];
562
563 /* Already there ? */
564 if (unlikely(curtp == irqtp || curtp == sirqtp)) {
565 __do_irq(regs);
566 set_irq_regs(old_regs);
567 return;
568 }
569
570 /* Prepare the thread_info in the irq stack */
571 irqtp->task = curtp->task;
572 irqtp->flags = 0;
573
574 /* Copy the preempt_count so that the [soft]irq checks work. */
575 irqtp->preempt_count = curtp->preempt_count;
576
577 /* Switch stack and call */
578 call_do_irq(regs, irqtp);
579
580 /* Restore stack limit */
581 irqtp->task = NULL;
582
583 /* Copy back updates to the thread_info */
584 if (irqtp->flags)
585 set_bits(irqtp->flags, &curtp->flags);
586
587 set_irq_regs(old_regs);
588 }
589
init_IRQ(void)590 void __init init_IRQ(void)
591 {
592 if (ppc_md.init_IRQ)
593 ppc_md.init_IRQ();
594
595 exc_lvl_ctx_init();
596
597 irq_ctx_init();
598 }
599
600 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
601 struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
602 struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
603 struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
604
exc_lvl_ctx_init(void)605 void exc_lvl_ctx_init(void)
606 {
607 struct thread_info *tp;
608 int i, cpu_nr;
609
610 for_each_possible_cpu(i) {
611 #ifdef CONFIG_PPC64
612 cpu_nr = i;
613 #else
614 #ifdef CONFIG_SMP
615 cpu_nr = get_hard_smp_processor_id(i);
616 #else
617 cpu_nr = 0;
618 #endif
619 #endif
620
621 memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE);
622 tp = critirq_ctx[cpu_nr];
623 tp->cpu = cpu_nr;
624 tp->preempt_count = 0;
625
626 #ifdef CONFIG_BOOKE
627 memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE);
628 tp = dbgirq_ctx[cpu_nr];
629 tp->cpu = cpu_nr;
630 tp->preempt_count = 0;
631
632 memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE);
633 tp = mcheckirq_ctx[cpu_nr];
634 tp->cpu = cpu_nr;
635 tp->preempt_count = HARDIRQ_OFFSET;
636 #endif
637 }
638 }
639 #endif
640
641 struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
642 struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
643
irq_ctx_init(void)644 void irq_ctx_init(void)
645 {
646 struct thread_info *tp;
647 int i;
648
649 for_each_possible_cpu(i) {
650 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
651 tp = softirq_ctx[i];
652 tp->cpu = i;
653 klp_init_thread_info(tp);
654
655 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
656 tp = hardirq_ctx[i];
657 tp->cpu = i;
658 klp_init_thread_info(tp);
659 }
660 }
661
do_softirq_own_stack(void)662 void do_softirq_own_stack(void)
663 {
664 struct thread_info *curtp, *irqtp;
665
666 curtp = current_thread_info();
667 irqtp = softirq_ctx[smp_processor_id()];
668 irqtp->task = curtp->task;
669 irqtp->flags = 0;
670 call_do_softirq(irqtp);
671 irqtp->task = NULL;
672
673 /* Set any flag that may have been set on the
674 * alternate stack
675 */
676 if (irqtp->flags)
677 set_bits(irqtp->flags, &curtp->flags);
678 }
679
virq_to_hw(unsigned int virq)680 irq_hw_number_t virq_to_hw(unsigned int virq)
681 {
682 struct irq_data *irq_data = irq_get_irq_data(virq);
683 return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
684 }
685 EXPORT_SYMBOL_GPL(virq_to_hw);
686
687 #ifdef CONFIG_SMP
irq_choose_cpu(const struct cpumask * mask)688 int irq_choose_cpu(const struct cpumask *mask)
689 {
690 int cpuid;
691
692 if (cpumask_equal(mask, cpu_online_mask)) {
693 static int irq_rover;
694 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
695 unsigned long flags;
696
697 /* Round-robin distribution... */
698 do_round_robin:
699 raw_spin_lock_irqsave(&irq_rover_lock, flags);
700
701 irq_rover = cpumask_next(irq_rover, cpu_online_mask);
702 if (irq_rover >= nr_cpu_ids)
703 irq_rover = cpumask_first(cpu_online_mask);
704
705 cpuid = irq_rover;
706
707 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
708 } else {
709 cpuid = cpumask_first_and(mask, cpu_online_mask);
710 if (cpuid >= nr_cpu_ids)
711 goto do_round_robin;
712 }
713
714 return get_hard_smp_processor_id(cpuid);
715 }
716 #else
irq_choose_cpu(const struct cpumask * mask)717 int irq_choose_cpu(const struct cpumask *mask)
718 {
719 return hard_smp_processor_id();
720 }
721 #endif
722
arch_early_irq_init(void)723 int arch_early_irq_init(void)
724 {
725 return 0;
726 }
727
728 #ifdef CONFIG_PPC64
setup_noirqdistrib(char * str)729 static int __init setup_noirqdistrib(char *str)
730 {
731 distribute_irqs = 0;
732 return 1;
733 }
734
735 __setup("noirqdistrib", setup_noirqdistrib);
736 #endif /* CONFIG_PPC64 */
737