1/* 2 * S390 low-level entry points. 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 6 * Hartmut Penner (hp@de.ibm.com), 7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 8 * Heiko Carstens <heiko.carstens@de.ibm.com> 9 */ 10 11#include <linux/init.h> 12#include <linux/linkage.h> 13#include <asm/processor.h> 14#include <asm/cache.h> 15#include <asm/errno.h> 16#include <asm/ptrace.h> 17#include <asm/thread_info.h> 18#include <asm/asm-offsets.h> 19#include <asm/unistd.h> 20#include <asm/page.h> 21#include <asm/sigp.h> 22#include <asm/irq.h> 23#include <asm/vx-insn.h> 24#include <asm/setup.h> 25#include <asm/nmi.h> 26#include <asm/export.h> 27 28__PT_R0 = __PT_GPRS 29__PT_R1 = __PT_GPRS + 8 30__PT_R2 = __PT_GPRS + 16 31__PT_R3 = __PT_GPRS + 24 32__PT_R4 = __PT_GPRS + 32 33__PT_R5 = __PT_GPRS + 40 34__PT_R6 = __PT_GPRS + 48 35__PT_R7 = __PT_GPRS + 56 36__PT_R8 = __PT_GPRS + 64 37__PT_R9 = __PT_GPRS + 72 38__PT_R10 = __PT_GPRS + 80 39__PT_R11 = __PT_GPRS + 88 40__PT_R12 = __PT_GPRS + 96 41__PT_R13 = __PT_GPRS + 104 42__PT_R14 = __PT_GPRS + 112 43__PT_R15 = __PT_GPRS + 120 44 45STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER 46STACK_SIZE = 1 << STACK_SHIFT 47STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE 48 49_TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 50 _TIF_UPROBE) 51_TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ 52 _TIF_SYSCALL_TRACEPOINT) 53_CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU) 54_PIF_WORK = (_PIF_PER_TRAP) 55 56#define BASED(name) name-cleanup_critical(%r13) 57 58 .macro TRACE_IRQS_ON 59#ifdef CONFIG_TRACE_IRQFLAGS 60 basr %r2,%r0 61 brasl %r14,trace_hardirqs_on_caller 62#endif 63 .endm 64 65 .macro TRACE_IRQS_OFF 66#ifdef CONFIG_TRACE_IRQFLAGS 67 basr %r2,%r0 68 brasl %r14,trace_hardirqs_off_caller 69#endif 70 .endm 71 72 .macro LOCKDEP_SYS_EXIT 73#ifdef CONFIG_LOCKDEP 74 tm __PT_PSW+1(%r11),0x01 # returning to user ? 75 jz .+10 76 brasl %r14,lockdep_sys_exit 77#endif 78 .endm 79 80 .macro CHECK_STACK stacksize,savearea 81#ifdef CONFIG_CHECK_STACK 82 tml %r15,\stacksize - CONFIG_STACK_GUARD 83 lghi %r14,\savearea 84 jz stack_overflow 85#endif 86 .endm 87 88 .macro SWITCH_ASYNC savearea,timer 89 tmhh %r8,0x0001 # interrupting from user ? 90 jnz 1f 91 lgr %r14,%r9 92 slg %r14,BASED(.Lcritical_start) 93 clg %r14,BASED(.Lcritical_length) 94 jhe 0f 95 lghi %r11,\savearea # inside critical section, do cleanup 96 brasl %r14,cleanup_critical 97 tmhh %r8,0x0001 # retest problem state after cleanup 98 jnz 1f 990: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? 100 slgr %r14,%r15 101 srag %r14,%r14,STACK_SHIFT 102 jnz 2f 103 CHECK_STACK 1<<STACK_SHIFT,\savearea 104 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 105 j 3f 1061: LAST_BREAK %r14 107 UPDATE_VTIME %r14,%r15,\timer 108 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP 1092: lg %r15,__LC_ASYNC_STACK # load async stack 1103: la %r11,STACK_FRAME_OVERHEAD(%r15) 111 .endm 112 113 .macro UPDATE_VTIME w1,w2,enter_timer 114 lg \w1,__LC_EXIT_TIMER 115 lg \w2,__LC_LAST_UPDATE_TIMER 116 slg \w1,\enter_timer 117 slg \w2,__LC_EXIT_TIMER 118 alg \w1,__LC_USER_TIMER 119 alg \w2,__LC_SYSTEM_TIMER 120 stg \w1,__LC_USER_TIMER 121 stg \w2,__LC_SYSTEM_TIMER 122 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer 123 .endm 124 125 .macro LAST_BREAK scratch 126 srag \scratch,%r10,23 127 jz .+10 128 stg %r10,__TI_last_break(%r12) 129 .endm 130 131 .macro REENABLE_IRQS 132 stg %r8,__LC_RETURN_PSW 133 ni __LC_RETURN_PSW,0xbf 134 ssm __LC_RETURN_PSW 135 .endm 136 137 .macro STCK savearea 138#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES 139 .insn s,0xb27c0000,\savearea # store clock fast 140#else 141 .insn s,0xb2050000,\savearea # store clock 142#endif 143 .endm 144 145 /* 146 * The TSTMSK macro generates a test-under-mask instruction by 147 * calculating the memory offset for the specified mask value. 148 * Mask value can be any constant. The macro shifts the mask 149 * value to calculate the memory offset for the test-under-mask 150 * instruction. 151 */ 152 .macro TSTMSK addr, mask, size=8, bytepos=0 153 .if (\bytepos < \size) && (\mask >> 8) 154 .if (\mask & 0xff) 155 .error "Mask exceeds byte boundary" 156 .endif 157 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" 158 .exitm 159 .endif 160 .ifeq \mask 161 .error "Mask must not be zero" 162 .endif 163 off = \size - \bytepos - 1 164 tm off+\addr, \mask 165 .endm 166 167 .macro BPOFF 168 .pushsection .altinstr_replacement, "ax" 169660: .long 0xb2e8c000 170 .popsection 171661: .long 0x47000000 172 .pushsection .altinstructions, "a" 173 .long 661b - . 174 .long 660b - . 175 .word 82 176 .byte 4 177 .byte 4 178 .popsection 179 .endm 180 181 .macro BPON 182 .pushsection .altinstr_replacement, "ax" 183662: .long 0xb2e8d000 184 .popsection 185663: .long 0x47000000 186 .pushsection .altinstructions, "a" 187 .long 663b - . 188 .long 662b - . 189 .word 82 190 .byte 4 191 .byte 4 192 .popsection 193 .endm 194 195 .macro BPENTER tif_ptr,tif_mask 196 .pushsection .altinstr_replacement, "ax" 197662: .word 0xc004, 0x0000, 0x0000 # 6 byte nop 198 .word 0xc004, 0x0000, 0x0000 # 6 byte nop 199 .popsection 200664: TSTMSK \tif_ptr,\tif_mask 201 jz . + 8 202 .long 0xb2e8d000 203 .pushsection .altinstructions, "a" 204 .long 664b - . 205 .long 662b - . 206 .word 82 207 .byte 12 208 .byte 12 209 .popsection 210 .endm 211 212 .macro BPEXIT tif_ptr,tif_mask 213 TSTMSK \tif_ptr,\tif_mask 214 .pushsection .altinstr_replacement, "ax" 215662: jnz . + 8 216 .long 0xb2e8d000 217 .popsection 218664: jz . + 8 219 .long 0xb2e8c000 220 .pushsection .altinstructions, "a" 221 .long 664b - . 222 .long 662b - . 223 .word 82 224 .byte 8 225 .byte 8 226 .popsection 227 .endm 228 229#ifdef CONFIG_EXPOLINE 230 231 .macro GEN_BR_THUNK name,reg,tmp 232 .section .text.\name,"axG",@progbits,\name,comdat 233 .globl \name 234 .hidden \name 235 .type \name,@function 236\name: 237 .cfi_startproc 238#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES 239 exrl 0,0f 240#else 241 larl \tmp,0f 242 ex 0,0(\tmp) 243#endif 244 j . 2450: br \reg 246 .cfi_endproc 247 .endm 248 249 GEN_BR_THUNK __s390x_indirect_jump_r1use_r9,%r9,%r1 250 GEN_BR_THUNK __s390x_indirect_jump_r1use_r14,%r14,%r1 251 GEN_BR_THUNK __s390x_indirect_jump_r11use_r14,%r14,%r11 252 253 .macro BASR_R14_R9 2540: brasl %r14,__s390x_indirect_jump_r1use_r9 255 .pushsection .s390_indirect_branches,"a",@progbits 256 .long 0b-. 257 .popsection 258 .endm 259 260 .macro BR_R1USE_R14 2610: jg __s390x_indirect_jump_r1use_r14 262 .pushsection .s390_indirect_branches,"a",@progbits 263 .long 0b-. 264 .popsection 265 .endm 266 267 .macro BR_R11USE_R14 2680: jg __s390x_indirect_jump_r11use_r14 269 .pushsection .s390_indirect_branches,"a",@progbits 270 .long 0b-. 271 .popsection 272 .endm 273 274#else /* CONFIG_EXPOLINE */ 275 276 .macro BASR_R14_R9 277 basr %r14,%r9 278 .endm 279 280 .macro BR_R1USE_R14 281 br %r14 282 .endm 283 284 .macro BR_R11USE_R14 285 br %r14 286 .endm 287 288#endif /* CONFIG_EXPOLINE */ 289 290 291 .section .kprobes.text, "ax" 292.Ldummy: 293 /* 294 * This nop exists only in order to avoid that __switch_to starts at 295 * the beginning of the kprobes text section. In that case we would 296 * have several symbols at the same address. E.g. objdump would take 297 * an arbitrary symbol name when disassembling this code. 298 * With the added nop in between the __switch_to symbol is unique 299 * again. 300 */ 301 nop 0 302 303ENTRY(__bpon) 304 .globl __bpon 305 BPON 306 BR_R1USE_R14 307 308/* 309 * Scheduler resume function, called by switch_to 310 * gpr2 = (task_struct *) prev 311 * gpr3 = (task_struct *) next 312 * Returns: 313 * gpr2 = prev 314 */ 315ENTRY(__switch_to) 316 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task 317 lgr %r1,%r2 318 aghi %r1,__TASK_thread # thread_struct of prev task 319 lg %r5,__TASK_thread_info(%r3) # get thread_info of next 320 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev 321 lgr %r1,%r3 322 aghi %r1,__TASK_thread # thread_struct of next task 323 lgr %r15,%r5 324 aghi %r15,STACK_INIT # end of kernel stack of next 325 stg %r3,__LC_CURRENT # store task struct of next 326 stg %r5,__LC_THREAD_INFO # store thread info of next 327 stg %r15,__LC_KERNEL_STACK # store end of kernel stack 328 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next 329 /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */ 330 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 331 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next 332 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task 333 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 334 jz 0f 335 .insn s,0xb2800000,__LC_LPP # set program parameter 3360: BR_R1USE_R14 337 338.L__critical_start: 339 340#if IS_ENABLED(CONFIG_KVM) 341/* 342 * sie64a calling convention: 343 * %r2 pointer to sie control block 344 * %r3 guest register save area 345 */ 346ENTRY(sie64a) 347 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers 348 lg %r12,__LC_CURRENT 349 stg %r2,__SF_EMPTY(%r15) # save control block pointer 350 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area 351 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 352 mvc __SF_EMPTY+24(8,%r15),__TI_flags(%r12) # copy thread flags 353 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? 354 jno .Lsie_load_guest_gprs 355 brasl %r14,load_fpu_regs # load guest fp/vx regs 356.Lsie_load_guest_gprs: 357 lmg %r0,%r13,0(%r3) # load guest gprs 0-13 358 lg %r14,__LC_GMAP # get gmap pointer 359 ltgr %r14,%r14 360 jz .Lsie_gmap 361 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce 362.Lsie_gmap: 363 lg %r14,__SF_EMPTY(%r15) # get control block pointer 364 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now 365 tm __SIE_PROG20+3(%r14),3 # last exit... 366 jnz .Lsie_skip 367 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 368 jo .Lsie_skip # exit if fp/vx regs changed 369 BPEXIT __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST) 370 sie 0(%r14) 371.Lsie_exit: 372 BPOFF 373 BPENTER __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST) 374.Lsie_skip: 375 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE 376 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 377.Lsie_done: 378# some program checks are suppressing. C code (e.g. do_protection_exception) 379# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There 380# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable. 381# Other instructions between sie64a and .Lsie_done should not cause program 382# interrupts. So lets use 3 nops as a landing pad for all possible rewinds. 383# See also .Lcleanup_sie 384.Lrewind_pad6: 385 nopr 7 386.Lrewind_pad4: 387 nopr 7 388.Lrewind_pad2: 389 nopr 7 390 .globl sie_exit 391sie_exit: 392 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area 393 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 394 xgr %r0,%r0 # clear guest registers to 395 xgr %r1,%r1 # prevent speculative use 396 xgr %r2,%r2 397 xgr %r3,%r3 398 xgr %r4,%r4 399 xgr %r5,%r5 400 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers 401 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code 402 BR_R1USE_R14 403.Lsie_fault: 404 lghi %r14,-EFAULT 405 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code 406 j sie_exit 407 408 EX_TABLE(.Lrewind_pad6,.Lsie_fault) 409 EX_TABLE(.Lrewind_pad4,.Lsie_fault) 410 EX_TABLE(.Lrewind_pad2,.Lsie_fault) 411 EX_TABLE(sie_exit,.Lsie_fault) 412EXPORT_SYMBOL(sie64a) 413EXPORT_SYMBOL(sie_exit) 414#endif 415 416/* 417 * SVC interrupt handler routine. System calls are synchronous events and 418 * are executed with interrupts enabled. 419 */ 420 421ENTRY(system_call) 422 stpt __LC_SYNC_ENTER_TIMER 423.Lsysc_stmg: 424 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 425 BPOFF 426 lg %r10,__LC_LAST_BREAK 427 lg %r12,__LC_THREAD_INFO 428 lghi %r14,_PIF_SYSCALL 429.Lsysc_per: 430 lg %r15,__LC_KERNEL_STACK 431 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs 432 LAST_BREAK %r13 433.Lsysc_vtime: 434 UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER 435 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP 436 stmg %r0,%r7,__PT_R0(%r11) 437 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 438 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW 439 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC 440 stg %r14,__PT_FLAGS(%r11) 441.Lsysc_do_svc: 442 # clear user controlled register to prevent speculative use 443 xgr %r0,%r0 444 lg %r10,__TI_sysc_table(%r12) # address of system call table 445 llgh %r8,__PT_INT_CODE+2(%r11) 446 slag %r8,%r8,2 # shift and test for svc 0 447 jnz .Lsysc_nr_ok 448 # svc 0: system call number in %r1 449 llgfr %r1,%r1 # clear high word in r1 450 cghi %r1,NR_syscalls 451 jnl .Lsysc_nr_ok 452 sth %r1,__PT_INT_CODE+2(%r11) 453 slag %r8,%r1,2 454.Lsysc_nr_ok: 455 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 456 stg %r2,__PT_ORIG_GPR2(%r11) 457 stg %r7,STACK_FRAME_OVERHEAD(%r15) 458 lgf %r9,0(%r8,%r10) # get system call add. 459 TSTMSK __TI_flags(%r12),_TIF_TRACE 460 jnz .Lsysc_tracesys 461 BASR_R14_R9 # call sys_xxxx 462 stg %r2,__PT_R2(%r11) # store return value 463 464.Lsysc_return: 465 LOCKDEP_SYS_EXIT 466.Lsysc_tif: 467 TSTMSK __PT_FLAGS(%r11),_PIF_WORK 468 jnz .Lsysc_work 469 TSTMSK __TI_flags(%r12),_TIF_WORK 470 jnz .Lsysc_work # check for work 471 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 472 jnz .Lsysc_work 473 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP 474.Lsysc_restore: 475 lg %r14,__LC_VDSO_PER_CPU 476 lmg %r0,%r10,__PT_R0(%r11) 477 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 478.Lsysc_exit_timer: 479 stpt __LC_EXIT_TIMER 480 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 481 lmg %r11,%r15,__PT_R11(%r11) 482 lpswe __LC_RETURN_PSW 483.Lsysc_done: 484 485# 486# One of the work bits is on. Find out which one. 487# 488.Lsysc_work: 489 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 490 jo .Lsysc_mcck_pending 491 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 492 jo .Lsysc_reschedule 493#ifdef CONFIG_UPROBES 494 TSTMSK __TI_flags(%r12),_TIF_UPROBE 495 jo .Lsysc_uprobe_notify 496#endif 497 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP 498 jo .Lsysc_singlestep 499 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 500 jo .Lsysc_sigpending 501 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 502 jo .Lsysc_notify_resume 503 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 504 jo .Lsysc_vxrs 505 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE 506 jo .Lsysc_uaccess 507 j .Lsysc_return # beware of critical section cleanup 508 509# 510# _TIF_NEED_RESCHED is set, call schedule 511# 512.Lsysc_reschedule: 513 larl %r14,.Lsysc_return 514 jg schedule 515 516# 517# _CIF_MCCK_PENDING is set, call handler 518# 519.Lsysc_mcck_pending: 520 larl %r14,.Lsysc_return 521 jg s390_handle_mcck # TIF bit will be cleared by handler 522 523# 524# _CIF_ASCE is set, load user space asce 525# 526.Lsysc_uaccess: 527 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE 528 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 529 j .Lsysc_return 530 531# 532# CIF_FPU is set, restore floating-point controls and floating-point registers. 533# 534.Lsysc_vxrs: 535 larl %r14,.Lsysc_return 536 jg load_fpu_regs 537 538# 539# _TIF_SIGPENDING is set, call do_signal 540# 541.Lsysc_sigpending: 542 lgr %r2,%r11 # pass pointer to pt_regs 543 brasl %r14,do_signal 544 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 545 jno .Lsysc_return 546 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments 547 lg %r10,__TI_sysc_table(%r12) # address of system call table 548 lghi %r8,0 # svc 0 returns -ENOSYS 549 llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number 550 cghi %r1,NR_syscalls 551 jnl .Lsysc_nr_ok # invalid svc number -> do svc 0 552 slag %r8,%r1,2 553 j .Lsysc_nr_ok # restart svc 554 555# 556# _TIF_NOTIFY_RESUME is set, call do_notify_resume 557# 558.Lsysc_notify_resume: 559 lgr %r2,%r11 # pass pointer to pt_regs 560 larl %r14,.Lsysc_return 561 jg do_notify_resume 562 563# 564# _TIF_UPROBE is set, call uprobe_notify_resume 565# 566#ifdef CONFIG_UPROBES 567.Lsysc_uprobe_notify: 568 lgr %r2,%r11 # pass pointer to pt_regs 569 larl %r14,.Lsysc_return 570 jg uprobe_notify_resume 571#endif 572 573# 574# _PIF_PER_TRAP is set, call do_per_trap 575# 576.Lsysc_singlestep: 577 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP 578 lgr %r2,%r11 # pass pointer to pt_regs 579 larl %r14,.Lsysc_return 580 jg do_per_trap 581 582# 583# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before 584# and after the system call 585# 586.Lsysc_tracesys: 587 lgr %r2,%r11 # pass pointer to pt_regs 588 la %r3,0 589 llgh %r0,__PT_INT_CODE+2(%r11) 590 stg %r0,__PT_R2(%r11) 591 brasl %r14,do_syscall_trace_enter 592 lghi %r0,NR_syscalls 593 clgr %r0,%r2 594 jnh .Lsysc_tracenogo 595 sllg %r8,%r2,2 596 lgf %r9,0(%r8,%r10) 597.Lsysc_tracego: 598 lmg %r3,%r7,__PT_R3(%r11) 599 stg %r7,STACK_FRAME_OVERHEAD(%r15) 600 lg %r2,__PT_ORIG_GPR2(%r11) 601 BASR_R14_R9 # call sys_xxx 602 stg %r2,__PT_R2(%r11) # store return value 603.Lsysc_tracenogo: 604 TSTMSK __TI_flags(%r12),_TIF_TRACE 605 jz .Lsysc_return 606 lgr %r2,%r11 # pass pointer to pt_regs 607 larl %r14,.Lsysc_return 608 jg do_syscall_trace_exit 609 610# 611# a new process exits the kernel with ret_from_fork 612# 613ENTRY(ret_from_fork) 614 la %r11,STACK_FRAME_OVERHEAD(%r15) 615 lg %r12,__LC_THREAD_INFO 616 brasl %r14,schedule_tail 617 TRACE_IRQS_ON 618 ssm __LC_SVC_NEW_PSW # reenable interrupts 619 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? 620 jne .Lsysc_tracenogo 621 # it's a kernel thread 622 lmg %r9,%r10,__PT_R9(%r11) # load gprs 623ENTRY(kernel_thread_starter) 624 la %r2,0(%r10) 625 BASR_R14_R9 626 j .Lsysc_tracenogo 627 628/* 629 * Program check handler routine 630 */ 631 632ENTRY(pgm_check_handler) 633 stpt __LC_SYNC_ENTER_TIMER 634 BPOFF 635 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 636 lg %r10,__LC_LAST_BREAK 637 lg %r12,__LC_THREAD_INFO 638 larl %r13,cleanup_critical 639 lmg %r8,%r9,__LC_PGM_OLD_PSW 640 tmhh %r8,0x0001 # test problem state bit 641 jnz 2f # -> fault in user space 642#if IS_ENABLED(CONFIG_KVM) 643 # cleanup critical section for sie64a 644 lgr %r14,%r9 645 slg %r14,BASED(.Lsie_critical_start) 646 clg %r14,BASED(.Lsie_critical_length) 647 jhe 0f 648 brasl %r14,.Lcleanup_sie 649#endif 6500: tmhh %r8,0x4000 # PER bit set in old PSW ? 651 jnz 1f # -> enabled, can't be a double fault 652 tm __LC_PGM_ILC+3,0x80 # check for per exception 653 jnz .Lpgm_svcper # -> single stepped svc 6541: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC 655 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 656 j 3f 6572: LAST_BREAK %r14 658 UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER 659 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP 660 lg %r15,__LC_KERNEL_STACK 661 lg %r14,__TI_task(%r12) 662 aghi %r14,__TASK_thread # pointer to thread_struct 663 lghi %r13,__LC_PGM_TDB 664 tm __LC_PGM_ILC+2,0x02 # check for transaction abort 665 jz 3f 666 mvc __THREAD_trap_tdb(256,%r14),0(%r13) 6673: la %r11,STACK_FRAME_OVERHEAD(%r15) 668 stmg %r0,%r7,__PT_R0(%r11) 669 # clear user controlled registers to prevent speculative use 670 xgr %r0,%r0 671 xgr %r1,%r1 672 xgr %r2,%r2 673 xgr %r3,%r3 674 xgr %r4,%r4 675 xgr %r5,%r5 676 xgr %r6,%r6 677 xgr %r7,%r7 678 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 679 stmg %r8,%r9,__PT_PSW(%r11) 680 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC 681 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE 682 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 683 stg %r10,__PT_ARGS(%r11) 684 tm __LC_PGM_ILC+3,0x80 # check for per exception 685 jz 4f 686 tmhh %r8,0x0001 # kernel per event ? 687 jz .Lpgm_kprobe 688 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP 689 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS 690 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE 691 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID 6924: REENABLE_IRQS 693 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 694 larl %r1,pgm_check_table 695 llgh %r10,__PT_INT_CODE+2(%r11) 696 nill %r10,0x007f 697 sll %r10,2 698 je .Lpgm_return 699 lgf %r9,0(%r10,%r1) # load address of handler routine 700 lgr %r2,%r11 # pass pointer to pt_regs 701 BASR_R14_R9 # branch to interrupt-handler 702.Lpgm_return: 703 LOCKDEP_SYS_EXIT 704 tm __PT_PSW+1(%r11),0x01 # returning to user ? 705 jno .Lsysc_restore 706 j .Lsysc_tif 707 708# 709# PER event in supervisor state, must be kprobes 710# 711.Lpgm_kprobe: 712 REENABLE_IRQS 713 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 714 lgr %r2,%r11 # pass pointer to pt_regs 715 brasl %r14,do_per_trap 716 j .Lpgm_return 717 718# 719# single stepped system call 720# 721.Lpgm_svcper: 722 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW 723 larl %r14,.Lsysc_per 724 stg %r14,__LC_RETURN_PSW+8 725 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP 726 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs 727 728/* 729 * IO interrupt handler routine 730 */ 731ENTRY(io_int_handler) 732 STCK __LC_INT_CLOCK 733 stpt __LC_ASYNC_ENTER_TIMER 734 BPOFF 735 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 736 lg %r10,__LC_LAST_BREAK 737 lg %r12,__LC_THREAD_INFO 738 larl %r13,cleanup_critical 739 lmg %r8,%r9,__LC_IO_OLD_PSW 740 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 741 stmg %r0,%r7,__PT_R0(%r11) 742 # clear user controlled registers to prevent speculative use 743 xgr %r0,%r0 744 xgr %r1,%r1 745 xgr %r2,%r2 746 xgr %r3,%r3 747 xgr %r4,%r4 748 xgr %r5,%r5 749 xgr %r6,%r6 750 xgr %r7,%r7 751 xgr %r10,%r10 752 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 753 stmg %r8,%r9,__PT_PSW(%r11) 754 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 755 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 756 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 757 jo .Lio_restore 758 TRACE_IRQS_OFF 759 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 760.Lio_loop: 761 lgr %r2,%r11 # pass pointer to pt_regs 762 lghi %r3,IO_INTERRUPT 763 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? 764 jz .Lio_call 765 lghi %r3,THIN_INTERRUPT 766.Lio_call: 767 brasl %r14,do_IRQ 768 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR 769 jz .Lio_return 770 tpi 0 771 jz .Lio_return 772 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 773 j .Lio_loop 774.Lio_return: 775 LOCKDEP_SYS_EXIT 776 TRACE_IRQS_ON 777.Lio_tif: 778 TSTMSK __TI_flags(%r12),_TIF_WORK 779 jnz .Lio_work # there is work to do (signals etc.) 780 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 781 jnz .Lio_work 782.Lio_restore: 783 lg %r14,__LC_VDSO_PER_CPU 784 lmg %r0,%r10,__PT_R0(%r11) 785 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 786 tm __PT_PSW+1(%r11),0x01 # returning to user ? 787 jno .Lio_exit_kernel 788 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP 789.Lio_exit_timer: 790 stpt __LC_EXIT_TIMER 791 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 792.Lio_exit_kernel: 793 lmg %r11,%r15,__PT_R11(%r11) 794 lpswe __LC_RETURN_PSW 795.Lio_done: 796 797# 798# There is work todo, find out in which context we have been interrupted: 799# 1) if we return to user space we can do all _TIF_WORK work 800# 2) if we return to kernel code and kvm is enabled check if we need to 801# modify the psw to leave SIE 802# 3) if we return to kernel code and preemptive scheduling is enabled check 803# the preemption counter and if it is zero call preempt_schedule_irq 804# Before any work can be done, a switch to the kernel stack is required. 805# 806.Lio_work: 807 tm __PT_PSW+1(%r11),0x01 # returning to user ? 808 jo .Lio_work_user # yes -> do resched & signal 809#ifdef CONFIG_PREEMPT 810 # check for preemptive scheduling 811 icm %r0,15,__TI_precount(%r12) 812 jnz .Lio_restore # preemption is disabled 813 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 814 jno .Lio_restore 815 # switch to kernel stack 816 lg %r1,__PT_R15(%r11) 817 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 818 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 819 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 820 la %r11,STACK_FRAME_OVERHEAD(%r1) 821 lgr %r15,%r1 822 # TRACE_IRQS_ON already done at .Lio_return, call 823 # TRACE_IRQS_OFF to keep things symmetrical 824 TRACE_IRQS_OFF 825 brasl %r14,preempt_schedule_irq 826 j .Lio_return 827#else 828 j .Lio_restore 829#endif 830 831# 832# Need to do work before returning to userspace, switch to kernel stack 833# 834.Lio_work_user: 835 lg %r1,__LC_KERNEL_STACK 836 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 837 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 838 la %r11,STACK_FRAME_OVERHEAD(%r1) 839 lgr %r15,%r1 840 841# 842# One of the work bits is on. Find out which one. 843# 844.Lio_work_tif: 845 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 846 jo .Lio_mcck_pending 847 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 848 jo .Lio_reschedule 849 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 850 jo .Lio_sigpending 851 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 852 jo .Lio_notify_resume 853 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 854 jo .Lio_vxrs 855 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE 856 jo .Lio_uaccess 857 j .Lio_return # beware of critical section cleanup 858 859# 860# _CIF_MCCK_PENDING is set, call handler 861# 862.Lio_mcck_pending: 863 # TRACE_IRQS_ON already done at .Lio_return 864 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler 865 TRACE_IRQS_OFF 866 j .Lio_return 867 868# 869# _CIF_ASCE is set, load user space asce 870# 871.Lio_uaccess: 872 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE 873 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 874 j .Lio_return 875 876# 877# CIF_FPU is set, restore floating-point controls and floating-point registers. 878# 879.Lio_vxrs: 880 larl %r14,.Lio_return 881 jg load_fpu_regs 882 883# 884# _TIF_NEED_RESCHED is set, call schedule 885# 886.Lio_reschedule: 887 # TRACE_IRQS_ON already done at .Lio_return 888 ssm __LC_SVC_NEW_PSW # reenable interrupts 889 brasl %r14,schedule # call scheduler 890 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 891 TRACE_IRQS_OFF 892 j .Lio_return 893 894# 895# _TIF_SIGPENDING or is set, call do_signal 896# 897.Lio_sigpending: 898 # TRACE_IRQS_ON already done at .Lio_return 899 ssm __LC_SVC_NEW_PSW # reenable interrupts 900 lgr %r2,%r11 # pass pointer to pt_regs 901 brasl %r14,do_signal 902 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 903 TRACE_IRQS_OFF 904 j .Lio_return 905 906# 907# _TIF_NOTIFY_RESUME or is set, call do_notify_resume 908# 909.Lio_notify_resume: 910 # TRACE_IRQS_ON already done at .Lio_return 911 ssm __LC_SVC_NEW_PSW # reenable interrupts 912 lgr %r2,%r11 # pass pointer to pt_regs 913 brasl %r14,do_notify_resume 914 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 915 TRACE_IRQS_OFF 916 j .Lio_return 917 918/* 919 * External interrupt handler routine 920 */ 921ENTRY(ext_int_handler) 922 STCK __LC_INT_CLOCK 923 stpt __LC_ASYNC_ENTER_TIMER 924 BPOFF 925 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 926 lg %r10,__LC_LAST_BREAK 927 lg %r12,__LC_THREAD_INFO 928 larl %r13,cleanup_critical 929 lmg %r8,%r9,__LC_EXT_OLD_PSW 930 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 931 stmg %r0,%r7,__PT_R0(%r11) 932 # clear user controlled registers to prevent speculative use 933 xgr %r0,%r0 934 xgr %r1,%r1 935 xgr %r2,%r2 936 xgr %r3,%r3 937 xgr %r4,%r4 938 xgr %r5,%r5 939 xgr %r6,%r6 940 xgr %r7,%r7 941 xgr %r10,%r10 942 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 943 stmg %r8,%r9,__PT_PSW(%r11) 944 lghi %r1,__LC_EXT_PARAMS2 945 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR 946 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS 947 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) 948 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 949 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 950 jo .Lio_restore 951 TRACE_IRQS_OFF 952 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 953 lgr %r2,%r11 # pass pointer to pt_regs 954 lghi %r3,EXT_INTERRUPT 955 brasl %r14,do_IRQ 956 j .Lio_return 957 958/* 959 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. 960 */ 961ENTRY(psw_idle) 962 stg %r3,__SF_EMPTY(%r15) 963 larl %r1,.Lpsw_idle_lpsw+4 964 stg %r1,__SF_EMPTY+8(%r15) 965#ifdef CONFIG_SMP 966 larl %r1,smp_cpu_mtid 967 llgf %r1,0(%r1) 968 ltgr %r1,%r1 969 jz .Lpsw_idle_stcctm 970 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) 971.Lpsw_idle_stcctm: 972#endif 973 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT 974 BPON 975 STCK __CLOCK_IDLE_ENTER(%r2) 976 stpt __TIMER_IDLE_ENTER(%r2) 977.Lpsw_idle_lpsw: 978 lpswe __SF_EMPTY(%r15) 979 BR_R1USE_R14 980.Lpsw_idle_end: 981 982/* 983 * Store floating-point controls and floating-point or vector register 984 * depending whether the vector facility is available. A critical section 985 * cleanup assures that the registers are stored even if interrupted for 986 * some other work. The CIF_FPU flag is set to trigger a lazy restore 987 * of the register contents at return from io or a system call. 988 */ 989ENTRY(save_fpu_regs) 990 lg %r2,__LC_CURRENT 991 aghi %r2,__TASK_thread 992 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 993 jo .Lsave_fpu_regs_exit 994 stfpc __THREAD_FPU_fpc(%r2) 995.Lsave_fpu_regs_fpc_end: 996 lg %r3,__THREAD_FPU_regs(%r2) 997 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 998 jz .Lsave_fpu_regs_fp # no -> store FP regs 999.Lsave_fpu_regs_vx_low: 1000 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) 1001.Lsave_fpu_regs_vx_high: 1002 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) 1003 j .Lsave_fpu_regs_done # -> set CIF_FPU flag 1004.Lsave_fpu_regs_fp: 1005 std 0,0(%r3) 1006 std 1,8(%r3) 1007 std 2,16(%r3) 1008 std 3,24(%r3) 1009 std 4,32(%r3) 1010 std 5,40(%r3) 1011 std 6,48(%r3) 1012 std 7,56(%r3) 1013 std 8,64(%r3) 1014 std 9,72(%r3) 1015 std 10,80(%r3) 1016 std 11,88(%r3) 1017 std 12,96(%r3) 1018 std 13,104(%r3) 1019 std 14,112(%r3) 1020 std 15,120(%r3) 1021.Lsave_fpu_regs_done: 1022 oi __LC_CPU_FLAGS+7,_CIF_FPU 1023.Lsave_fpu_regs_exit: 1024 BR_R1USE_R14 1025.Lsave_fpu_regs_end: 1026#if IS_ENABLED(CONFIG_KVM) 1027EXPORT_SYMBOL(save_fpu_regs) 1028#endif 1029 1030/* 1031 * Load floating-point controls and floating-point or vector registers. 1032 * A critical section cleanup assures that the register contents are 1033 * loaded even if interrupted for some other work. 1034 * 1035 * There are special calling conventions to fit into sysc and io return work: 1036 * %r15: <kernel stack> 1037 * The function requires: 1038 * %r4 1039 */ 1040load_fpu_regs: 1041 lg %r4,__LC_CURRENT 1042 aghi %r4,__TASK_thread 1043 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 1044 jno .Lload_fpu_regs_exit 1045 lfpc __THREAD_FPU_fpc(%r4) 1046 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 1047 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area 1048 jz .Lload_fpu_regs_fp # -> no VX, load FP regs 1049.Lload_fpu_regs_vx: 1050 VLM %v0,%v15,0,%r4 1051.Lload_fpu_regs_vx_high: 1052 VLM %v16,%v31,256,%r4 1053 j .Lload_fpu_regs_done 1054.Lload_fpu_regs_fp: 1055 ld 0,0(%r4) 1056 ld 1,8(%r4) 1057 ld 2,16(%r4) 1058 ld 3,24(%r4) 1059 ld 4,32(%r4) 1060 ld 5,40(%r4) 1061 ld 6,48(%r4) 1062 ld 7,56(%r4) 1063 ld 8,64(%r4) 1064 ld 9,72(%r4) 1065 ld 10,80(%r4) 1066 ld 11,88(%r4) 1067 ld 12,96(%r4) 1068 ld 13,104(%r4) 1069 ld 14,112(%r4) 1070 ld 15,120(%r4) 1071.Lload_fpu_regs_done: 1072 ni __LC_CPU_FLAGS+7,255-_CIF_FPU 1073.Lload_fpu_regs_exit: 1074 BR_R1USE_R14 1075.Lload_fpu_regs_end: 1076 1077.L__critical_end: 1078 1079/* 1080 * Machine check handler routines 1081 */ 1082ENTRY(mcck_int_handler) 1083 STCK __LC_MCCK_CLOCK 1084 BPOFF 1085 la %r1,4095 # revalidate r1 1086 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 1087 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 1088 lg %r10,__LC_LAST_BREAK 1089 lg %r12,__LC_THREAD_INFO 1090 larl %r13,cleanup_critical 1091 lmg %r8,%r9,__LC_MCK_OLD_PSW 1092 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE 1093 jo .Lmcck_panic # yes -> rest of mcck code invalid 1094 lghi %r14,__LC_CPU_TIMER_SAVE_AREA 1095 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 1096 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID 1097 jo 3f 1098 la %r14,__LC_SYNC_ENTER_TIMER 1099 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 1100 jl 0f 1101 la %r14,__LC_ASYNC_ENTER_TIMER 11020: clc 0(8,%r14),__LC_EXIT_TIMER 1103 jl 1f 1104 la %r14,__LC_EXIT_TIMER 11051: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 1106 jl 2f 1107 la %r14,__LC_LAST_UPDATE_TIMER 11082: spt 0(%r14) 1109 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 11103: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) 1111 jno .Lmcck_panic # no -> skip cleanup critical 1112 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER 1113.Lmcck_skip: 1114 lghi %r14,__LC_GPREGS_SAVE_AREA+64 1115 stmg %r0,%r7,__PT_R0(%r11) 1116 # clear user controlled registers to prevent speculative use 1117 xgr %r0,%r0 1118 xgr %r1,%r1 1119 xgr %r2,%r2 1120 xgr %r3,%r3 1121 xgr %r4,%r4 1122 xgr %r5,%r5 1123 xgr %r6,%r6 1124 xgr %r7,%r7 1125 xgr %r10,%r10 1126 mvc __PT_R8(64,%r11),0(%r14) 1127 stmg %r8,%r9,__PT_PSW(%r11) 1128 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 1129 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 1130 lgr %r2,%r11 # pass pointer to pt_regs 1131 brasl %r14,s390_do_machine_check 1132 tm __PT_PSW+1(%r11),0x01 # returning to user ? 1133 jno .Lmcck_return 1134 lg %r1,__LC_KERNEL_STACK # switch to kernel stack 1135 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 1136 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 1137 la %r11,STACK_FRAME_OVERHEAD(%r1) 1138 lgr %r15,%r1 1139 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off 1140 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 1141 jno .Lmcck_return 1142 TRACE_IRQS_OFF 1143 brasl %r14,s390_handle_mcck 1144 TRACE_IRQS_ON 1145.Lmcck_return: 1146 lg %r14,__LC_VDSO_PER_CPU 1147 lmg %r0,%r10,__PT_R0(%r11) 1148 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW 1149 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 1150 jno 0f 1151 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP 1152 stpt __LC_EXIT_TIMER 1153 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 11540: lmg %r11,%r15,__PT_R11(%r11) 1155 lpswe __LC_RETURN_MCCK_PSW 1156 1157.Lmcck_panic: 1158 lg %r15,__LC_PANIC_STACK 1159 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 1160 j .Lmcck_skip 1161 1162# 1163# PSW restart interrupt handler 1164# 1165ENTRY(restart_int_handler) 1166 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 1167 jz 0f 1168 .insn s,0xb2800000,__LC_LPP 11690: stg %r15,__LC_SAVE_AREA_RESTART 1170 lg %r15,__LC_RESTART_STACK 1171 aghi %r15,-__PT_SIZE # create pt_regs on stack 1172 xc 0(__PT_SIZE,%r15),0(%r15) 1173 stmg %r0,%r14,__PT_R0(%r15) 1174 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART 1175 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw 1176 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack 1177 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) 1178 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu 1179 lg %r2,__LC_RESTART_DATA 1180 lg %r3,__LC_RESTART_SOURCE 1181 ltgr %r3,%r3 # test source cpu address 1182 jm 1f # negative -> skip source stop 11830: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu 1184 brc 10,0b # wait for status stored 11851: basr %r14,%r1 # call function 1186 stap __SF_EMPTY(%r15) # store cpu address 1187 llgh %r3,__SF_EMPTY(%r15) 11882: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu 1189 brc 2,2b 11903: j 3b 1191 1192 .section .kprobes.text, "ax" 1193 1194#ifdef CONFIG_CHECK_STACK 1195/* 1196 * The synchronous or the asynchronous stack overflowed. We are dead. 1197 * No need to properly save the registers, we are going to panic anyway. 1198 * Setup a pt_regs so that show_trace can provide a good call trace. 1199 */ 1200stack_overflow: 1201 lg %r15,__LC_PANIC_STACK # change to panic stack 1202 la %r11,STACK_FRAME_OVERHEAD(%r15) 1203 stmg %r0,%r7,__PT_R0(%r11) 1204 stmg %r8,%r9,__PT_PSW(%r11) 1205 mvc __PT_R8(64,%r11),0(%r14) 1206 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 1207 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 1208 lgr %r2,%r11 # pass pointer to pt_regs 1209 jg kernel_stack_overflow 1210#endif 1211 1212cleanup_critical: 1213#if IS_ENABLED(CONFIG_KVM) 1214 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap 1215 jl 0f 1216 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done 1217 jl .Lcleanup_sie 1218#endif 1219 clg %r9,BASED(.Lcleanup_table) # system_call 1220 jl 0f 1221 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc 1222 jl .Lcleanup_system_call 1223 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif 1224 jl 0f 1225 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore 1226 jl .Lcleanup_sysc_tif 1227 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done 1228 jl .Lcleanup_sysc_restore 1229 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif 1230 jl 0f 1231 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore 1232 jl .Lcleanup_io_tif 1233 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done 1234 jl .Lcleanup_io_restore 1235 clg %r9,BASED(.Lcleanup_table+64) # psw_idle 1236 jl 0f 1237 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end 1238 jl .Lcleanup_idle 1239 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs 1240 jl 0f 1241 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end 1242 jl .Lcleanup_save_fpu_regs 1243 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs 1244 jl 0f 1245 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end 1246 jl .Lcleanup_load_fpu_regs 12470: BR_R11USE_R14 1248 1249 .align 8 1250.Lcleanup_table: 1251 .quad system_call 1252 .quad .Lsysc_do_svc 1253 .quad .Lsysc_tif 1254 .quad .Lsysc_restore 1255 .quad .Lsysc_done 1256 .quad .Lio_tif 1257 .quad .Lio_restore 1258 .quad .Lio_done 1259 .quad psw_idle 1260 .quad .Lpsw_idle_end 1261 .quad save_fpu_regs 1262 .quad .Lsave_fpu_regs_end 1263 .quad load_fpu_regs 1264 .quad .Lload_fpu_regs_end 1265 1266#if IS_ENABLED(CONFIG_KVM) 1267.Lcleanup_table_sie: 1268 .quad .Lsie_gmap 1269 .quad .Lsie_done 1270 1271.Lcleanup_sie: 1272 BPENTER __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST) 1273 lg %r9,__SF_EMPTY(%r15) # get control block pointer 1274 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE 1275 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 1276 larl %r9,sie_exit # skip forward to sie_exit 1277 BR_R11USE_R14 1278#endif 1279 1280.Lcleanup_system_call: 1281 # check if stpt has been executed 1282 clg %r9,BASED(.Lcleanup_system_call_insn) 1283 jh 0f 1284 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 1285 cghi %r11,__LC_SAVE_AREA_ASYNC 1286 je 0f 1287 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER 12880: # check if stmg has been executed 1289 clg %r9,BASED(.Lcleanup_system_call_insn+8) 1290 jh 0f 1291 mvc __LC_SAVE_AREA_SYNC(64),0(%r11) 12920: # check if base register setup + TIF bit load has been done 1293 clg %r9,BASED(.Lcleanup_system_call_insn+16) 1294 jhe 0f 1295 # set up saved registers r10 and r12 1296 stg %r10,16(%r11) # r10 last break 1297 stg %r12,32(%r11) # r12 thread-info pointer 12980: # check if the user time update has been done 1299 clg %r9,BASED(.Lcleanup_system_call_insn+24) 1300 jh 0f 1301 lg %r15,__LC_EXIT_TIMER 1302 slg %r15,__LC_SYNC_ENTER_TIMER 1303 alg %r15,__LC_USER_TIMER 1304 stg %r15,__LC_USER_TIMER 13050: # check if the system time update has been done 1306 clg %r9,BASED(.Lcleanup_system_call_insn+32) 1307 jh 0f 1308 lg %r15,__LC_LAST_UPDATE_TIMER 1309 slg %r15,__LC_EXIT_TIMER 1310 alg %r15,__LC_SYSTEM_TIMER 1311 stg %r15,__LC_SYSTEM_TIMER 13120: # update accounting time stamp 1313 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 1314 # do LAST_BREAK 1315 lg %r9,16(%r11) 1316 srag %r9,%r9,23 1317 jz 0f 1318 mvc __TI_last_break(8,%r12),16(%r11) 13190: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP 1320 # set up saved register r11 1321 lg %r15,__LC_KERNEL_STACK 1322 la %r9,STACK_FRAME_OVERHEAD(%r15) 1323 stg %r9,24(%r11) # r11 pt_regs pointer 1324 # fill pt_regs 1325 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC 1326 stmg %r0,%r7,__PT_R0(%r9) 1327 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW 1328 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC 1329 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) 1330 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL 1331 # setup saved register r15 1332 stg %r15,56(%r11) # r15 stack pointer 1333 # set new psw address and exit 1334 larl %r9,.Lsysc_do_svc 1335 BR_R11USE_R14 1336.Lcleanup_system_call_insn: 1337 .quad system_call 1338 .quad .Lsysc_stmg 1339 .quad .Lsysc_per 1340 .quad .Lsysc_vtime+36 1341 .quad .Lsysc_vtime+42 1342 1343.Lcleanup_sysc_tif: 1344 larl %r9,.Lsysc_tif 1345 BR_R11USE_R14 1346 1347.Lcleanup_sysc_restore: 1348 # check if stpt has been executed 1349 clg %r9,BASED(.Lcleanup_sysc_restore_insn) 1350 jh 0f 1351 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1352 cghi %r11,__LC_SAVE_AREA_ASYNC 1353 je 0f 1354 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 13550: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8) 1356 je 1f 1357 lg %r9,24(%r11) # get saved pointer to pt_regs 1358 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1359 mvc 0(64,%r11),__PT_R8(%r9) 1360 lmg %r0,%r7,__PT_R0(%r9) 13611: lmg %r8,%r9,__LC_RETURN_PSW 1362 BR_R11USE_R14 1363.Lcleanup_sysc_restore_insn: 1364 .quad .Lsysc_exit_timer 1365 .quad .Lsysc_done - 4 1366 1367.Lcleanup_io_tif: 1368 larl %r9,.Lio_tif 1369 BR_R11USE_R14 1370 1371.Lcleanup_io_restore: 1372 # check if stpt has been executed 1373 clg %r9,BASED(.Lcleanup_io_restore_insn) 1374 jh 0f 1375 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 13760: clg %r9,BASED(.Lcleanup_io_restore_insn+8) 1377 je 1f 1378 lg %r9,24(%r11) # get saved r11 pointer to pt_regs 1379 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1380 mvc 0(64,%r11),__PT_R8(%r9) 1381 lmg %r0,%r7,__PT_R0(%r9) 13821: lmg %r8,%r9,__LC_RETURN_PSW 1383 BR_R11USE_R14 1384.Lcleanup_io_restore_insn: 1385 .quad .Lio_exit_timer 1386 .quad .Lio_done - 4 1387 1388.Lcleanup_idle: 1389 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT 1390 # copy interrupt clock & cpu timer 1391 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK 1392 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER 1393 cghi %r11,__LC_SAVE_AREA_ASYNC 1394 je 0f 1395 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK 1396 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER 13970: # check if stck & stpt have been executed 1398 clg %r9,BASED(.Lcleanup_idle_insn) 1399 jhe 1f 1400 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) 1401 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) 14021: # calculate idle cycles 1403#ifdef CONFIG_SMP 1404 clg %r9,BASED(.Lcleanup_idle_insn) 1405 jl 3f 1406 larl %r1,smp_cpu_mtid 1407 llgf %r1,0(%r1) 1408 ltgr %r1,%r1 1409 jz 3f 1410 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) 1411 larl %r3,mt_cycles 1412 ag %r3,__LC_PERCPU_OFFSET 1413 la %r4,__SF_EMPTY+16(%r15) 14142: lg %r0,0(%r3) 1415 slg %r0,0(%r4) 1416 alg %r0,64(%r4) 1417 stg %r0,0(%r3) 1418 la %r3,8(%r3) 1419 la %r4,8(%r4) 1420 brct %r1,2b 1421#endif 14223: # account system time going idle 1423 lg %r9,__LC_STEAL_TIMER 1424 alg %r9,__CLOCK_IDLE_ENTER(%r2) 1425 slg %r9,__LC_LAST_UPDATE_CLOCK 1426 stg %r9,__LC_STEAL_TIMER 1427 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) 1428 lg %r9,__LC_SYSTEM_TIMER 1429 alg %r9,__LC_LAST_UPDATE_TIMER 1430 slg %r9,__TIMER_IDLE_ENTER(%r2) 1431 stg %r9,__LC_SYSTEM_TIMER 1432 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) 1433 # prepare return psw 1434 nihh %r8,0xfcfd # clear irq & wait state bits 1435 lg %r9,48(%r11) # return from psw_idle 1436 BR_R11USE_R14 1437.Lcleanup_idle_insn: 1438 .quad .Lpsw_idle_lpsw 1439 1440.Lcleanup_save_fpu_regs: 1441 larl %r9,save_fpu_regs 1442 BR_R11USE_R14 1443 1444.Lcleanup_load_fpu_regs: 1445 larl %r9,load_fpu_regs 1446 BR_R11USE_R14 1447 1448/* 1449 * Integer constants 1450 */ 1451 .align 8 1452.Lcritical_start: 1453 .quad .L__critical_start 1454.Lcritical_length: 1455 .quad .L__critical_end - .L__critical_start 1456#if IS_ENABLED(CONFIG_KVM) 1457.Lsie_critical_start: 1458 .quad .Lsie_gmap 1459.Lsie_critical_length: 1460 .quad .Lsie_done - .Lsie_gmap 1461#endif 1462 .section .rodata, "a" 1463#define SYSCALL(esame,emu) .long esame 1464 .globl sys_call_table 1465sys_call_table: 1466#include "syscalls.S" 1467#undef SYSCALL 1468 1469#ifdef CONFIG_COMPAT 1470 1471#define SYSCALL(esame,emu) .long emu 1472 .globl sys_call_table_emu 1473sys_call_table_emu: 1474#include "syscalls.S" 1475#undef SYSCALL 1476#endif 1477