1/* 2 * Compatibility mode system call entry point for x86-64. 3 * 4 * Copyright 2000-2002 Andi Kleen, SuSE Labs. 5 */ 6#include "calling.h" 7#include <asm/asm-offsets.h> 8#include <asm/current.h> 9#include <asm/errno.h> 10#include <asm/ia32_unistd.h> 11#include <asm/thread_info.h> 12#include <asm/segment.h> 13#include <asm/irqflags.h> 14#include <asm/asm.h> 15#include <asm/smap.h> 16#include <asm/pgtable_types.h> 17#include <asm/kaiser.h> 18#include <linux/linkage.h> 19#include <linux/err.h> 20 21 .section .entry.text, "ax" 22 23/* 24 * 32-bit SYSENTER entry. 25 * 26 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 27 * on 64-bit kernels running on Intel CPUs. 28 * 29 * The SYSENTER instruction, in principle, should *only* occur in the 30 * vDSO. In practice, a small number of Android devices were shipped 31 * with a copy of Bionic that inlined a SYSENTER instruction. This 32 * never happened in any of Google's Bionic versions -- it only happened 33 * in a narrow range of Intel-provided versions. 34 * 35 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs. 36 * IF and VM in RFLAGS are cleared (IOW: interrupts are off). 37 * SYSENTER does not save anything on the stack, 38 * and does not save old RIP (!!!), RSP, or RFLAGS. 39 * 40 * Arguments: 41 * eax system call number 42 * ebx arg1 43 * ecx arg2 44 * edx arg3 45 * esi arg4 46 * edi arg5 47 * ebp user stack 48 * 0(%ebp) arg6 49 */ 50ENTRY(entry_SYSENTER_compat) 51 /* Interrupts are off on entry. */ 52 SWAPGS_UNSAFE_STACK 53 SWITCH_KERNEL_CR3_NO_STACK 54 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 55 56 /* 57 * User tracing code (ptrace or signal handlers) might assume that 58 * the saved RAX contains a 32-bit number when we're invoking a 32-bit 59 * syscall. Just in case the high bits are nonzero, zero-extend 60 * the syscall number. (This could almost certainly be deleted 61 * with no ill effects.) 62 */ 63 movl %eax, %eax 64 65 /* Construct struct pt_regs on stack */ 66 pushq $__USER32_DS /* pt_regs->ss */ 67 pushq %rbp /* pt_regs->sp (stashed in bp) */ 68 69 /* 70 * Push flags. This is nasty. First, interrupts are currently 71 * off, but we need pt_regs->flags to have IF set. Second, even 72 * if TF was set when SYSENTER started, it's clear by now. We fix 73 * that later using TIF_SINGLESTEP. 74 */ 75 pushfq /* pt_regs->flags (except IF = 0) */ 76 orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */ 77 pushq $__USER32_CS /* pt_regs->cs */ 78 pushq $0 /* pt_regs->ip = 0 (placeholder) */ 79 pushq %rax /* pt_regs->orig_ax */ 80 pushq %rdi /* pt_regs->di */ 81 pushq %rsi /* pt_regs->si */ 82 pushq %rdx /* pt_regs->dx */ 83 pushq %rcx /* pt_regs->cx */ 84 pushq $-ENOSYS /* pt_regs->ax */ 85 pushq $0 /* pt_regs->r8 = 0 */ 86 xorq %r8, %r8 /* nospec r8 */ 87 pushq $0 /* pt_regs->r9 = 0 */ 88 xorq %r9, %r9 /* nospec r9 */ 89 pushq $0 /* pt_regs->r10 = 0 */ 90 xorq %r10, %r10 /* nospec r10 */ 91 pushq $0 /* pt_regs->r11 = 0 */ 92 xorq %r11, %r11 /* nospec r11 */ 93 pushq %rbx /* pt_regs->rbx */ 94 xorl %ebx, %ebx /* nospec rbx */ 95 pushq %rbp /* pt_regs->rbp (will be overwritten) */ 96 xorl %ebp, %ebp /* nospec rbp */ 97 pushq $0 /* pt_regs->r12 = 0 */ 98 xorq %r12, %r12 /* nospec r12 */ 99 pushq $0 /* pt_regs->r13 = 0 */ 100 xorq %r13, %r13 /* nospec r13 */ 101 pushq $0 /* pt_regs->r14 = 0 */ 102 xorq %r14, %r14 /* nospec r14 */ 103 pushq $0 /* pt_regs->r15 = 0 */ 104 xorq %r15, %r15 /* nospec r15 */ 105 cld 106 107 /* 108 * SYSENTER doesn't filter flags, so we need to clear NT and AC 109 * ourselves. To save a few cycles, we can check whether 110 * either was set instead of doing an unconditional popfq. 111 * This needs to happen before enabling interrupts so that 112 * we don't get preempted with NT set. 113 * 114 * If TF is set, we will single-step all the way to here -- do_debug 115 * will ignore all the traps. (Yes, this is slow, but so is 116 * single-stepping in general. This allows us to avoid having 117 * a more complicated code to handle the case where a user program 118 * forces us to single-step through the SYSENTER entry code.) 119 * 120 * NB.: .Lsysenter_fix_flags is a label with the code under it moved 121 * out-of-line as an optimization: NT is unlikely to be set in the 122 * majority of the cases and instead of polluting the I$ unnecessarily, 123 * we're keeping that code behind a branch which will predict as 124 * not-taken and therefore its instructions won't be fetched. 125 */ 126 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp) 127 jnz .Lsysenter_fix_flags 128.Lsysenter_flags_fixed: 129 130 /* 131 * User mode is traced as though IRQs are on, and SYSENTER 132 * turned them off. 133 */ 134 TRACE_IRQS_OFF 135 136 movq %rsp, %rdi 137 call do_fast_syscall_32 138 /* XEN PV guests always use IRET path */ 139 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ 140 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV 141 jmp sysret32_from_system_call 142 143.Lsysenter_fix_flags: 144 pushq $X86_EFLAGS_FIXED 145 popfq 146 jmp .Lsysenter_flags_fixed 147GLOBAL(__end_entry_SYSENTER_compat) 148ENDPROC(entry_SYSENTER_compat) 149 150/* 151 * 32-bit SYSCALL entry. 152 * 153 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 154 * on 64-bit kernels running on AMD CPUs. 155 * 156 * The SYSCALL instruction, in principle, should *only* occur in the 157 * vDSO. In practice, it appears that this really is the case. 158 * As evidence: 159 * 160 * - The calling convention for SYSCALL has changed several times without 161 * anyone noticing. 162 * 163 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything 164 * user task that did SYSCALL without immediately reloading SS 165 * would randomly crash. 166 * 167 * - Most programmers do not directly target AMD CPUs, and the 32-bit 168 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD 169 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels 170 * because the SYSCALL instruction in legacy/native 32-bit mode (as 171 * opposed to compat mode) is sufficiently poorly designed as to be 172 * essentially unusable. 173 * 174 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves 175 * RFLAGS to R11, then loads new SS, CS, and RIP from previously 176 * programmed MSRs. RFLAGS gets masked by a value from another MSR 177 * (so CLD and CLAC are not needed). SYSCALL does not save anything on 178 * the stack and does not change RSP. 179 * 180 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode 181 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it). 182 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit 183 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes 184 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors). 185 * 186 * Arguments: 187 * eax system call number 188 * ecx return address 189 * ebx arg1 190 * ebp arg2 (note: not saved in the stack frame, should not be touched) 191 * edx arg3 192 * esi arg4 193 * edi arg5 194 * esp user stack 195 * 0(%esp) arg6 196 */ 197ENTRY(entry_SYSCALL_compat) 198 /* Interrupts are off on entry. */ 199 SWAPGS_UNSAFE_STACK 200 SWITCH_KERNEL_CR3_NO_STACK 201 202 /* Stash user ESP and switch to the kernel stack. */ 203 movl %esp, %r8d 204 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 205 206 /* Zero-extending 32-bit regs, do not remove */ 207 movl %eax, %eax 208 209 /* Construct struct pt_regs on stack */ 210 pushq $__USER32_DS /* pt_regs->ss */ 211 pushq %r8 /* pt_regs->sp */ 212 pushq %r11 /* pt_regs->flags */ 213 pushq $__USER32_CS /* pt_regs->cs */ 214 pushq %rcx /* pt_regs->ip */ 215 pushq %rax /* pt_regs->orig_ax */ 216 pushq %rdi /* pt_regs->di */ 217 pushq %rsi /* pt_regs->si */ 218 pushq %rdx /* pt_regs->dx */ 219 pushq %rbp /* pt_regs->cx (stashed in bp) */ 220 pushq $-ENOSYS /* pt_regs->ax */ 221 pushq $0 /* pt_regs->r8 = 0 */ 222 xorq %r8, %r8 /* nospec r8 */ 223 pushq $0 /* pt_regs->r9 = 0 */ 224 xorq %r9, %r9 /* nospec r9 */ 225 pushq $0 /* pt_regs->r10 = 0 */ 226 xorq %r10, %r10 /* nospec r10 */ 227 pushq $0 /* pt_regs->r11 = 0 */ 228 xorq %r11, %r11 /* nospec r11 */ 229 pushq %rbx /* pt_regs->rbx */ 230 xorl %ebx, %ebx /* nospec rbx */ 231 pushq %rbp /* pt_regs->rbp (will be overwritten) */ 232 xorl %ebp, %ebp /* nospec rbp */ 233 pushq $0 /* pt_regs->r12 = 0 */ 234 xorq %r12, %r12 /* nospec r12 */ 235 pushq $0 /* pt_regs->r13 = 0 */ 236 xorq %r13, %r13 /* nospec r13 */ 237 pushq $0 /* pt_regs->r14 = 0 */ 238 xorq %r14, %r14 /* nospec r14 */ 239 pushq $0 /* pt_regs->r15 = 0 */ 240 xorq %r15, %r15 /* nospec r15 */ 241 242 /* 243 * User mode is traced as though IRQs are on, and SYSENTER 244 * turned them off. 245 */ 246 TRACE_IRQS_OFF 247 248 movq %rsp, %rdi 249 call do_fast_syscall_32 250 /* XEN PV guests always use IRET path */ 251 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ 252 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV 253 254 /* Opportunistic SYSRET */ 255sysret32_from_system_call: 256 TRACE_IRQS_ON /* User mode traces as IRQs on. */ 257 movq RBX(%rsp), %rbx /* pt_regs->rbx */ 258 movq RBP(%rsp), %rbp /* pt_regs->rbp */ 259 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */ 260 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */ 261 addq $RAX, %rsp /* Skip r8-r15 */ 262 popq %rax /* pt_regs->rax */ 263 popq %rdx /* Skip pt_regs->cx */ 264 popq %rdx /* pt_regs->dx */ 265 popq %rsi /* pt_regs->si */ 266 popq %rdi /* pt_regs->di */ 267 268 /* 269 * USERGS_SYSRET32 does: 270 * GSBASE = user's GS base 271 * EIP = ECX 272 * RFLAGS = R11 273 * CS = __USER32_CS 274 * SS = __USER_DS 275 * 276 * ECX will not match pt_regs->cx, but we're returning to a vDSO 277 * trampoline that will fix up RCX, so this is okay. 278 * 279 * R12-R15 are callee-saved, so they contain whatever was in them 280 * when the system call started, which is already known to user 281 * code. We zero R8-R10 to avoid info leaks. 282 */ 283 xorq %r8, %r8 284 xorq %r9, %r9 285 xorq %r10, %r10 286 SWITCH_USER_CR3 287 movq RSP-ORIG_RAX(%rsp), %rsp 288 swapgs 289 sysretl 290END(entry_SYSCALL_compat) 291 292/* 293 * 32-bit legacy system call entry. 294 * 295 * 32-bit x86 Linux system calls traditionally used the INT $0x80 296 * instruction. INT $0x80 lands here. 297 * 298 * This entry point can be used by 32-bit and 64-bit programs to perform 299 * 32-bit system calls. Instances of INT $0x80 can be found inline in 300 * various programs and libraries. It is also used by the vDSO's 301 * __kernel_vsyscall fallback for hardware that doesn't support a faster 302 * entry method. Restarted 32-bit system calls also fall back to INT 303 * $0x80 regardless of what instruction was originally used to do the 304 * system call. 305 * 306 * This is considered a slow path. It is not used by most libc 307 * implementations on modern hardware except during process startup. 308 * 309 * Arguments: 310 * eax system call number 311 * ebx arg1 312 * ecx arg2 313 * edx arg3 314 * esi arg4 315 * edi arg5 316 * ebp arg6 317 */ 318ENTRY(entry_INT80_compat) 319 /* 320 * Interrupts are off on entry. 321 */ 322 PARAVIRT_ADJUST_EXCEPTION_FRAME 323 ASM_CLAC /* Do this early to minimize exposure */ 324 SWAPGS 325 SWITCH_KERNEL_CR3_NO_STACK 326 /* 327 * User tracing code (ptrace or signal handlers) might assume that 328 * the saved RAX contains a 32-bit number when we're invoking a 32-bit 329 * syscall. Just in case the high bits are nonzero, zero-extend 330 * the syscall number. (This could almost certainly be deleted 331 * with no ill effects.) 332 */ 333 movl %eax, %eax 334 335 /* Construct struct pt_regs on stack (iret frame is already on stack) */ 336 pushq %rax /* pt_regs->orig_ax */ 337 pushq %rdi /* pt_regs->di */ 338 pushq %rsi /* pt_regs->si */ 339 pushq %rdx /* pt_regs->dx */ 340 pushq %rcx /* pt_regs->cx */ 341 pushq $-ENOSYS /* pt_regs->ax */ 342 pushq $0 /* pt_regs->r8 = 0 */ 343 xorq %r8, %r8 /* nospec r8 */ 344 pushq $0 /* pt_regs->r9 = 0 */ 345 xorq %r9, %r9 /* nospec r9 */ 346 pushq $0 /* pt_regs->r10 = 0 */ 347 xorq %r10, %r10 /* nospec r10 */ 348 pushq $0 /* pt_regs->r11 = 0 */ 349 xorq %r11, %r11 /* nospec r11 */ 350 pushq %rbx /* pt_regs->rbx */ 351 xorl %ebx, %ebx /* nospec rbx */ 352 pushq %rbp /* pt_regs->rbp */ 353 xorl %ebp, %ebp /* nospec rbp */ 354 pushq %r12 /* pt_regs->r12 */ 355 xorq %r12, %r12 /* nospec r12 */ 356 pushq %r13 /* pt_regs->r13 */ 357 xorq %r13, %r13 /* nospec r13 */ 358 pushq %r14 /* pt_regs->r14 */ 359 xorq %r14, %r14 /* nospec r14 */ 360 pushq %r15 /* pt_regs->r15 */ 361 xorq %r15, %r15 /* nospec r15 */ 362 cld 363 364 /* 365 * User mode is traced as though IRQs are on, and the interrupt 366 * gate turned them off. 367 */ 368 TRACE_IRQS_OFF 369 370 movq %rsp, %rdi 371 call do_int80_syscall_32 372.Lsyscall_32_done: 373 374 /* Go back to user mode. */ 375 TRACE_IRQS_ON 376 SWITCH_USER_CR3 377 SWAPGS 378 jmp restore_regs_and_iret 379END(entry_INT80_compat) 380 381 ALIGN 382GLOBAL(stub32_clone) 383 /* 384 * The 32-bit clone ABI is: clone(..., int tls_val, int *child_tidptr). 385 * The 64-bit clone ABI is: clone(..., int *child_tidptr, int tls_val). 386 * 387 * The native 64-bit kernel's sys_clone() implements the latter, 388 * so we need to swap arguments here before calling it: 389 */ 390 xchg %r8, %rcx 391 jmp sys_clone 392