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1 #ifndef __KVM_X86_LAPIC_H
2 #define __KVM_X86_LAPIC_H
3 
4 #include <kvm/iodev.h>
5 
6 #include <linux/kvm_host.h>
7 
8 #define KVM_APIC_INIT		0
9 #define KVM_APIC_SIPI		1
10 #define KVM_APIC_LVT_NUM	6
11 
12 #define KVM_APIC_SHORT_MASK	0xc0000
13 #define KVM_APIC_DEST_MASK	0x800
14 
15 struct kvm_timer {
16 	struct hrtimer timer;
17 	s64 period; 				/* unit: ns */
18 	u32 timer_mode;
19 	u32 timer_mode_mask;
20 	u64 tscdeadline;
21 	u64 expired_tscdeadline;
22 	atomic_t pending;			/* accumulated triggered timers */
23 	bool hv_timer_in_use;
24 };
25 
26 struct kvm_lapic {
27 	unsigned long base_address;
28 	struct kvm_io_device dev;
29 	struct kvm_timer lapic_timer;
30 	u32 divide_count;
31 	struct kvm_vcpu *vcpu;
32 	bool sw_enabled;
33 	bool irr_pending;
34 	bool lvt0_in_nmi_mode;
35 	/* Number of bits set in ISR. */
36 	s16 isr_count;
37 	/* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
38 	int highest_isr_cache;
39 	/**
40 	 * APIC register page.  The layout matches the register layout seen by
41 	 * the guest 1:1, because it is accessed by the vmx microcode.
42 	 * Note: Only one register, the TPR, is used by the microcode.
43 	 */
44 	void *regs;
45 	gpa_t vapic_addr;
46 	struct gfn_to_hva_cache vapic_cache;
47 	unsigned long pending_events;
48 	unsigned int sipi_vector;
49 };
50 
51 struct dest_map;
52 
53 int kvm_create_lapic(struct kvm_vcpu *vcpu);
54 void kvm_free_lapic(struct kvm_vcpu *vcpu);
55 
56 int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
57 int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
58 int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
59 void kvm_apic_accept_events(struct kvm_vcpu *vcpu);
60 void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event);
61 u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
62 void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
63 void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
64 void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
65 u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
66 void kvm_apic_set_version(struct kvm_vcpu *vcpu);
67 int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val);
68 int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len,
69 		       void *data);
70 bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
71 			   int short_hand, unsigned int dest, int dest_mode);
72 
73 void __kvm_apic_update_irr(u32 *pir, void *regs);
74 void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
75 int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
76 		     struct dest_map *dest_map);
77 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
78 
79 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
80 		struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map);
81 
82 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
83 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
84 int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
85 int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
86 int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
87 
88 u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
89 void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
90 
91 void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
92 void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
93 
94 int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
95 void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
96 void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
97 
98 int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
99 int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
100 
101 int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
102 int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
103 
kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu * vcpu)104 static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
105 {
106 	return vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
107 }
108 
109 int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
110 void kvm_lapic_init(void);
111 void kvm_lapic_exit(void);
112 
113 #define VEC_POS(v) ((v) & (32 - 1))
114 #define REG_POS(v) (((v) >> 5) << 4)
115 
kvm_lapic_set_vector(int vec,void * bitmap)116 static inline void kvm_lapic_set_vector(int vec, void *bitmap)
117 {
118 	set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
119 }
120 
kvm_lapic_set_irr(int vec,struct kvm_lapic * apic)121 static inline void kvm_lapic_set_irr(int vec, struct kvm_lapic *apic)
122 {
123 	kvm_lapic_set_vector(vec, apic->regs + APIC_IRR);
124 	/*
125 	 * irr_pending must be true if any interrupt is pending; set it after
126 	 * APIC_IRR to avoid race with apic_clear_irr
127 	 */
128 	apic->irr_pending = true;
129 }
130 
kvm_lapic_get_reg(struct kvm_lapic * apic,int reg_off)131 static inline u32 kvm_lapic_get_reg(struct kvm_lapic *apic, int reg_off)
132 {
133 	return *((u32 *) (apic->regs + reg_off));
134 }
135 
kvm_lapic_set_reg(struct kvm_lapic * apic,int reg_off,u32 val)136 static inline void kvm_lapic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)
137 {
138 	*((u32 *) (apic->regs + reg_off)) = val;
139 }
140 
141 extern struct static_key kvm_no_apic_vcpu;
142 
lapic_in_kernel(struct kvm_vcpu * vcpu)143 static inline bool lapic_in_kernel(struct kvm_vcpu *vcpu)
144 {
145 	if (static_key_false(&kvm_no_apic_vcpu))
146 		return vcpu->arch.apic;
147 	return true;
148 }
149 
150 extern struct static_key_deferred apic_hw_disabled;
151 
kvm_apic_hw_enabled(struct kvm_lapic * apic)152 static inline int kvm_apic_hw_enabled(struct kvm_lapic *apic)
153 {
154 	if (static_key_false(&apic_hw_disabled.key))
155 		return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
156 	return MSR_IA32_APICBASE_ENABLE;
157 }
158 
159 extern struct static_key_deferred apic_sw_disabled;
160 
kvm_apic_sw_enabled(struct kvm_lapic * apic)161 static inline bool kvm_apic_sw_enabled(struct kvm_lapic *apic)
162 {
163 	if (static_key_false(&apic_sw_disabled.key))
164 		return apic->sw_enabled;
165 	return true;
166 }
167 
kvm_apic_present(struct kvm_vcpu * vcpu)168 static inline bool kvm_apic_present(struct kvm_vcpu *vcpu)
169 {
170 	return lapic_in_kernel(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
171 }
172 
kvm_lapic_enabled(struct kvm_vcpu * vcpu)173 static inline int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
174 {
175 	return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
176 }
177 
apic_x2apic_mode(struct kvm_lapic * apic)178 static inline int apic_x2apic_mode(struct kvm_lapic *apic)
179 {
180 	return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
181 }
182 
kvm_vcpu_apicv_active(struct kvm_vcpu * vcpu)183 static inline bool kvm_vcpu_apicv_active(struct kvm_vcpu *vcpu)
184 {
185 	return vcpu->arch.apic && vcpu->arch.apicv_active;
186 }
187 
kvm_apic_has_events(struct kvm_vcpu * vcpu)188 static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)
189 {
190 	return lapic_in_kernel(vcpu) && vcpu->arch.apic->pending_events;
191 }
192 
kvm_lowest_prio_delivery(struct kvm_lapic_irq * irq)193 static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq *irq)
194 {
195 	return (irq->delivery_mode == APIC_DM_LOWEST ||
196 			irq->msi_redir_hint);
197 }
198 
kvm_lapic_latched_init(struct kvm_vcpu * vcpu)199 static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
200 {
201 	return lapic_in_kernel(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
202 }
203 
kvm_apic_id(struct kvm_lapic * apic)204 static inline u32 kvm_apic_id(struct kvm_lapic *apic)
205 {
206 	/* To avoid a race between apic_base and following APIC_ID update when
207 	 * switching to x2apic_mode, the x2apic mode returns initial x2apic id.
208 	 */
209 	if (apic_x2apic_mode(apic))
210 		return apic->vcpu->vcpu_id;
211 
212 	return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
213 }
214 
215 bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
216 
217 void wait_lapic_expire(struct kvm_vcpu *vcpu);
218 
219 bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
220 			struct kvm_vcpu **dest_vcpu);
221 int kvm_vector_to_index(u32 vector, u32 dest_vcpus,
222 			const unsigned long *bitmap, u32 bitmap_size);
223 void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu);
224 void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu);
225 void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);
226 bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);
227 #endif
228