1 /*
2 * STMicroelectronics accelerometers driver
3 *
4 * Copyright 2012-2013 STMicroelectronics Inc.
5 *
6 * Denis Ciocca <denis.ciocca@st.com>
7 *
8 * Licensed under the GPL-2.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/errno.h>
15 #include <linux/types.h>
16 #include <linux/mutex.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/gpio.h>
20 #include <linux/irq.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/trigger.h>
24 #include <linux/iio/buffer.h>
25
26 #include <linux/iio/common/st_sensors.h>
27 #include "st_accel.h"
28
29 #define ST_ACCEL_NUMBER_DATA_CHANNELS 3
30
31 /* DEFAULT VALUE FOR SENSORS */
32 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
33 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
34 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
35
36 /* FULLSCALE */
37 #define ST_ACCEL_FS_AVL_2G 2
38 #define ST_ACCEL_FS_AVL_4G 4
39 #define ST_ACCEL_FS_AVL_6G 6
40 #define ST_ACCEL_FS_AVL_8G 8
41 #define ST_ACCEL_FS_AVL_16G 16
42 #define ST_ACCEL_FS_AVL_100G 100
43 #define ST_ACCEL_FS_AVL_200G 200
44 #define ST_ACCEL_FS_AVL_400G 400
45
46 /* CUSTOM VALUES FOR SENSOR 1 */
47 #define ST_ACCEL_1_WAI_EXP 0x33
48 #define ST_ACCEL_1_ODR_ADDR 0x20
49 #define ST_ACCEL_1_ODR_MASK 0xf0
50 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01
51 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02
52 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03
53 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04
54 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05
55 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06
56 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07
57 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08
58 #define ST_ACCEL_1_FS_ADDR 0x23
59 #define ST_ACCEL_1_FS_MASK 0x30
60 #define ST_ACCEL_1_FS_AVL_2_VAL 0x00
61 #define ST_ACCEL_1_FS_AVL_4_VAL 0x01
62 #define ST_ACCEL_1_FS_AVL_8_VAL 0x02
63 #define ST_ACCEL_1_FS_AVL_16_VAL 0x03
64 #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
65 #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
66 #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000)
67 #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000)
68 #define ST_ACCEL_1_BDU_ADDR 0x23
69 #define ST_ACCEL_1_BDU_MASK 0x80
70 #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22
71 #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10
72 #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08
73 #define ST_ACCEL_1_IHL_IRQ_ADDR 0x25
74 #define ST_ACCEL_1_IHL_IRQ_MASK 0x02
75 #define ST_ACCEL_1_MULTIREAD_BIT true
76
77 /* CUSTOM VALUES FOR SENSOR 2 */
78 #define ST_ACCEL_2_WAI_EXP 0x32
79 #define ST_ACCEL_2_ODR_ADDR 0x20
80 #define ST_ACCEL_2_ODR_MASK 0x18
81 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00
82 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01
83 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02
84 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03
85 #define ST_ACCEL_2_PW_ADDR 0x20
86 #define ST_ACCEL_2_PW_MASK 0xe0
87 #define ST_ACCEL_2_FS_ADDR 0x23
88 #define ST_ACCEL_2_FS_MASK 0x30
89 #define ST_ACCEL_2_FS_AVL_2_VAL 0X00
90 #define ST_ACCEL_2_FS_AVL_4_VAL 0X01
91 #define ST_ACCEL_2_FS_AVL_8_VAL 0x03
92 #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
93 #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
94 #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900)
95 #define ST_ACCEL_2_BDU_ADDR 0x23
96 #define ST_ACCEL_2_BDU_MASK 0x80
97 #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22
98 #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02
99 #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10
100 #define ST_ACCEL_2_IHL_IRQ_ADDR 0x22
101 #define ST_ACCEL_2_IHL_IRQ_MASK 0x80
102 #define ST_ACCEL_2_OD_IRQ_ADDR 0x22
103 #define ST_ACCEL_2_OD_IRQ_MASK 0x40
104 #define ST_ACCEL_2_MULTIREAD_BIT true
105
106 /* CUSTOM VALUES FOR SENSOR 3 */
107 #define ST_ACCEL_3_WAI_EXP 0x40
108 #define ST_ACCEL_3_ODR_ADDR 0x20
109 #define ST_ACCEL_3_ODR_MASK 0xf0
110 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01
111 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02
112 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03
113 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04
114 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05
115 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06
116 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07
117 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08
118 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09
119 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a
120 #define ST_ACCEL_3_FS_ADDR 0x24
121 #define ST_ACCEL_3_FS_MASK 0x38
122 #define ST_ACCEL_3_FS_AVL_2_VAL 0X00
123 #define ST_ACCEL_3_FS_AVL_4_VAL 0X01
124 #define ST_ACCEL_3_FS_AVL_6_VAL 0x02
125 #define ST_ACCEL_3_FS_AVL_8_VAL 0x03
126 #define ST_ACCEL_3_FS_AVL_16_VAL 0x04
127 #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61)
128 #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122)
129 #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183)
130 #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244)
131 #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732)
132 #define ST_ACCEL_3_BDU_ADDR 0x20
133 #define ST_ACCEL_3_BDU_MASK 0x08
134 #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23
135 #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80
136 #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00
137 #define ST_ACCEL_3_IHL_IRQ_ADDR 0x23
138 #define ST_ACCEL_3_IHL_IRQ_MASK 0x40
139 #define ST_ACCEL_3_IG1_EN_ADDR 0x23
140 #define ST_ACCEL_3_IG1_EN_MASK 0x08
141 #define ST_ACCEL_3_MULTIREAD_BIT false
142
143 /* CUSTOM VALUES FOR SENSOR 4 */
144 #define ST_ACCEL_4_WAI_EXP 0x3a
145 #define ST_ACCEL_4_ODR_ADDR 0x20
146 #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */
147 #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00
148 #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01
149 #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02
150 #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03
151 #define ST_ACCEL_4_PW_ADDR 0x20
152 #define ST_ACCEL_4_PW_MASK 0xc0
153 #define ST_ACCEL_4_FS_ADDR 0x21
154 #define ST_ACCEL_4_FS_MASK 0x80
155 #define ST_ACCEL_4_FS_AVL_2_VAL 0X00
156 #define ST_ACCEL_4_FS_AVL_6_VAL 0X01
157 #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
158 #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(3000)
159 #define ST_ACCEL_4_BDU_ADDR 0x21
160 #define ST_ACCEL_4_BDU_MASK 0x40
161 #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
162 #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
163 #define ST_ACCEL_4_MULTIREAD_BIT true
164
165 /* CUSTOM VALUES FOR SENSOR 5 */
166 #define ST_ACCEL_5_WAI_EXP 0x3b
167 #define ST_ACCEL_5_ODR_ADDR 0x20
168 #define ST_ACCEL_5_ODR_MASK 0x80
169 #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
170 #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
171 #define ST_ACCEL_5_PW_ADDR 0x20
172 #define ST_ACCEL_5_PW_MASK 0x40
173 #define ST_ACCEL_5_FS_ADDR 0x20
174 #define ST_ACCEL_5_FS_MASK 0x20
175 #define ST_ACCEL_5_FS_AVL_2_VAL 0X00
176 #define ST_ACCEL_5_FS_AVL_8_VAL 0X01
177 /* TODO: check these resulting gain settings, these are not in the datsheet */
178 #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
179 #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
180 #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
181 #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
182 #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
183 #define ST_ACCEL_5_IHL_IRQ_ADDR 0x22
184 #define ST_ACCEL_5_IHL_IRQ_MASK 0x80
185 #define ST_ACCEL_5_OD_IRQ_ADDR 0x22
186 #define ST_ACCEL_5_OD_IRQ_MASK 0x40
187 #define ST_ACCEL_5_IG1_EN_ADDR 0x21
188 #define ST_ACCEL_5_IG1_EN_MASK 0x08
189 #define ST_ACCEL_5_MULTIREAD_BIT false
190
191 /* CUSTOM VALUES FOR SENSOR 6 */
192 #define ST_ACCEL_6_WAI_EXP 0x32
193 #define ST_ACCEL_6_ODR_ADDR 0x20
194 #define ST_ACCEL_6_ODR_MASK 0x18
195 #define ST_ACCEL_6_ODR_AVL_50HZ_VAL 0x00
196 #define ST_ACCEL_6_ODR_AVL_100HZ_VAL 0x01
197 #define ST_ACCEL_6_ODR_AVL_400HZ_VAL 0x02
198 #define ST_ACCEL_6_ODR_AVL_1000HZ_VAL 0x03
199 #define ST_ACCEL_6_PW_ADDR 0x20
200 #define ST_ACCEL_6_PW_MASK 0x20
201 #define ST_ACCEL_6_FS_ADDR 0x23
202 #define ST_ACCEL_6_FS_MASK 0x30
203 #define ST_ACCEL_6_FS_AVL_100_VAL 0x00
204 #define ST_ACCEL_6_FS_AVL_200_VAL 0x01
205 #define ST_ACCEL_6_FS_AVL_400_VAL 0x03
206 #define ST_ACCEL_6_FS_AVL_100_GAIN IIO_G_TO_M_S_2(49000)
207 #define ST_ACCEL_6_FS_AVL_200_GAIN IIO_G_TO_M_S_2(98000)
208 #define ST_ACCEL_6_FS_AVL_400_GAIN IIO_G_TO_M_S_2(195000)
209 #define ST_ACCEL_6_BDU_ADDR 0x23
210 #define ST_ACCEL_6_BDU_MASK 0x80
211 #define ST_ACCEL_6_DRDY_IRQ_ADDR 0x22
212 #define ST_ACCEL_6_DRDY_IRQ_INT1_MASK 0x02
213 #define ST_ACCEL_6_DRDY_IRQ_INT2_MASK 0x10
214 #define ST_ACCEL_6_IHL_IRQ_ADDR 0x22
215 #define ST_ACCEL_6_IHL_IRQ_MASK 0x80
216 #define ST_ACCEL_6_MULTIREAD_BIT true
217
218 /* CUSTOM VALUES FOR SENSOR 7 */
219 #define ST_ACCEL_7_ODR_ADDR 0x20
220 #define ST_ACCEL_7_ODR_MASK 0x30
221 #define ST_ACCEL_7_ODR_AVL_280HZ_VAL 0x00
222 #define ST_ACCEL_7_ODR_AVL_560HZ_VAL 0x01
223 #define ST_ACCEL_7_ODR_AVL_1120HZ_VAL 0x02
224 #define ST_ACCEL_7_ODR_AVL_4480HZ_VAL 0x03
225 #define ST_ACCEL_7_PW_ADDR 0x20
226 #define ST_ACCEL_7_PW_MASK 0xc0
227 #define ST_ACCEL_7_FS_AVL_2_GAIN IIO_G_TO_M_S_2(488)
228 #define ST_ACCEL_7_BDU_ADDR 0x21
229 #define ST_ACCEL_7_BDU_MASK 0x40
230 #define ST_ACCEL_7_DRDY_IRQ_ADDR 0x21
231 #define ST_ACCEL_7_DRDY_IRQ_INT1_MASK 0x04
232 #define ST_ACCEL_7_MULTIREAD_BIT false
233
234 static const struct iio_chan_spec st_accel_8bit_channels[] = {
235 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
236 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
237 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
238 ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1),
239 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
240 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
241 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
242 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1),
243 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
244 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
245 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
246 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1),
247 IIO_CHAN_SOFT_TIMESTAMP(3)
248 };
249
250 static const struct iio_chan_spec st_accel_12bit_channels[] = {
251 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
252 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
253 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
254 ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
255 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
256 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
257 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
258 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
259 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
260 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
261 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
262 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
263 IIO_CHAN_SOFT_TIMESTAMP(3)
264 };
265
266 static const struct iio_chan_spec st_accel_16bit_channels[] = {
267 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
268 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
269 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
270 ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
271 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
272 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
273 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
274 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
275 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
276 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
277 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
278 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
279 IIO_CHAN_SOFT_TIMESTAMP(3)
280 };
281
282 static const struct st_sensor_settings st_accel_sensors_settings[] = {
283 {
284 .wai = ST_ACCEL_1_WAI_EXP,
285 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
286 .sensors_supported = {
287 [0] = LIS3DH_ACCEL_DEV_NAME,
288 [1] = LSM303DLHC_ACCEL_DEV_NAME,
289 [2] = LSM330D_ACCEL_DEV_NAME,
290 [3] = LSM330DL_ACCEL_DEV_NAME,
291 [4] = LSM330DLC_ACCEL_DEV_NAME,
292 [5] = LSM303AGR_ACCEL_DEV_NAME,
293 [6] = LIS2DH12_ACCEL_DEV_NAME,
294 },
295 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
296 .odr = {
297 .addr = ST_ACCEL_1_ODR_ADDR,
298 .mask = ST_ACCEL_1_ODR_MASK,
299 .odr_avl = {
300 { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, },
301 { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, },
302 { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, },
303 { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, },
304 { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, },
305 { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, },
306 { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, },
307 { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, },
308 },
309 },
310 .pw = {
311 .addr = ST_ACCEL_1_ODR_ADDR,
312 .mask = ST_ACCEL_1_ODR_MASK,
313 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
314 },
315 .enable_axis = {
316 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
317 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
318 },
319 .fs = {
320 .addr = ST_ACCEL_1_FS_ADDR,
321 .mask = ST_ACCEL_1_FS_MASK,
322 .fs_avl = {
323 [0] = {
324 .num = ST_ACCEL_FS_AVL_2G,
325 .value = ST_ACCEL_1_FS_AVL_2_VAL,
326 .gain = ST_ACCEL_1_FS_AVL_2_GAIN,
327 },
328 [1] = {
329 .num = ST_ACCEL_FS_AVL_4G,
330 .value = ST_ACCEL_1_FS_AVL_4_VAL,
331 .gain = ST_ACCEL_1_FS_AVL_4_GAIN,
332 },
333 [2] = {
334 .num = ST_ACCEL_FS_AVL_8G,
335 .value = ST_ACCEL_1_FS_AVL_8_VAL,
336 .gain = ST_ACCEL_1_FS_AVL_8_GAIN,
337 },
338 [3] = {
339 .num = ST_ACCEL_FS_AVL_16G,
340 .value = ST_ACCEL_1_FS_AVL_16_VAL,
341 .gain = ST_ACCEL_1_FS_AVL_16_GAIN,
342 },
343 },
344 },
345 .bdu = {
346 .addr = ST_ACCEL_1_BDU_ADDR,
347 .mask = ST_ACCEL_1_BDU_MASK,
348 },
349 /*
350 * Data Alignment Setting - needs to be set to get
351 * left-justified data like all other sensors.
352 */
353 .das = {
354 .addr = 0x21,
355 .mask = 0x01,
356 },
357 .drdy_irq = {
358 .addr = ST_ACCEL_1_DRDY_IRQ_ADDR,
359 .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK,
360 .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK,
361 .addr_ihl = ST_ACCEL_1_IHL_IRQ_ADDR,
362 .mask_ihl = ST_ACCEL_1_IHL_IRQ_MASK,
363 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
364 },
365 .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT,
366 .bootime = 2,
367 },
368 {
369 .wai = ST_ACCEL_2_WAI_EXP,
370 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
371 .sensors_supported = {
372 [0] = LIS331DLH_ACCEL_DEV_NAME,
373 [1] = LSM303DL_ACCEL_DEV_NAME,
374 [2] = LSM303DLH_ACCEL_DEV_NAME,
375 [3] = LSM303DLM_ACCEL_DEV_NAME,
376 },
377 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
378 .odr = {
379 .addr = ST_ACCEL_2_ODR_ADDR,
380 .mask = ST_ACCEL_2_ODR_MASK,
381 .odr_avl = {
382 { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, },
383 { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, },
384 { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, },
385 { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, },
386 },
387 },
388 .pw = {
389 .addr = ST_ACCEL_2_PW_ADDR,
390 .mask = ST_ACCEL_2_PW_MASK,
391 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
392 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
393 },
394 .enable_axis = {
395 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
396 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
397 },
398 .fs = {
399 .addr = ST_ACCEL_2_FS_ADDR,
400 .mask = ST_ACCEL_2_FS_MASK,
401 .fs_avl = {
402 [0] = {
403 .num = ST_ACCEL_FS_AVL_2G,
404 .value = ST_ACCEL_2_FS_AVL_2_VAL,
405 .gain = ST_ACCEL_2_FS_AVL_2_GAIN,
406 },
407 [1] = {
408 .num = ST_ACCEL_FS_AVL_4G,
409 .value = ST_ACCEL_2_FS_AVL_4_VAL,
410 .gain = ST_ACCEL_2_FS_AVL_4_GAIN,
411 },
412 [2] = {
413 .num = ST_ACCEL_FS_AVL_8G,
414 .value = ST_ACCEL_2_FS_AVL_8_VAL,
415 .gain = ST_ACCEL_2_FS_AVL_8_GAIN,
416 },
417 },
418 },
419 .bdu = {
420 .addr = ST_ACCEL_2_BDU_ADDR,
421 .mask = ST_ACCEL_2_BDU_MASK,
422 },
423 .drdy_irq = {
424 .addr = ST_ACCEL_2_DRDY_IRQ_ADDR,
425 .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK,
426 .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK,
427 .addr_ihl = ST_ACCEL_2_IHL_IRQ_ADDR,
428 .mask_ihl = ST_ACCEL_2_IHL_IRQ_MASK,
429 .addr_od = ST_ACCEL_2_OD_IRQ_ADDR,
430 .mask_od = ST_ACCEL_2_OD_IRQ_MASK,
431 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
432 },
433 .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT,
434 .bootime = 2,
435 },
436 {
437 .wai = ST_ACCEL_3_WAI_EXP,
438 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
439 .sensors_supported = {
440 [0] = LSM330_ACCEL_DEV_NAME,
441 },
442 .ch = (struct iio_chan_spec *)st_accel_16bit_channels,
443 .odr = {
444 .addr = ST_ACCEL_3_ODR_ADDR,
445 .mask = ST_ACCEL_3_ODR_MASK,
446 .odr_avl = {
447 { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL },
448 { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, },
449 { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, },
450 { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, },
451 { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, },
452 { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, },
453 { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, },
454 { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, },
455 { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, },
456 { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, },
457 },
458 },
459 .pw = {
460 .addr = ST_ACCEL_3_ODR_ADDR,
461 .mask = ST_ACCEL_3_ODR_MASK,
462 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
463 },
464 .enable_axis = {
465 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
466 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
467 },
468 .fs = {
469 .addr = ST_ACCEL_3_FS_ADDR,
470 .mask = ST_ACCEL_3_FS_MASK,
471 .fs_avl = {
472 [0] = {
473 .num = ST_ACCEL_FS_AVL_2G,
474 .value = ST_ACCEL_3_FS_AVL_2_VAL,
475 .gain = ST_ACCEL_3_FS_AVL_2_GAIN,
476 },
477 [1] = {
478 .num = ST_ACCEL_FS_AVL_4G,
479 .value = ST_ACCEL_3_FS_AVL_4_VAL,
480 .gain = ST_ACCEL_3_FS_AVL_4_GAIN,
481 },
482 [2] = {
483 .num = ST_ACCEL_FS_AVL_6G,
484 .value = ST_ACCEL_3_FS_AVL_6_VAL,
485 .gain = ST_ACCEL_3_FS_AVL_6_GAIN,
486 },
487 [3] = {
488 .num = ST_ACCEL_FS_AVL_8G,
489 .value = ST_ACCEL_3_FS_AVL_8_VAL,
490 .gain = ST_ACCEL_3_FS_AVL_8_GAIN,
491 },
492 [4] = {
493 .num = ST_ACCEL_FS_AVL_16G,
494 .value = ST_ACCEL_3_FS_AVL_16_VAL,
495 .gain = ST_ACCEL_3_FS_AVL_16_GAIN,
496 },
497 },
498 },
499 .bdu = {
500 .addr = ST_ACCEL_3_BDU_ADDR,
501 .mask = ST_ACCEL_3_BDU_MASK,
502 },
503 .drdy_irq = {
504 .addr = ST_ACCEL_3_DRDY_IRQ_ADDR,
505 .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK,
506 .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK,
507 .addr_ihl = ST_ACCEL_3_IHL_IRQ_ADDR,
508 .mask_ihl = ST_ACCEL_3_IHL_IRQ_MASK,
509 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
510 .ig1 = {
511 .en_addr = ST_ACCEL_3_IG1_EN_ADDR,
512 .en_mask = ST_ACCEL_3_IG1_EN_MASK,
513 },
514 },
515 .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
516 .bootime = 2,
517 },
518 {
519 .wai = ST_ACCEL_4_WAI_EXP,
520 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
521 .sensors_supported = {
522 [0] = LIS3LV02DL_ACCEL_DEV_NAME,
523 },
524 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
525 .odr = {
526 .addr = ST_ACCEL_4_ODR_ADDR,
527 .mask = ST_ACCEL_4_ODR_MASK,
528 .odr_avl = {
529 { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
530 { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
531 { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
532 { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
533 },
534 },
535 .pw = {
536 .addr = ST_ACCEL_4_PW_ADDR,
537 .mask = ST_ACCEL_4_PW_MASK,
538 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
539 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
540 },
541 .enable_axis = {
542 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
543 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
544 },
545 .fs = {
546 .addr = ST_ACCEL_4_FS_ADDR,
547 .mask = ST_ACCEL_4_FS_MASK,
548 .fs_avl = {
549 [0] = {
550 .num = ST_ACCEL_FS_AVL_2G,
551 .value = ST_ACCEL_4_FS_AVL_2_VAL,
552 .gain = ST_ACCEL_4_FS_AVL_2_GAIN,
553 },
554 [1] = {
555 .num = ST_ACCEL_FS_AVL_6G,
556 .value = ST_ACCEL_4_FS_AVL_6_VAL,
557 .gain = ST_ACCEL_4_FS_AVL_6_GAIN,
558 },
559 },
560 },
561 .bdu = {
562 .addr = ST_ACCEL_4_BDU_ADDR,
563 .mask = ST_ACCEL_4_BDU_MASK,
564 },
565 .drdy_irq = {
566 .addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
567 .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
568 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
569 },
570 .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
571 .bootime = 2, /* guess */
572 },
573 {
574 .wai = ST_ACCEL_5_WAI_EXP,
575 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
576 .sensors_supported = {
577 [0] = LIS331DL_ACCEL_DEV_NAME,
578 },
579 .ch = (struct iio_chan_spec *)st_accel_8bit_channels,
580 .odr = {
581 .addr = ST_ACCEL_5_ODR_ADDR,
582 .mask = ST_ACCEL_5_ODR_MASK,
583 .odr_avl = {
584 { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
585 { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
586 },
587 },
588 .pw = {
589 .addr = ST_ACCEL_5_PW_ADDR,
590 .mask = ST_ACCEL_5_PW_MASK,
591 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
592 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
593 },
594 .enable_axis = {
595 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
596 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
597 },
598 .fs = {
599 .addr = ST_ACCEL_5_FS_ADDR,
600 .mask = ST_ACCEL_5_FS_MASK,
601 .fs_avl = {
602 [0] = {
603 .num = ST_ACCEL_FS_AVL_2G,
604 .value = ST_ACCEL_5_FS_AVL_2_VAL,
605 .gain = ST_ACCEL_5_FS_AVL_2_GAIN,
606 },
607 [1] = {
608 .num = ST_ACCEL_FS_AVL_8G,
609 .value = ST_ACCEL_5_FS_AVL_8_VAL,
610 .gain = ST_ACCEL_5_FS_AVL_8_GAIN,
611 },
612 },
613 },
614 .drdy_irq = {
615 .addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
616 .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
617 .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
618 .addr_ihl = ST_ACCEL_5_IHL_IRQ_ADDR,
619 .mask_ihl = ST_ACCEL_5_IHL_IRQ_MASK,
620 .addr_od = ST_ACCEL_5_OD_IRQ_ADDR,
621 .mask_od = ST_ACCEL_5_OD_IRQ_MASK,
622 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
623 },
624 .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
625 .bootime = 2, /* guess */
626 },
627 {
628 .wai = ST_ACCEL_6_WAI_EXP,
629 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
630 .sensors_supported = {
631 [0] = H3LIS331DL_DRIVER_NAME,
632 },
633 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
634 .odr = {
635 .addr = ST_ACCEL_6_ODR_ADDR,
636 .mask = ST_ACCEL_6_ODR_MASK,
637 .odr_avl = {
638 { 50, ST_ACCEL_6_ODR_AVL_50HZ_VAL },
639 { 100, ST_ACCEL_6_ODR_AVL_100HZ_VAL, },
640 { 400, ST_ACCEL_6_ODR_AVL_400HZ_VAL, },
641 { 1000, ST_ACCEL_6_ODR_AVL_1000HZ_VAL, },
642 },
643 },
644 .pw = {
645 .addr = ST_ACCEL_6_PW_ADDR,
646 .mask = ST_ACCEL_6_PW_MASK,
647 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
648 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
649 },
650 .enable_axis = {
651 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
652 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
653 },
654 .fs = {
655 .addr = ST_ACCEL_6_FS_ADDR,
656 .mask = ST_ACCEL_6_FS_MASK,
657 .fs_avl = {
658 [0] = {
659 .num = ST_ACCEL_FS_AVL_100G,
660 .value = ST_ACCEL_6_FS_AVL_100_VAL,
661 .gain = ST_ACCEL_6_FS_AVL_100_GAIN,
662 },
663 [1] = {
664 .num = ST_ACCEL_FS_AVL_200G,
665 .value = ST_ACCEL_6_FS_AVL_200_VAL,
666 .gain = ST_ACCEL_6_FS_AVL_200_GAIN,
667 },
668 [2] = {
669 .num = ST_ACCEL_FS_AVL_400G,
670 .value = ST_ACCEL_6_FS_AVL_400_VAL,
671 .gain = ST_ACCEL_6_FS_AVL_400_GAIN,
672 },
673 },
674 },
675 .bdu = {
676 .addr = ST_ACCEL_6_BDU_ADDR,
677 .mask = ST_ACCEL_6_BDU_MASK,
678 },
679 .drdy_irq = {
680 .addr = ST_ACCEL_6_DRDY_IRQ_ADDR,
681 .mask_int1 = ST_ACCEL_6_DRDY_IRQ_INT1_MASK,
682 .mask_int2 = ST_ACCEL_6_DRDY_IRQ_INT2_MASK,
683 .addr_ihl = ST_ACCEL_6_IHL_IRQ_ADDR,
684 .mask_ihl = ST_ACCEL_6_IHL_IRQ_MASK,
685 },
686 .multi_read_bit = ST_ACCEL_6_MULTIREAD_BIT,
687 .bootime = 2,
688 },
689 {
690 /* No WAI register present */
691 .sensors_supported = {
692 [0] = LIS3L02DQ_ACCEL_DEV_NAME,
693 },
694 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
695 .odr = {
696 .addr = ST_ACCEL_7_ODR_ADDR,
697 .mask = ST_ACCEL_7_ODR_MASK,
698 .odr_avl = {
699 { 280, ST_ACCEL_7_ODR_AVL_280HZ_VAL, },
700 { 560, ST_ACCEL_7_ODR_AVL_560HZ_VAL, },
701 { 1120, ST_ACCEL_7_ODR_AVL_1120HZ_VAL, },
702 { 4480, ST_ACCEL_7_ODR_AVL_4480HZ_VAL, },
703 },
704 },
705 .pw = {
706 .addr = ST_ACCEL_7_PW_ADDR,
707 .mask = ST_ACCEL_7_PW_MASK,
708 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
709 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
710 },
711 .enable_axis = {
712 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
713 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
714 },
715 .fs = {
716 .fs_avl = {
717 [0] = {
718 .num = ST_ACCEL_FS_AVL_2G,
719 .gain = ST_ACCEL_7_FS_AVL_2_GAIN,
720 },
721 },
722 },
723 /*
724 * The part has a BDU bit but if set the data is never
725 * updated so don't set it.
726 */
727 .bdu = {
728 },
729 .drdy_irq = {
730 .addr = ST_ACCEL_7_DRDY_IRQ_ADDR,
731 .mask_int1 = ST_ACCEL_7_DRDY_IRQ_INT1_MASK,
732 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
733 },
734 .multi_read_bit = ST_ACCEL_7_MULTIREAD_BIT,
735 .bootime = 2,
736 },
737 };
738
st_accel_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)739 static int st_accel_read_raw(struct iio_dev *indio_dev,
740 struct iio_chan_spec const *ch, int *val,
741 int *val2, long mask)
742 {
743 int err;
744 struct st_sensor_data *adata = iio_priv(indio_dev);
745
746 switch (mask) {
747 case IIO_CHAN_INFO_RAW:
748 err = st_sensors_read_info_raw(indio_dev, ch, val);
749 if (err < 0)
750 goto read_error;
751
752 return IIO_VAL_INT;
753 case IIO_CHAN_INFO_SCALE:
754 *val = adata->current_fullscale->gain / 1000000;
755 *val2 = adata->current_fullscale->gain % 1000000;
756 return IIO_VAL_INT_PLUS_MICRO;
757 case IIO_CHAN_INFO_SAMP_FREQ:
758 *val = adata->odr;
759 return IIO_VAL_INT;
760 default:
761 return -EINVAL;
762 }
763
764 read_error:
765 return err;
766 }
767
st_accel_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)768 static int st_accel_write_raw(struct iio_dev *indio_dev,
769 struct iio_chan_spec const *chan, int val, int val2, long mask)
770 {
771 int err;
772
773 switch (mask) {
774 case IIO_CHAN_INFO_SCALE: {
775 int gain;
776
777 gain = val * 1000000 + val2;
778 err = st_sensors_set_fullscale_by_gain(indio_dev, gain);
779 break;
780 }
781 case IIO_CHAN_INFO_SAMP_FREQ:
782 if (val2)
783 return -EINVAL;
784 mutex_lock(&indio_dev->mlock);
785 err = st_sensors_set_odr(indio_dev, val);
786 mutex_unlock(&indio_dev->mlock);
787 return err;
788 default:
789 return -EINVAL;
790 }
791
792 return err;
793 }
794
795 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
796 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
797
798 static struct attribute *st_accel_attributes[] = {
799 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
800 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
801 NULL,
802 };
803
804 static const struct attribute_group st_accel_attribute_group = {
805 .attrs = st_accel_attributes,
806 };
807
808 static const struct iio_info accel_info = {
809 .driver_module = THIS_MODULE,
810 .attrs = &st_accel_attribute_group,
811 .read_raw = &st_accel_read_raw,
812 .write_raw = &st_accel_write_raw,
813 .debugfs_reg_access = &st_sensors_debugfs_reg_access,
814 };
815
816 #ifdef CONFIG_IIO_TRIGGER
817 static const struct iio_trigger_ops st_accel_trigger_ops = {
818 .owner = THIS_MODULE,
819 .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
820 .validate_device = st_sensors_validate_device,
821 };
822 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
823 #else
824 #define ST_ACCEL_TRIGGER_OPS NULL
825 #endif
826
st_accel_common_probe(struct iio_dev * indio_dev)827 int st_accel_common_probe(struct iio_dev *indio_dev)
828 {
829 struct st_sensor_data *adata = iio_priv(indio_dev);
830 struct st_sensors_platform_data *pdata =
831 (struct st_sensors_platform_data *)adata->dev->platform_data;
832 int irq = adata->get_irq_data_ready(indio_dev);
833 int err;
834
835 indio_dev->modes = INDIO_DIRECT_MODE;
836 indio_dev->info = &accel_info;
837 mutex_init(&adata->tb.buf_lock);
838
839 err = st_sensors_power_enable(indio_dev);
840 if (err)
841 return err;
842
843 err = st_sensors_check_device_support(indio_dev,
844 ARRAY_SIZE(st_accel_sensors_settings),
845 st_accel_sensors_settings);
846 if (err < 0)
847 goto st_accel_power_off;
848
849 adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
850 adata->multiread_bit = adata->sensor_settings->multi_read_bit;
851 indio_dev->channels = adata->sensor_settings->ch;
852 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
853
854 adata->current_fullscale = (struct st_sensor_fullscale_avl *)
855 &adata->sensor_settings->fs.fs_avl[0];
856 adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
857
858 if (!pdata)
859 pdata = (struct st_sensors_platform_data *)&default_accel_pdata;
860
861 err = st_sensors_init_sensor(indio_dev, pdata);
862 if (err < 0)
863 goto st_accel_power_off;
864
865 err = st_accel_allocate_ring(indio_dev);
866 if (err < 0)
867 goto st_accel_power_off;
868
869 if (irq > 0) {
870 err = st_sensors_allocate_trigger(indio_dev,
871 ST_ACCEL_TRIGGER_OPS);
872 if (err < 0)
873 goto st_accel_probe_trigger_error;
874 }
875
876 err = iio_device_register(indio_dev);
877 if (err)
878 goto st_accel_device_register_error;
879
880 dev_info(&indio_dev->dev, "registered accelerometer %s\n",
881 indio_dev->name);
882
883 return 0;
884
885 st_accel_device_register_error:
886 if (irq > 0)
887 st_sensors_deallocate_trigger(indio_dev);
888 st_accel_probe_trigger_error:
889 st_accel_deallocate_ring(indio_dev);
890 st_accel_power_off:
891 st_sensors_power_disable(indio_dev);
892
893 return err;
894 }
895 EXPORT_SYMBOL(st_accel_common_probe);
896
st_accel_common_remove(struct iio_dev * indio_dev)897 void st_accel_common_remove(struct iio_dev *indio_dev)
898 {
899 struct st_sensor_data *adata = iio_priv(indio_dev);
900
901 st_sensors_power_disable(indio_dev);
902
903 iio_device_unregister(indio_dev);
904 if (adata->get_irq_data_ready(indio_dev) > 0)
905 st_sensors_deallocate_trigger(indio_dev);
906
907 st_accel_deallocate_ring(indio_dev);
908 }
909 EXPORT_SYMBOL(st_accel_common_remove);
910
911 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
912 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
913 MODULE_LICENSE("GPL v2");
914