1 /*
2 * OF helpers for IOMMU
3 *
4 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 */
19
20 #include <linux/export.h>
21 #include <linux/iommu.h>
22 #include <linux/limits.h>
23 #include <linux/of.h>
24 #include <linux/of_iommu.h>
25 #include <linux/of_pci.h>
26 #include <linux/slab.h>
27
28 static const struct of_device_id __iommu_of_table_sentinel
29 __used __section(__iommu_of_table_end);
30
31 /**
32 * of_get_dma_window - Parse *dma-window property and returns 0 if found.
33 *
34 * @dn: device node
35 * @prefix: prefix for property name if any
36 * @index: index to start to parse
37 * @busno: Returns busno if supported. Otherwise pass NULL
38 * @addr: Returns address that DMA starts
39 * @size: Returns the range that DMA can handle
40 *
41 * This supports different formats flexibly. "prefix" can be
42 * configured if any. "busno" and "index" are optionally
43 * specified. Set 0(or NULL) if not used.
44 */
of_get_dma_window(struct device_node * dn,const char * prefix,int index,unsigned long * busno,dma_addr_t * addr,size_t * size)45 int of_get_dma_window(struct device_node *dn, const char *prefix, int index,
46 unsigned long *busno, dma_addr_t *addr, size_t *size)
47 {
48 const __be32 *dma_window, *end;
49 int bytes, cur_index = 0;
50 char propname[NAME_MAX], addrname[NAME_MAX], sizename[NAME_MAX];
51
52 if (!dn || !addr || !size)
53 return -EINVAL;
54
55 if (!prefix)
56 prefix = "";
57
58 snprintf(propname, sizeof(propname), "%sdma-window", prefix);
59 snprintf(addrname, sizeof(addrname), "%s#dma-address-cells", prefix);
60 snprintf(sizename, sizeof(sizename), "%s#dma-size-cells", prefix);
61
62 dma_window = of_get_property(dn, propname, &bytes);
63 if (!dma_window)
64 return -ENODEV;
65 end = dma_window + bytes / sizeof(*dma_window);
66
67 while (dma_window < end) {
68 u32 cells;
69 const void *prop;
70
71 /* busno is one cell if supported */
72 if (busno)
73 *busno = be32_to_cpup(dma_window++);
74
75 prop = of_get_property(dn, addrname, NULL);
76 if (!prop)
77 prop = of_get_property(dn, "#address-cells", NULL);
78
79 cells = prop ? be32_to_cpup(prop) : of_n_addr_cells(dn);
80 if (!cells)
81 return -EINVAL;
82 *addr = of_read_number(dma_window, cells);
83 dma_window += cells;
84
85 prop = of_get_property(dn, sizename, NULL);
86 cells = prop ? be32_to_cpup(prop) : of_n_size_cells(dn);
87 if (!cells)
88 return -EINVAL;
89 *size = of_read_number(dma_window, cells);
90 dma_window += cells;
91
92 if (cur_index++ == index)
93 break;
94 }
95 return 0;
96 }
97 EXPORT_SYMBOL_GPL(of_get_dma_window);
98
99 struct of_iommu_node {
100 struct list_head list;
101 struct device_node *np;
102 const struct iommu_ops *ops;
103 };
104 static LIST_HEAD(of_iommu_list);
105 static DEFINE_SPINLOCK(of_iommu_lock);
106
of_iommu_set_ops(struct device_node * np,const struct iommu_ops * ops)107 void of_iommu_set_ops(struct device_node *np, const struct iommu_ops *ops)
108 {
109 struct of_iommu_node *iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
110
111 if (WARN_ON(!iommu))
112 return;
113
114 of_node_get(np);
115 INIT_LIST_HEAD(&iommu->list);
116 iommu->np = np;
117 iommu->ops = ops;
118 spin_lock(&of_iommu_lock);
119 list_add_tail(&iommu->list, &of_iommu_list);
120 spin_unlock(&of_iommu_lock);
121 }
122
of_iommu_get_ops(struct device_node * np)123 const struct iommu_ops *of_iommu_get_ops(struct device_node *np)
124 {
125 struct of_iommu_node *node;
126 const struct iommu_ops *ops = NULL;
127
128 spin_lock(&of_iommu_lock);
129 list_for_each_entry(node, &of_iommu_list, list)
130 if (node->np == np) {
131 ops = node->ops;
132 break;
133 }
134 spin_unlock(&of_iommu_lock);
135 return ops;
136 }
137
__get_pci_rid(struct pci_dev * pdev,u16 alias,void * data)138 static int __get_pci_rid(struct pci_dev *pdev, u16 alias, void *data)
139 {
140 struct of_phandle_args *iommu_spec = data;
141
142 iommu_spec->args[0] = alias;
143 return iommu_spec->np == pdev->bus->dev.of_node;
144 }
145
146 static const struct iommu_ops
of_pci_iommu_configure(struct pci_dev * pdev,struct device_node * bridge_np)147 *of_pci_iommu_configure(struct pci_dev *pdev, struct device_node *bridge_np)
148 {
149 const struct iommu_ops *ops;
150 struct of_phandle_args iommu_spec;
151
152 /*
153 * Start by tracing the RID alias down the PCI topology as
154 * far as the host bridge whose OF node we have...
155 * (we're not even attempting to handle multi-alias devices yet)
156 */
157 iommu_spec.args_count = 1;
158 iommu_spec.np = bridge_np;
159 pci_for_each_dma_alias(pdev, __get_pci_rid, &iommu_spec);
160 /*
161 * ...then find out what that becomes once it escapes the PCI
162 * bus into the system beyond, and which IOMMU it ends up at.
163 */
164 iommu_spec.np = NULL;
165 if (of_pci_map_rid(bridge_np, iommu_spec.args[0], "iommu-map",
166 "iommu-map-mask", &iommu_spec.np, iommu_spec.args))
167 return NULL;
168
169 ops = of_iommu_get_ops(iommu_spec.np);
170 if (!ops || !ops->of_xlate ||
171 iommu_fwspec_init(&pdev->dev, &iommu_spec.np->fwnode, ops) ||
172 ops->of_xlate(&pdev->dev, &iommu_spec))
173 ops = NULL;
174
175 of_node_put(iommu_spec.np);
176 return ops;
177 }
178
of_iommu_configure(struct device * dev,struct device_node * master_np)179 const struct iommu_ops *of_iommu_configure(struct device *dev,
180 struct device_node *master_np)
181 {
182 struct of_phandle_args iommu_spec;
183 struct device_node *np;
184 const struct iommu_ops *ops = NULL;
185 int idx = 0;
186
187 if (dev_is_pci(dev))
188 return of_pci_iommu_configure(to_pci_dev(dev), master_np);
189
190 /*
191 * We don't currently walk up the tree looking for a parent IOMMU.
192 * See the `Notes:' section of
193 * Documentation/devicetree/bindings/iommu/iommu.txt
194 */
195 while (!of_parse_phandle_with_args(master_np, "iommus",
196 "#iommu-cells", idx,
197 &iommu_spec)) {
198 np = iommu_spec.np;
199 ops = of_iommu_get_ops(np);
200
201 if (!ops || !ops->of_xlate ||
202 iommu_fwspec_init(dev, &np->fwnode, ops) ||
203 ops->of_xlate(dev, &iommu_spec))
204 goto err_put_node;
205
206 of_node_put(np);
207 idx++;
208 }
209
210 return ops;
211
212 err_put_node:
213 of_node_put(np);
214 return NULL;
215 }
216
of_iommu_init(void)217 static int __init of_iommu_init(void)
218 {
219 struct device_node *np;
220 const struct of_device_id *match, *matches = &__iommu_of_table;
221
222 for_each_matching_node_and_match(np, matches, &match) {
223 const of_iommu_init_fn init_fn = match->data;
224
225 if (init_fn(np))
226 pr_err("Failed to initialise IOMMU %s\n",
227 of_node_full_name(np));
228 }
229
230 return 0;
231 }
232 postcore_initcall_sync(of_iommu_init);
233