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1 /*
2  * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
3  *
4  * Original author:
5  * Ben Collins <bcollins@ubuntu.com>
6  *
7  * Additional work by:
8  * John Brooks <john.brooks@bluecherry.net>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  */
20 
21 #ifndef __SOLO6X10_H
22 #define __SOLO6X10_H
23 
24 #include <linux/pci.h>
25 #include <linux/i2c.h>
26 #include <linux/mutex.h>
27 #include <linux/list.h>
28 #include <linux/wait.h>
29 #include <linux/stringify.h>
30 #include <linux/io.h>
31 #include <linux/atomic.h>
32 #include <linux/slab.h>
33 #include <linux/videodev2.h>
34 
35 #include <media/v4l2-dev.h>
36 #include <media/v4l2-device.h>
37 #include <media/v4l2-ctrls.h>
38 #include <media/videobuf2-v4l2.h>
39 
40 #include "solo6x10-regs.h"
41 
42 #ifndef PCI_VENDOR_ID_SOFTLOGIC
43 #define PCI_VENDOR_ID_SOFTLOGIC		0x9413
44 #define PCI_DEVICE_ID_SOLO6010		0x6010
45 #define PCI_DEVICE_ID_SOLO6110		0x6110
46 #endif
47 
48 #ifndef PCI_VENDOR_ID_BLUECHERRY
49 #define PCI_VENDOR_ID_BLUECHERRY	0x1BB3
50 /* Neugent Softlogic 6010 based cards */
51 #define PCI_DEVICE_ID_NEUSOLO_4		0x4304
52 #define PCI_DEVICE_ID_NEUSOLO_9		0x4309
53 #define PCI_DEVICE_ID_NEUSOLO_16	0x4310
54 /* Bluecherry Softlogic 6010 based cards */
55 #define PCI_DEVICE_ID_BC_SOLO_4		0x4E04
56 #define PCI_DEVICE_ID_BC_SOLO_9		0x4E09
57 #define PCI_DEVICE_ID_BC_SOLO_16	0x4E10
58 /* Bluecherry Softlogic 6110 based cards */
59 #define PCI_DEVICE_ID_BC_6110_4		0x5304
60 #define PCI_DEVICE_ID_BC_6110_8		0x5308
61 #define PCI_DEVICE_ID_BC_6110_16	0x5310
62 #endif /* Bluecherry */
63 
64 /* Used in pci_device_id, and solo_dev->type */
65 #define SOLO_DEV_6010			0
66 #define SOLO_DEV_6110			1
67 
68 #define SOLO6X10_NAME			"solo6x10"
69 
70 #define SOLO_MAX_CHANNELS		16
71 
72 #define SOLO6X10_VERSION		"3.0.0"
73 
74 /*
75  * The SOLO6x10 actually has 8 i2c channels, but we only use 2.
76  * 0 - Techwell chip(s)
77  * 1 - SAA7128
78  */
79 #define SOLO_I2C_ADAPTERS		2
80 #define SOLO_I2C_TW			0
81 #define SOLO_I2C_SAA			1
82 
83 /* DMA Engine setup */
84 #define SOLO_NR_P2M			4
85 #define SOLO_NR_P2M_DESC		256
86 #define SOLO_P2M_DESC_SIZE		(SOLO_NR_P2M_DESC * 16)
87 
88 /* Encoder standard modes */
89 #define SOLO_ENC_MODE_CIF		2
90 #define SOLO_ENC_MODE_HD1		1
91 #define SOLO_ENC_MODE_D1		9
92 
93 #define SOLO_DEFAULT_QP			3
94 
95 #define SOLO_CID_CUSTOM_BASE		(V4L2_CID_USER_BASE | 0xf000)
96 #define V4L2_CID_MOTION_TRACE		(SOLO_CID_CUSTOM_BASE+2)
97 #define V4L2_CID_OSD_TEXT		(SOLO_CID_CUSTOM_BASE+3)
98 
99 /*
100  * Motion thresholds are in a table of 64x64 samples, with
101  * each sample representing 16x16 pixels of the source. In
102  * effect, 44x30 samples are used for NTSC, and 44x36 for PAL.
103  * The 5th sample on the 10th row is (10*64)+5 = 645.
104  *
105  * Internally it is stored as a 45x45 array (45*16 = 720, which is the
106  * maximum PAL/NTSC width).
107  */
108 #define SOLO_MOTION_SZ (45)
109 
110 enum SOLO_I2C_STATE {
111 	IIC_STATE_IDLE,
112 	IIC_STATE_START,
113 	IIC_STATE_READ,
114 	IIC_STATE_WRITE,
115 	IIC_STATE_STOP
116 };
117 
118 /* Defined in Table 4-16, Page 68-69 of the 6010 Datasheet */
119 struct solo_p2m_desc {
120 	u32	ctrl;
121 	u32	cfg;
122 	u32	dma_addr;
123 	u32	ext_addr;
124 };
125 
126 struct solo_p2m_dev {
127 	struct mutex		mutex;
128 	struct completion	completion;
129 	int			desc_count;
130 	int			desc_idx;
131 	struct solo_p2m_desc	*descs;
132 	int			error;
133 };
134 
135 #define OSD_TEXT_MAX		44
136 
137 struct solo_vb2_buf {
138 	struct vb2_v4l2_buffer vb;
139 	struct list_head list;
140 };
141 
142 enum solo_enc_types {
143 	SOLO_ENC_TYPE_STD,
144 	SOLO_ENC_TYPE_EXT,
145 };
146 
147 struct solo_enc_dev {
148 	struct solo_dev	*solo_dev;
149 	/* V4L2 Items */
150 	struct v4l2_ctrl_handler hdl;
151 	struct v4l2_ctrl *md_thresholds;
152 	struct video_device	*vfd;
153 	/* General accounting */
154 	struct mutex		lock;
155 	spinlock_t		motion_lock;
156 	u8			ch;
157 	u8			mode, gop, qp, interlaced, interval;
158 	u8			bw_weight;
159 	u16			motion_thresh;
160 	bool			motion_global;
161 	bool			motion_enabled;
162 	u16			width;
163 	u16			height;
164 
165 	/* OSD buffers */
166 	char			osd_text[OSD_TEXT_MAX + 1];
167 	u8			osd_buf[SOLO_EOSD_EXT_SIZE_MAX]
168 					__aligned(4);
169 
170 	/* VOP stuff */
171 	u8			vop[64];
172 	int			vop_len;
173 	u8			jpeg_header[1024];
174 	int			jpeg_len;
175 
176 	u32			fmt;
177 	enum solo_enc_types	type;
178 	u32			sequence;
179 	struct vb2_queue	vidq;
180 	struct list_head	vidq_active;
181 	int			desc_count;
182 	int			desc_nelts;
183 	struct solo_p2m_desc	*desc_items;
184 	dma_addr_t		desc_dma;
185 	spinlock_t		av_lock;
186 };
187 
188 /* The SOLO6x10 PCI Device */
189 struct solo_dev {
190 	/* General stuff */
191 	struct pci_dev		*pdev;
192 	int			type;
193 	unsigned int		time_sync;
194 	unsigned int		usec_lsb;
195 	unsigned int		clock_mhz;
196 	u8 __iomem		*reg_base;
197 	int			nr_chans;
198 	int			nr_ext;
199 	u32			irq_mask;
200 	u32			motion_mask;
201 	struct v4l2_device	v4l2_dev;
202 
203 	/* tw28xx accounting */
204 	u8			tw2865, tw2864, tw2815;
205 	u8			tw28_cnt;
206 
207 	/* i2c related items */
208 	struct i2c_adapter	i2c_adap[SOLO_I2C_ADAPTERS];
209 	enum SOLO_I2C_STATE	i2c_state;
210 	struct mutex		i2c_mutex;
211 	int			i2c_id;
212 	wait_queue_head_t	i2c_wait;
213 	struct i2c_msg		*i2c_msg;
214 	unsigned int		i2c_msg_num;
215 	unsigned int		i2c_msg_ptr;
216 
217 	/* P2M DMA Engine */
218 	struct solo_p2m_dev	p2m_dev[SOLO_NR_P2M];
219 	atomic_t		p2m_count;
220 	int			p2m_jiffies;
221 	unsigned int		p2m_timeouts;
222 
223 	/* V4L2 Display items */
224 	struct video_device	*vfd;
225 	unsigned int		erasing;
226 	unsigned int		frame_blank;
227 	u8			cur_disp_ch;
228 	wait_queue_head_t	disp_thread_wait;
229 	struct v4l2_ctrl_handler disp_hdl;
230 
231 	/* V4L2 Encoder items */
232 	struct solo_enc_dev	*v4l2_enc[SOLO_MAX_CHANNELS];
233 	u16			enc_bw_remain;
234 	/* IDX into hw mp4 encoder */
235 	u8			enc_idx;
236 
237 	/* Current video settings */
238 	u32			video_type;
239 	u16			video_hsize, video_vsize;
240 	u16			vout_hstart, vout_vstart;
241 	u16			vin_hstart, vin_vstart;
242 	u8			fps;
243 
244 	/* JPEG Qp setting */
245 	spinlock_t      jpeg_qp_lock;
246 	u32		jpeg_qp[2];
247 
248 	/* Audio components */
249 	struct snd_card		*snd_card;
250 	struct snd_pcm		*snd_pcm;
251 	atomic_t		snd_users;
252 	int			g723_hw_idx;
253 
254 	/* sysfs stuffs */
255 	struct device		dev;
256 	int			sdram_size;
257 	struct bin_attribute	sdram_attr;
258 	unsigned int		sys_config;
259 
260 	/* Ring thread */
261 	struct task_struct	*ring_thread;
262 	wait_queue_head_t	ring_thread_wait;
263 
264 	/* VOP_HEADER handling */
265 	void                    *vh_buf;
266 	dma_addr_t		vh_dma;
267 	int			vh_size;
268 
269 	/* Buffer handling */
270 	struct vb2_queue	vidq;
271 	u32			sequence;
272 	struct task_struct      *kthread;
273 	struct mutex		lock;
274 	spinlock_t		slock;
275 	int			old_write;
276 	struct list_head	vidq_active;
277 };
278 
solo_reg_read(struct solo_dev * solo_dev,int reg)279 static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
280 {
281 	return readl(solo_dev->reg_base + reg);
282 }
283 
solo_reg_write(struct solo_dev * solo_dev,int reg,u32 data)284 static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
285 				  u32 data)
286 {
287 	u16 val;
288 
289 	writel(data, solo_dev->reg_base + reg);
290 	pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
291 }
292 
solo_irq_on(struct solo_dev * dev,u32 mask)293 static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
294 {
295 	dev->irq_mask |= mask;
296 	solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
297 }
298 
solo_irq_off(struct solo_dev * dev,u32 mask)299 static inline void solo_irq_off(struct solo_dev *dev, u32 mask)
300 {
301 	dev->irq_mask &= ~mask;
302 	solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
303 }
304 
305 /* Init/exit routines for subsystems */
306 int solo_disp_init(struct solo_dev *solo_dev);
307 void solo_disp_exit(struct solo_dev *solo_dev);
308 
309 int solo_gpio_init(struct solo_dev *solo_dev);
310 void solo_gpio_exit(struct solo_dev *solo_dev);
311 
312 int solo_i2c_init(struct solo_dev *solo_dev);
313 void solo_i2c_exit(struct solo_dev *solo_dev);
314 
315 int solo_p2m_init(struct solo_dev *solo_dev);
316 void solo_p2m_exit(struct solo_dev *solo_dev);
317 
318 int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
319 void solo_v4l2_exit(struct solo_dev *solo_dev);
320 
321 int solo_enc_init(struct solo_dev *solo_dev);
322 void solo_enc_exit(struct solo_dev *solo_dev);
323 
324 int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
325 void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
326 
327 int solo_g723_init(struct solo_dev *solo_dev);
328 void solo_g723_exit(struct solo_dev *solo_dev);
329 
330 /* ISR's */
331 int solo_i2c_isr(struct solo_dev *solo_dev);
332 void solo_p2m_isr(struct solo_dev *solo_dev, int id);
333 void solo_p2m_error_isr(struct solo_dev *solo_dev);
334 void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
335 void solo_g723_isr(struct solo_dev *solo_dev);
336 void solo_motion_isr(struct solo_dev *solo_dev);
337 void solo_video_in_isr(struct solo_dev *solo_dev);
338 
339 /* i2c read/write */
340 u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
341 void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
342 			u8 data);
343 
344 /* P2M DMA */
345 int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
346 		   dma_addr_t dma_addr, u32 ext_addr, u32 size,
347 		   int repeat, u32 ext_size);
348 int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
349 		 void *sys_addr, u32 ext_addr, u32 size,
350 		 int repeat, u32 ext_size);
351 void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
352 			dma_addr_t dma_addr, u32 ext_addr, u32 size,
353 			int repeat, u32 ext_size);
354 int solo_p2m_dma_desc(struct solo_dev *solo_dev,
355 		      struct solo_p2m_desc *desc, dma_addr_t desc_dma,
356 		      int desc_cnt);
357 
358 /* Global s_std ioctl */
359 int solo_set_video_type(struct solo_dev *solo_dev, bool is_50hz);
360 void solo_update_mode(struct solo_enc_dev *solo_enc);
361 
362 /* Set the threshold for motion detection */
363 int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
364 int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
365 		const u16 *thresholds);
366 #define SOLO_DEF_MOT_THRESH		0x0300
367 
368 /* Write text on OSD */
369 int solo_osd_print(struct solo_enc_dev *solo_enc);
370 
371 /* EEPROM commands */
372 unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
373 __be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc);
374 int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
375 		      __be16 data);
376 
377 /* JPEG Qp functions */
378 void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
379 		    unsigned int qp);
380 int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch);
381 
382 #define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags))
383 
384 #endif /* __SOLO6X10_H */
385