1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 #include "../wifi.h"
27 #include "../core.h"
28 #include "../pci.h"
29 #include "reg.h"
30 #include "def.h"
31 #include "phy.h"
32 #include "dm.h"
33 #include "hw.h"
34 #include "fw.h"
35 #include "sw.h"
36 #include "trx.h"
37 #include "led.h"
38 #include "table.h"
39 #include "../btcoexist/rtl_btc.h"
40
41 #include <linux/vmalloc.h>
42 #include <linux/module.h>
43
rtl8821ae_init_aspm_vars(struct ieee80211_hw * hw)44 static void rtl8821ae_init_aspm_vars(struct ieee80211_hw *hw)
45 {
46 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
47
48 /*close ASPM for AMD defaultly */
49 rtlpci->const_amdpci_aspm = 0;
50
51 /**
52 * ASPM PS mode.
53 * 0 - Disable ASPM,
54 * 1 - Enable ASPM without Clock Req,
55 * 2 - Enable ASPM with Clock Req,
56 * 3 - Alwyas Enable ASPM with Clock Req,
57 * 4 - Always Enable ASPM without Clock Req.
58 * set defult to RTL8192CE:3 RTL8192E:2
59 */
60 rtlpci->const_pci_aspm = 3;
61
62 /*Setting for PCI-E device */
63 rtlpci->const_devicepci_aspm_setting = 0x03;
64
65 /*Setting for PCI-E bridge */
66 rtlpci->const_hostpci_aspm_setting = 0x02;
67
68 /**
69 * In Hw/Sw Radio Off situation.
70 * 0 - Default,
71 * 1 - From ASPM setting without low Mac Pwr,
72 * 2 - From ASPM setting with low Mac Pwr,
73 * 3 - Bus D3
74 * set default to RTL8192CE:0 RTL8192SE:2
75 */
76 rtlpci->const_hwsw_rfoff_d3 = 0;
77
78 /**
79 * This setting works for those device with
80 * backdoor ASPM setting such as EPHY setting.
81 * 0 - Not support ASPM,
82 * 1 - Support ASPM,
83 * 2 - According to chipset.
84 */
85 rtlpci->const_support_pciaspm = 1;
86 }
87
88 /*InitializeVariables8812E*/
rtl8821ae_init_sw_vars(struct ieee80211_hw * hw)89 int rtl8821ae_init_sw_vars(struct ieee80211_hw *hw)
90 {
91 int err = 0;
92 struct rtl_priv *rtlpriv = rtl_priv(hw);
93 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
94 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
95 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
96 char *fw_name, *wowlan_fw_name;
97
98 rtl8821ae_bt_reg_init(hw);
99 rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer();
100
101 rtlpriv->dm.dm_initialgain_enable = 1;
102 rtlpriv->dm.dm_flag = 0;
103 rtlpriv->dm.disable_framebursting = 0;
104 rtlpriv->dm.thermalvalue = 0;
105 rtlpci->transmit_config = CFENDFORM | BIT(15) | BIT(24) | BIT(25);
106
107 mac->ht_enable = true;
108 mac->ht_cur_stbc = 0;
109 mac->ht_stbc_cap = 0;
110 mac->vht_cur_ldpc = 0;
111 mac->vht_ldpc_cap = 0;
112 mac->vht_cur_stbc = 0;
113 mac->vht_stbc_cap = 0;
114
115 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
116 /*following 2 is for register 5G band, refer to _rtl_init_mac80211()*/
117 rtlpriv->rtlhal.bandset = BAND_ON_BOTH;
118 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
119
120 rtlpci->receive_config = (RCR_APPFCS |
121 RCR_APP_MIC |
122 RCR_APP_ICV |
123 RCR_APP_PHYST_RXFF |
124 RCR_NONQOS_VHT |
125 RCR_HTC_LOC_CTRL |
126 RCR_AMF |
127 RCR_ACF |
128 /*This bit controls the PS-Poll packet filter.*/
129 RCR_ADF |
130 RCR_AICV |
131 RCR_ACRC32 |
132 RCR_AB |
133 RCR_AM |
134 RCR_APM |
135 0);
136
137 rtlpci->irq_mask[0] =
138 (u32)(IMR_PSTIMEOUT |
139 IMR_GTINT3 |
140 IMR_HSISR_IND_ON_INT |
141 IMR_C2HCMD |
142 IMR_HIGHDOK |
143 IMR_MGNTDOK |
144 IMR_BKDOK |
145 IMR_BEDOK |
146 IMR_VIDOK |
147 IMR_VODOK |
148 IMR_RDU |
149 IMR_ROK |
150 0);
151
152 rtlpci->irq_mask[1] =
153 (u32)(IMR_RXFOVW |
154 IMR_TXFOVW |
155 0);
156 rtlpci->sys_irq_mask = (u32)(HSIMR_PDN_INT_EN |
157 HSIMR_RON_INT_EN |
158 0);
159 /* for WOWLAN */
160 rtlpriv->psc.wo_wlan_mode = WAKE_ON_MAGIC_PACKET |
161 WAKE_ON_PATTERN_MATCH;
162
163 /* for debug level */
164 rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug;
165 /* for LPS & IPS */
166 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
167 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
168 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
169 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
170 rtlpci->int_clear = rtlpriv->cfg->mod_params->int_clear;
171 rtlpriv->cfg->mod_params->sw_crypto =
172 rtlpriv->cfg->mod_params->sw_crypto;
173 rtlpriv->cfg->mod_params->disable_watchdog =
174 rtlpriv->cfg->mod_params->disable_watchdog;
175 if (rtlpriv->cfg->mod_params->disable_watchdog)
176 pr_info("watchdog disabled\n");
177 rtlpriv->psc.reg_fwctrl_lps = 3;
178 rtlpriv->psc.reg_max_lps_awakeintvl = 5;
179
180 /* for ASPM, you can close aspm through
181 * set const_support_pciaspm = 0
182 */
183 rtl8821ae_init_aspm_vars(hw);
184
185 if (rtlpriv->psc.reg_fwctrl_lps == 1)
186 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
187 else if (rtlpriv->psc.reg_fwctrl_lps == 2)
188 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
189 else if (rtlpriv->psc.reg_fwctrl_lps == 3)
190 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
191
192 /* for firmware buf */
193 rtlpriv->rtlhal.pfirmware = vzalloc(0x8000);
194 if (!rtlpriv->rtlhal.pfirmware) {
195 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
196 "Can't alloc buffer for fw.\n");
197 return 1;
198 }
199 rtlpriv->rtlhal.wowlan_firmware = vzalloc(0x8000);
200 if (!rtlpriv->rtlhal.wowlan_firmware) {
201 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
202 "Can't alloc buffer for wowlan fw.\n");
203 return 1;
204 }
205
206 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) {
207 fw_name = "rtlwifi/rtl8812aefw.bin";
208 wowlan_fw_name = "rtlwifi/rtl8812aefw_wowlan.bin";
209 } else {
210 fw_name = "rtlwifi/rtl8821aefw.bin";
211 wowlan_fw_name = "rtlwifi/rtl8821aefw_wowlan.bin";
212 }
213
214 rtlpriv->max_fw_size = 0x8000;
215 /*load normal firmware*/
216 pr_info("Using firmware %s\n", fw_name);
217 err = request_firmware_nowait(THIS_MODULE, 1, fw_name,
218 rtlpriv->io.dev, GFP_KERNEL, hw,
219 rtl_fw_cb);
220 if (err) {
221 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
222 "Failed to request normal firmware!\n");
223 return 1;
224 }
225 /*load wowlan firmware*/
226 pr_info("Using firmware %s\n", wowlan_fw_name);
227 err = request_firmware_nowait(THIS_MODULE, 1,
228 wowlan_fw_name,
229 rtlpriv->io.dev, GFP_KERNEL, hw,
230 rtl_wowlan_fw_cb);
231 if (err) {
232 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
233 "Failed to request wowlan firmware!\n");
234 return 1;
235 }
236 return 0;
237 }
238
rtl8821ae_deinit_sw_vars(struct ieee80211_hw * hw)239 void rtl8821ae_deinit_sw_vars(struct ieee80211_hw *hw)
240 {
241 struct rtl_priv *rtlpriv = rtl_priv(hw);
242
243 if (rtlpriv->rtlhal.pfirmware) {
244 vfree(rtlpriv->rtlhal.pfirmware);
245 rtlpriv->rtlhal.pfirmware = NULL;
246 }
247 #if (USE_SPECIFIC_FW_TO_SUPPORT_WOWLAN == 1)
248 if (rtlpriv->rtlhal.wowlan_firmware) {
249 vfree(rtlpriv->rtlhal.wowlan_firmware);
250 rtlpriv->rtlhal.wowlan_firmware = NULL;
251 }
252 #endif
253 }
254
255 /* get bt coexist status */
rtl8821ae_get_btc_status(void)256 bool rtl8821ae_get_btc_status(void)
257 {
258 return true;
259 }
260
261 static struct rtl_hal_ops rtl8821ae_hal_ops = {
262 .init_sw_vars = rtl8821ae_init_sw_vars,
263 .deinit_sw_vars = rtl8821ae_deinit_sw_vars,
264 .read_eeprom_info = rtl8821ae_read_eeprom_info,
265 .interrupt_recognized = rtl8821ae_interrupt_recognized,
266 .hw_init = rtl8821ae_hw_init,
267 .hw_disable = rtl8821ae_card_disable,
268 .hw_suspend = rtl8821ae_suspend,
269 .hw_resume = rtl8821ae_resume,
270 .enable_interrupt = rtl8821ae_enable_interrupt,
271 .disable_interrupt = rtl8821ae_disable_interrupt,
272 .set_network_type = rtl8821ae_set_network_type,
273 .set_chk_bssid = rtl8821ae_set_check_bssid,
274 .set_qos = rtl8821ae_set_qos,
275 .set_bcn_reg = rtl8821ae_set_beacon_related_registers,
276 .set_bcn_intv = rtl8821ae_set_beacon_interval,
277 .update_interrupt_mask = rtl8821ae_update_interrupt_mask,
278 .get_hw_reg = rtl8821ae_get_hw_reg,
279 .set_hw_reg = rtl8821ae_set_hw_reg,
280 .update_rate_tbl = rtl8821ae_update_hal_rate_tbl,
281 .fill_tx_desc = rtl8821ae_tx_fill_desc,
282 .fill_tx_cmddesc = rtl8821ae_tx_fill_cmddesc,
283 .query_rx_desc = rtl8821ae_rx_query_desc,
284 .set_channel_access = rtl8821ae_update_channel_access_setting,
285 .radio_onoff_checking = rtl8821ae_gpio_radio_on_off_checking,
286 .set_bw_mode = rtl8821ae_phy_set_bw_mode,
287 .switch_channel = rtl8821ae_phy_sw_chnl,
288 .dm_watchdog = rtl8821ae_dm_watchdog,
289 .scan_operation_backup = rtl8821ae_phy_scan_operation_backup,
290 .set_rf_power_state = rtl8821ae_phy_set_rf_power_state,
291 .led_control = rtl8821ae_led_control,
292 .set_desc = rtl8821ae_set_desc,
293 .get_desc = rtl8821ae_get_desc,
294 .is_tx_desc_closed = rtl8821ae_is_tx_desc_closed,
295 .tx_polling = rtl8821ae_tx_polling,
296 .enable_hw_sec = rtl8821ae_enable_hw_security_config,
297 .set_key = rtl8821ae_set_key,
298 .init_sw_leds = rtl8821ae_init_sw_leds,
299 .get_bbreg = rtl8821ae_phy_query_bb_reg,
300 .set_bbreg = rtl8821ae_phy_set_bb_reg,
301 .get_rfreg = rtl8821ae_phy_query_rf_reg,
302 .set_rfreg = rtl8821ae_phy_set_rf_reg,
303 .fill_h2c_cmd = rtl8821ae_fill_h2c_cmd,
304 .get_btc_status = rtl8821ae_get_btc_status,
305 .rx_command_packet = rtl8821ae_rx_command_packet,
306 .add_wowlan_pattern = rtl8821ae_add_wowlan_pattern,
307 };
308
309 static struct rtl_mod_params rtl8821ae_mod_params = {
310 .sw_crypto = false,
311 .inactiveps = true,
312 .swctrl_lps = false,
313 .fwctrl_lps = true,
314 .msi_support = true,
315 .int_clear = true,
316 .debug = DBG_EMERG,
317 .disable_watchdog = 0,
318 };
319
320 static const struct rtl_hal_cfg rtl8821ae_hal_cfg = {
321 .bar_id = 2,
322 .write_readback = true,
323 .name = "rtl8821ae_pci",
324 .ops = &rtl8821ae_hal_ops,
325 .mod_params = &rtl8821ae_mod_params,
326 .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
327 .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
328 .maps[SYS_CLK] = REG_SYS_CLKR,
329 .maps[MAC_RCR_AM] = AM,
330 .maps[MAC_RCR_AB] = AB,
331 .maps[MAC_RCR_ACRC32] = ACRC32,
332 .maps[MAC_RCR_ACF] = ACF,
333 .maps[MAC_RCR_AAP] = AAP,
334 .maps[MAC_HIMR] = REG_HIMR,
335 .maps[MAC_HIMRE] = REG_HIMRE,
336
337 .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS,
338
339 .maps[EFUSE_TEST] = REG_EFUSE_TEST,
340 .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
341 .maps[EFUSE_CLK] = 0,
342 .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
343 .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
344 .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
345 .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
346 .maps[EFUSE_ANA8M] = ANA8M,
347 .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
348 .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
349 .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
350 .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
351
352 .maps[RWCAM] = REG_CAMCMD,
353 .maps[WCAMI] = REG_CAMWRITE,
354 .maps[RCAMO] = REG_CAMREAD,
355 .maps[CAMDBG] = REG_CAMDBG,
356 .maps[SECR] = REG_SECCFG,
357 .maps[SEC_CAM_NONE] = CAM_NONE,
358 .maps[SEC_CAM_WEP40] = CAM_WEP40,
359 .maps[SEC_CAM_TKIP] = CAM_TKIP,
360 .maps[SEC_CAM_AES] = CAM_AES,
361 .maps[SEC_CAM_WEP104] = CAM_WEP104,
362
363 .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
364 .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
365 .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
366 .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
367 .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
368 .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
369 /* .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8, */ /*need check*/
370 .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
371 .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
372 .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
373 .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
374 .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
375 .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
376 .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
377 /* .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/
378 /* .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/
379
380 .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
381 .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
382 .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0,
383 .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
384 .maps[RTL_IMR_RDU] = IMR_RDU,
385 .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
386 .maps[RTL_IMR_BDOK] = IMR_BCNDOK0,
387 .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
388 .maps[RTL_IMR_TBDER] = IMR_TBDER,
389 .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
390 .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
391 .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
392 .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
393 .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
394 .maps[RTL_IMR_VODOK] = IMR_VODOK,
395 .maps[RTL_IMR_ROK] = IMR_ROK,
396 .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER),
397
398 .maps[RTL_RC_CCK_RATE1M] = DESC_RATE1M,
399 .maps[RTL_RC_CCK_RATE2M] = DESC_RATE2M,
400 .maps[RTL_RC_CCK_RATE5_5M] = DESC_RATE5_5M,
401 .maps[RTL_RC_CCK_RATE11M] = DESC_RATE11M,
402 .maps[RTL_RC_OFDM_RATE6M] = DESC_RATE6M,
403 .maps[RTL_RC_OFDM_RATE9M] = DESC_RATE9M,
404 .maps[RTL_RC_OFDM_RATE12M] = DESC_RATE12M,
405 .maps[RTL_RC_OFDM_RATE18M] = DESC_RATE18M,
406 .maps[RTL_RC_OFDM_RATE24M] = DESC_RATE24M,
407 .maps[RTL_RC_OFDM_RATE36M] = DESC_RATE36M,
408 .maps[RTL_RC_OFDM_RATE48M] = DESC_RATE48M,
409 .maps[RTL_RC_OFDM_RATE54M] = DESC_RATE54M,
410
411 .maps[RTL_RC_HT_RATEMCS7] = DESC_RATEMCS7,
412 .maps[RTL_RC_HT_RATEMCS15] = DESC_RATEMCS15,
413
414 /*VHT hightest rate*/
415 .maps[RTL_RC_VHT_RATE_1SS_MCS7] = DESC_RATEVHT1SS_MCS7,
416 .maps[RTL_RC_VHT_RATE_1SS_MCS8] = DESC_RATEVHT1SS_MCS8,
417 .maps[RTL_RC_VHT_RATE_1SS_MCS9] = DESC_RATEVHT1SS_MCS9,
418 .maps[RTL_RC_VHT_RATE_2SS_MCS7] = DESC_RATEVHT2SS_MCS7,
419 .maps[RTL_RC_VHT_RATE_2SS_MCS8] = DESC_RATEVHT2SS_MCS8,
420 .maps[RTL_RC_VHT_RATE_2SS_MCS9] = DESC_RATEVHT2SS_MCS9,
421 };
422
423 static struct pci_device_id rtl8821ae_pci_ids[] = {
424 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8812, rtl8821ae_hal_cfg)},
425 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8821, rtl8821ae_hal_cfg)},
426 {},
427 };
428
429 MODULE_DEVICE_TABLE(pci, rtl8821ae_pci_ids);
430
431 MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
432 MODULE_LICENSE("GPL");
433 MODULE_DESCRIPTION("Realtek 8821ae 802.11ac PCI wireless");
434 MODULE_FIRMWARE("rtlwifi/rtl8821aefw.bin");
435
436 module_param_named(swenc, rtl8821ae_mod_params.sw_crypto, bool, 0444);
437 module_param_named(debug, rtl8821ae_mod_params.debug, int, 0444);
438 module_param_named(ips, rtl8821ae_mod_params.inactiveps, bool, 0444);
439 module_param_named(swlps, rtl8821ae_mod_params.swctrl_lps, bool, 0444);
440 module_param_named(fwlps, rtl8821ae_mod_params.fwctrl_lps, bool, 0444);
441 module_param_named(msi, rtl8821ae_mod_params.msi_support, bool, 0444);
442 module_param_named(disable_watchdog, rtl8821ae_mod_params.disable_watchdog,
443 bool, 0444);
444 module_param_named(int_clear, rtl8821ae_mod_params.int_clear, bool, 0444);
445 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
446 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
447 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
448 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
449 MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 1)\n");
450 MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)");
451 MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n");
452 MODULE_PARM_DESC(int_clear, "Set to 0 to disable interrupt clear before set (default 1)\n");
453
454 static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
455
456 static struct pci_driver rtl8821ae_driver = {
457 .name = KBUILD_MODNAME,
458 .id_table = rtl8821ae_pci_ids,
459 .probe = rtl_pci_probe,
460 .remove = rtl_pci_disconnect,
461 .driver.pm = &rtlwifi_pm_ops,
462 };
463
464 module_pci_driver(rtl8821ae_driver);
465