1 /*
2 * PCIe RC driver for Synopsys DesignWare Core
3 *
4 * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
5 *
6 * Authors: Joao Pinto <Joao.Pinto@synopsys.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12 #include <linux/clk.h>
13 #include <linux/delay.h>
14 #include <linux/gpio.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/of_gpio.h>
19 #include <linux/pci.h>
20 #include <linux/platform_device.h>
21 #include <linux/resource.h>
22 #include <linux/signal.h>
23 #include <linux/types.h>
24
25 #include "pcie-designware.h"
26
27 struct dw_plat_pcie {
28 struct pcie_port pp; /* pp.dbi_base is DT 0th resource */
29 };
30
dw_plat_pcie_msi_irq_handler(int irq,void * arg)31 static irqreturn_t dw_plat_pcie_msi_irq_handler(int irq, void *arg)
32 {
33 struct pcie_port *pp = arg;
34
35 return dw_handle_msi_irq(pp);
36 }
37
dw_plat_pcie_host_init(struct pcie_port * pp)38 static void dw_plat_pcie_host_init(struct pcie_port *pp)
39 {
40 dw_pcie_setup_rc(pp);
41 dw_pcie_wait_for_link(pp);
42
43 if (IS_ENABLED(CONFIG_PCI_MSI))
44 dw_pcie_msi_init(pp);
45 }
46
47 static struct pcie_host_ops dw_plat_pcie_host_ops = {
48 .host_init = dw_plat_pcie_host_init,
49 };
50
dw_plat_add_pcie_port(struct pcie_port * pp,struct platform_device * pdev)51 static int dw_plat_add_pcie_port(struct pcie_port *pp,
52 struct platform_device *pdev)
53 {
54 struct device *dev = pp->dev;
55 int ret;
56
57 pp->irq = platform_get_irq(pdev, 1);
58 if (pp->irq < 0)
59 return pp->irq;
60
61 if (IS_ENABLED(CONFIG_PCI_MSI)) {
62 pp->msi_irq = platform_get_irq(pdev, 0);
63 if (pp->msi_irq < 0)
64 return pp->msi_irq;
65
66 ret = devm_request_irq(dev, pp->msi_irq,
67 dw_plat_pcie_msi_irq_handler,
68 IRQF_SHARED, "dw-plat-pcie-msi", pp);
69 if (ret) {
70 dev_err(dev, "failed to request MSI IRQ\n");
71 return ret;
72 }
73 }
74
75 pp->root_bus_nr = -1;
76 pp->ops = &dw_plat_pcie_host_ops;
77
78 ret = dw_pcie_host_init(pp);
79 if (ret) {
80 dev_err(dev, "failed to initialize host\n");
81 return ret;
82 }
83
84 return 0;
85 }
86
dw_plat_pcie_probe(struct platform_device * pdev)87 static int dw_plat_pcie_probe(struct platform_device *pdev)
88 {
89 struct device *dev = &pdev->dev;
90 struct dw_plat_pcie *dw_plat_pcie;
91 struct pcie_port *pp;
92 struct resource *res; /* Resource from DT */
93 int ret;
94
95 dw_plat_pcie = devm_kzalloc(dev, sizeof(*dw_plat_pcie), GFP_KERNEL);
96 if (!dw_plat_pcie)
97 return -ENOMEM;
98
99 pp = &dw_plat_pcie->pp;
100 pp->dev = dev;
101
102 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
103 pp->dbi_base = devm_ioremap_resource(dev, res);
104 if (IS_ERR(pp->dbi_base))
105 return PTR_ERR(pp->dbi_base);
106
107 ret = dw_plat_add_pcie_port(pp, pdev);
108 if (ret < 0)
109 return ret;
110
111 return 0;
112 }
113
114 static const struct of_device_id dw_plat_pcie_of_match[] = {
115 { .compatible = "snps,dw-pcie", },
116 {},
117 };
118
119 static struct platform_driver dw_plat_pcie_driver = {
120 .driver = {
121 .name = "dw-pcie",
122 .of_match_table = dw_plat_pcie_of_match,
123 },
124 .probe = dw_plat_pcie_probe,
125 };
126 builtin_platform_driver(dw_plat_pcie_driver);
127