1 /**
2 * dwc3-pci.c - PCI Specific glue layer
3 *
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8 *
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 of
11 * the License as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/slab.h>
22 #include <linux/pci.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/platform_device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/acpi.h>
27 #include <linux/delay.h>
28
29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
32 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
33 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
34 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
35 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
36 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
37 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
38 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
39 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
40 #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
41 #define PCI_DEVICE_ID_INTEL_GLK 0x31aa
42
43 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
44 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
45
46 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
47 { "reset-gpios", &reset_gpios, 1 },
48 { "cs-gpios", &cs_gpios, 1 },
49 { },
50 };
51
dwc3_pci_quirks(struct pci_dev * pdev,struct platform_device * dwc3)52 static int dwc3_pci_quirks(struct pci_dev *pdev, struct platform_device *dwc3)
53 {
54 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
55 pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
56 struct property_entry properties[] = {
57 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
58 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
59 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
60 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
61 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
62 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
63 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
64 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
65 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
66 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
67 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
68 /*
69 * FIXME these quirks should be removed when AMD NL
70 * tapes out
71 */
72 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
73 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
74 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
75 { },
76 };
77
78 return platform_device_add_properties(dwc3, properties);
79 }
80
81 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
82 int ret;
83
84 struct property_entry properties[] = {
85 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
86 { }
87 };
88
89 ret = platform_device_add_properties(dwc3, properties);
90 if (ret < 0)
91 return ret;
92
93 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
94 struct gpio_desc *gpio;
95
96 acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
97 acpi_dwc3_byt_gpios);
98
99 /*
100 * These GPIOs will turn on the USB2 PHY. Note that we have to
101 * put the gpio descriptors again here because the phy driver
102 * might want to grab them, too.
103 */
104 gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
105 if (IS_ERR(gpio))
106 return PTR_ERR(gpio);
107
108 gpiod_set_value_cansleep(gpio, 1);
109 gpiod_put(gpio);
110
111 gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
112 if (IS_ERR(gpio))
113 return PTR_ERR(gpio);
114
115 if (gpio) {
116 gpiod_set_value_cansleep(gpio, 1);
117 gpiod_put(gpio);
118 usleep_range(10000, 11000);
119 }
120 }
121 }
122
123 if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
124 (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
125 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
126 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
127 struct property_entry properties[] = {
128 PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
129 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
130 PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
131 { },
132 };
133
134 return platform_device_add_properties(dwc3, properties);
135 }
136
137 return 0;
138 }
139
dwc3_pci_probe(struct pci_dev * pci,const struct pci_device_id * id)140 static int dwc3_pci_probe(struct pci_dev *pci,
141 const struct pci_device_id *id)
142 {
143 struct resource res[2];
144 struct platform_device *dwc3;
145 int ret;
146 struct device *dev = &pci->dev;
147
148 ret = pcim_enable_device(pci);
149 if (ret) {
150 dev_err(dev, "failed to enable pci device\n");
151 return -ENODEV;
152 }
153
154 pci_set_master(pci);
155
156 dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
157 if (!dwc3) {
158 dev_err(dev, "couldn't allocate dwc3 device\n");
159 return -ENOMEM;
160 }
161
162 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
163
164 res[0].start = pci_resource_start(pci, 0);
165 res[0].end = pci_resource_end(pci, 0);
166 res[0].name = "dwc_usb3";
167 res[0].flags = IORESOURCE_MEM;
168
169 res[1].start = pci->irq;
170 res[1].name = "dwc_usb3";
171 res[1].flags = IORESOURCE_IRQ;
172
173 ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
174 if (ret) {
175 dev_err(dev, "couldn't add resources to dwc3 device\n");
176 goto err;
177 }
178
179 dwc3->dev.parent = dev;
180 ACPI_COMPANION_SET(&dwc3->dev, ACPI_COMPANION(dev));
181
182 ret = dwc3_pci_quirks(pci, dwc3);
183 if (ret)
184 goto err;
185
186 ret = platform_device_add(dwc3);
187 if (ret) {
188 dev_err(dev, "failed to register dwc3 device\n");
189 goto err;
190 }
191
192 device_init_wakeup(dev, true);
193 device_set_run_wake(dev, true);
194 pci_set_drvdata(pci, dwc3);
195 pm_runtime_put(dev);
196
197 return 0;
198 err:
199 platform_device_put(dwc3);
200 return ret;
201 }
202
dwc3_pci_remove(struct pci_dev * pci)203 static void dwc3_pci_remove(struct pci_dev *pci)
204 {
205 device_init_wakeup(&pci->dev, false);
206 pm_runtime_get(&pci->dev);
207 acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev));
208 platform_device_unregister(pci_get_drvdata(pci));
209 }
210
211 static const struct pci_device_id dwc3_pci_id_table[] = {
212 {
213 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
214 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
215 },
216 {
217 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
218 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
219 },
220 {
221 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
222 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
223 },
224 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
225 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
226 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
227 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
228 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
229 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
230 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
231 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
232 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), },
233 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK), },
234 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
235 { } /* Terminating Entry */
236 };
237 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
238
239 #ifdef CONFIG_PM
dwc3_pci_runtime_suspend(struct device * dev)240 static int dwc3_pci_runtime_suspend(struct device *dev)
241 {
242 if (device_run_wake(dev))
243 return 0;
244
245 return -EBUSY;
246 }
247
dwc3_pci_runtime_resume(struct device * dev)248 static int dwc3_pci_runtime_resume(struct device *dev)
249 {
250 struct platform_device *dwc3 = dev_get_drvdata(dev);
251
252 return pm_runtime_get(&dwc3->dev);
253 }
254 #endif /* CONFIG_PM */
255
256 #ifdef CONFIG_PM_SLEEP
dwc3_pci_pm_dummy(struct device * dev)257 static int dwc3_pci_pm_dummy(struct device *dev)
258 {
259 /*
260 * There's nothing to do here. No, seriously. Everything is either taken
261 * care either by PCI subsystem or dwc3/core.c, so we have nothing
262 * missing here.
263 *
264 * So you'd think we didn't need this at all, but PCI subsystem will
265 * bail out if we don't have a valid callback :-s
266 */
267 return 0;
268 }
269 #endif /* CONFIG_PM_SLEEP */
270
271 static struct dev_pm_ops dwc3_pci_dev_pm_ops = {
272 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_pm_dummy, dwc3_pci_pm_dummy)
273 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
274 NULL)
275 };
276
277 static struct pci_driver dwc3_pci_driver = {
278 .name = "dwc3-pci",
279 .id_table = dwc3_pci_id_table,
280 .probe = dwc3_pci_probe,
281 .remove = dwc3_pci_remove,
282 .driver = {
283 .pm = &dwc3_pci_dev_pm_ops,
284 }
285 };
286
287 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
288 MODULE_LICENSE("GPL v2");
289 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
290
291 module_pci_driver(dwc3_pci_driver);
292