1 /*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/mm.h>
23 #include <linux/export.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31 #include <linux/gfp.h>
32 #include <linux/scatterlist.h>
33
34 #include <asm/io.h>
35 #include <asm/dma.h>
36
37 #include <linux/init.h>
38 #include <linux/bootmem.h>
39 #include <linux/iommu-helper.h>
40
41 #define CREATE_TRACE_POINTS
42 #include <trace/events/swiotlb.h>
43
44 #define OFFSET(val,align) ((unsigned long) \
45 ( (val) & ( (align) - 1)))
46
47 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
48
49 /*
50 * Minimum IO TLB size to bother booting with. Systems with mainly
51 * 64bit capable cards will only lightly use the swiotlb. If we can't
52 * allocate a contiguous 1MB, we're probably in trouble anyway.
53 */
54 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
55
56 enum swiotlb_force swiotlb_force;
57
58 /*
59 * Used to do a quick range check in swiotlb_tbl_unmap_single and
60 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
61 * API.
62 */
63 static phys_addr_t io_tlb_start, io_tlb_end;
64
65 /*
66 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
67 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
68 */
69 static unsigned long io_tlb_nslabs;
70
71 /*
72 * When the IOMMU overflows we return a fallback buffer. This sets the size.
73 */
74 static unsigned long io_tlb_overflow = 32*1024;
75
76 static phys_addr_t io_tlb_overflow_buffer;
77
78 /*
79 * This is a free list describing the number of free entries available from
80 * each index
81 */
82 static unsigned int *io_tlb_list;
83 static unsigned int io_tlb_index;
84
85 /*
86 * We need to save away the original address corresponding to a mapped entry
87 * for the sync operations.
88 */
89 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
90 static phys_addr_t *io_tlb_orig_addr;
91
92 /*
93 * Protect the above data structures in the map and unmap calls
94 */
95 static DEFINE_SPINLOCK(io_tlb_lock);
96
97 static int late_alloc;
98
99 static int __init
setup_io_tlb_npages(char * str)100 setup_io_tlb_npages(char *str)
101 {
102 if (isdigit(*str)) {
103 io_tlb_nslabs = simple_strtoul(str, &str, 0);
104 /* avoid tail segment of size < IO_TLB_SEGSIZE */
105 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
106 }
107 if (*str == ',')
108 ++str;
109 if (!strcmp(str, "force")) {
110 swiotlb_force = SWIOTLB_FORCE;
111 } else if (!strcmp(str, "noforce")) {
112 swiotlb_force = SWIOTLB_NO_FORCE;
113 io_tlb_nslabs = 1;
114 }
115
116 return 0;
117 }
118 early_param("swiotlb", setup_io_tlb_npages);
119 /* make io_tlb_overflow tunable too? */
120
swiotlb_nr_tbl(void)121 unsigned long swiotlb_nr_tbl(void)
122 {
123 return io_tlb_nslabs;
124 }
125 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
126
127 /* default to 64MB */
128 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
swiotlb_size_or_default(void)129 unsigned long swiotlb_size_or_default(void)
130 {
131 unsigned long size;
132
133 size = io_tlb_nslabs << IO_TLB_SHIFT;
134
135 return size ? size : (IO_TLB_DEFAULT_SIZE);
136 }
137
138 /* Note that this doesn't work with highmem page */
swiotlb_virt_to_bus(struct device * hwdev,volatile void * address)139 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
140 volatile void *address)
141 {
142 return phys_to_dma(hwdev, virt_to_phys(address));
143 }
144
145 static bool no_iotlb_memory;
146
swiotlb_print_info(void)147 void swiotlb_print_info(void)
148 {
149 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
150 unsigned char *vstart, *vend;
151
152 if (no_iotlb_memory) {
153 pr_warn("software IO TLB: No low mem\n");
154 return;
155 }
156
157 vstart = phys_to_virt(io_tlb_start);
158 vend = phys_to_virt(io_tlb_end);
159
160 printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
161 (unsigned long long)io_tlb_start,
162 (unsigned long long)io_tlb_end,
163 bytes >> 20, vstart, vend - 1);
164 }
165
swiotlb_init_with_tbl(char * tlb,unsigned long nslabs,int verbose)166 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
167 {
168 void *v_overflow_buffer;
169 unsigned long i, bytes;
170
171 bytes = nslabs << IO_TLB_SHIFT;
172
173 io_tlb_nslabs = nslabs;
174 io_tlb_start = __pa(tlb);
175 io_tlb_end = io_tlb_start + bytes;
176
177 /*
178 * Get the overflow emergency buffer
179 */
180 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
181 PAGE_ALIGN(io_tlb_overflow),
182 PAGE_SIZE);
183 if (!v_overflow_buffer)
184 return -ENOMEM;
185
186 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
187
188 /*
189 * Allocate and initialize the free list array. This array is used
190 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
191 * between io_tlb_start and io_tlb_end.
192 */
193 io_tlb_list = memblock_virt_alloc(
194 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
195 PAGE_SIZE);
196 io_tlb_orig_addr = memblock_virt_alloc(
197 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
198 PAGE_SIZE);
199 for (i = 0; i < io_tlb_nslabs; i++) {
200 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
201 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
202 }
203 io_tlb_index = 0;
204
205 if (verbose)
206 swiotlb_print_info();
207
208 return 0;
209 }
210
211 /*
212 * Statically reserve bounce buffer space and initialize bounce buffer data
213 * structures for the software IO TLB used to implement the DMA API.
214 */
215 void __init
swiotlb_init(int verbose)216 swiotlb_init(int verbose)
217 {
218 size_t default_size = IO_TLB_DEFAULT_SIZE;
219 unsigned char *vstart;
220 unsigned long bytes;
221
222 if (!io_tlb_nslabs) {
223 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
224 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
225 }
226
227 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
228
229 /* Get IO TLB memory from the low pages */
230 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
231 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
232 return;
233
234 if (io_tlb_start)
235 memblock_free_early(io_tlb_start,
236 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
237 pr_warn("Cannot allocate SWIOTLB buffer");
238 no_iotlb_memory = true;
239 }
240
241 /*
242 * Systems with larger DMA zones (those that don't support ISA) can
243 * initialize the swiotlb later using the slab allocator if needed.
244 * This should be just like above, but with some error catching.
245 */
246 int
swiotlb_late_init_with_default_size(size_t default_size)247 swiotlb_late_init_with_default_size(size_t default_size)
248 {
249 unsigned long bytes, req_nslabs = io_tlb_nslabs;
250 unsigned char *vstart = NULL;
251 unsigned int order;
252 int rc = 0;
253
254 if (!io_tlb_nslabs) {
255 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
256 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
257 }
258
259 /*
260 * Get IO TLB memory from the low pages
261 */
262 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
263 io_tlb_nslabs = SLABS_PER_PAGE << order;
264 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
265
266 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
267 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
268 order);
269 if (vstart)
270 break;
271 order--;
272 }
273
274 if (!vstart) {
275 io_tlb_nslabs = req_nslabs;
276 return -ENOMEM;
277 }
278 if (order != get_order(bytes)) {
279 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
280 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
281 io_tlb_nslabs = SLABS_PER_PAGE << order;
282 }
283 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
284 if (rc)
285 free_pages((unsigned long)vstart, order);
286 return rc;
287 }
288
289 int
swiotlb_late_init_with_tbl(char * tlb,unsigned long nslabs)290 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
291 {
292 unsigned long i, bytes;
293 unsigned char *v_overflow_buffer;
294
295 bytes = nslabs << IO_TLB_SHIFT;
296
297 io_tlb_nslabs = nslabs;
298 io_tlb_start = virt_to_phys(tlb);
299 io_tlb_end = io_tlb_start + bytes;
300
301 memset(tlb, 0, bytes);
302
303 /*
304 * Get the overflow emergency buffer
305 */
306 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
307 get_order(io_tlb_overflow));
308 if (!v_overflow_buffer)
309 goto cleanup2;
310
311 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
312
313 /*
314 * Allocate and initialize the free list array. This array is used
315 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
316 * between io_tlb_start and io_tlb_end.
317 */
318 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
319 get_order(io_tlb_nslabs * sizeof(int)));
320 if (!io_tlb_list)
321 goto cleanup3;
322
323 io_tlb_orig_addr = (phys_addr_t *)
324 __get_free_pages(GFP_KERNEL,
325 get_order(io_tlb_nslabs *
326 sizeof(phys_addr_t)));
327 if (!io_tlb_orig_addr)
328 goto cleanup4;
329
330 for (i = 0; i < io_tlb_nslabs; i++) {
331 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
332 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
333 }
334 io_tlb_index = 0;
335
336 swiotlb_print_info();
337
338 late_alloc = 1;
339
340 return 0;
341
342 cleanup4:
343 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
344 sizeof(int)));
345 io_tlb_list = NULL;
346 cleanup3:
347 free_pages((unsigned long)v_overflow_buffer,
348 get_order(io_tlb_overflow));
349 io_tlb_overflow_buffer = 0;
350 cleanup2:
351 io_tlb_end = 0;
352 io_tlb_start = 0;
353 io_tlb_nslabs = 0;
354 return -ENOMEM;
355 }
356
swiotlb_free(void)357 void __init swiotlb_free(void)
358 {
359 if (!io_tlb_orig_addr)
360 return;
361
362 if (late_alloc) {
363 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
364 get_order(io_tlb_overflow));
365 free_pages((unsigned long)io_tlb_orig_addr,
366 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
367 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
368 sizeof(int)));
369 free_pages((unsigned long)phys_to_virt(io_tlb_start),
370 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
371 } else {
372 memblock_free_late(io_tlb_overflow_buffer,
373 PAGE_ALIGN(io_tlb_overflow));
374 memblock_free_late(__pa(io_tlb_orig_addr),
375 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
376 memblock_free_late(__pa(io_tlb_list),
377 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
378 memblock_free_late(io_tlb_start,
379 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
380 }
381 io_tlb_nslabs = 0;
382 }
383
is_swiotlb_buffer(phys_addr_t paddr)384 int is_swiotlb_buffer(phys_addr_t paddr)
385 {
386 return paddr >= io_tlb_start && paddr < io_tlb_end;
387 }
388
389 /*
390 * Bounce: copy the swiotlb buffer back to the original dma location
391 */
swiotlb_bounce(phys_addr_t orig_addr,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir)392 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
393 size_t size, enum dma_data_direction dir)
394 {
395 unsigned long pfn = PFN_DOWN(orig_addr);
396 unsigned char *vaddr = phys_to_virt(tlb_addr);
397
398 if (PageHighMem(pfn_to_page(pfn))) {
399 /* The buffer does not have a mapping. Map it in and copy */
400 unsigned int offset = orig_addr & ~PAGE_MASK;
401 char *buffer;
402 unsigned int sz = 0;
403 unsigned long flags;
404
405 while (size) {
406 sz = min_t(size_t, PAGE_SIZE - offset, size);
407
408 local_irq_save(flags);
409 buffer = kmap_atomic(pfn_to_page(pfn));
410 if (dir == DMA_TO_DEVICE)
411 memcpy(vaddr, buffer + offset, sz);
412 else
413 memcpy(buffer + offset, vaddr, sz);
414 kunmap_atomic(buffer);
415 local_irq_restore(flags);
416
417 size -= sz;
418 pfn++;
419 vaddr += sz;
420 offset = 0;
421 }
422 } else if (dir == DMA_TO_DEVICE) {
423 memcpy(vaddr, phys_to_virt(orig_addr), size);
424 } else {
425 memcpy(phys_to_virt(orig_addr), vaddr, size);
426 }
427 }
428
swiotlb_tbl_map_single(struct device * hwdev,dma_addr_t tbl_dma_addr,phys_addr_t orig_addr,size_t size,enum dma_data_direction dir)429 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
430 dma_addr_t tbl_dma_addr,
431 phys_addr_t orig_addr, size_t size,
432 enum dma_data_direction dir)
433 {
434 unsigned long flags;
435 phys_addr_t tlb_addr;
436 unsigned int nslots, stride, index, wrap;
437 int i;
438 unsigned long mask;
439 unsigned long offset_slots;
440 unsigned long max_slots;
441
442 if (no_iotlb_memory)
443 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
444
445 mask = dma_get_seg_boundary(hwdev);
446
447 tbl_dma_addr &= mask;
448
449 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
450
451 /*
452 * Carefully handle integer overflow which can occur when mask == ~0UL.
453 */
454 max_slots = mask + 1
455 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
456 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
457
458 /*
459 * For mappings greater than or equal to a page, we limit the stride
460 * (and hence alignment) to a page size.
461 */
462 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
463 if (size >= PAGE_SIZE)
464 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
465 else
466 stride = 1;
467
468 BUG_ON(!nslots);
469
470 /*
471 * Find suitable number of IO TLB entries size that will fit this
472 * request and allocate a buffer from that IO TLB pool.
473 */
474 spin_lock_irqsave(&io_tlb_lock, flags);
475 index = ALIGN(io_tlb_index, stride);
476 if (index >= io_tlb_nslabs)
477 index = 0;
478 wrap = index;
479
480 do {
481 while (iommu_is_span_boundary(index, nslots, offset_slots,
482 max_slots)) {
483 index += stride;
484 if (index >= io_tlb_nslabs)
485 index = 0;
486 if (index == wrap)
487 goto not_found;
488 }
489
490 /*
491 * If we find a slot that indicates we have 'nslots' number of
492 * contiguous buffers, we allocate the buffers from that slot
493 * and mark the entries as '0' indicating unavailable.
494 */
495 if (io_tlb_list[index] >= nslots) {
496 int count = 0;
497
498 for (i = index; i < (int) (index + nslots); i++)
499 io_tlb_list[i] = 0;
500 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
501 io_tlb_list[i] = ++count;
502 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
503
504 /*
505 * Update the indices to avoid searching in the next
506 * round.
507 */
508 io_tlb_index = ((index + nslots) < io_tlb_nslabs
509 ? (index + nslots) : 0);
510
511 goto found;
512 }
513 index += stride;
514 if (index >= io_tlb_nslabs)
515 index = 0;
516 } while (index != wrap);
517
518 not_found:
519 spin_unlock_irqrestore(&io_tlb_lock, flags);
520 if (printk_ratelimit())
521 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
522 return SWIOTLB_MAP_ERROR;
523 found:
524 spin_unlock_irqrestore(&io_tlb_lock, flags);
525
526 /*
527 * Save away the mapping from the original address to the DMA address.
528 * This is needed when we sync the memory. Then we sync the buffer if
529 * needed.
530 */
531 for (i = 0; i < nslots; i++)
532 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
533 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
534 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
535
536 return tlb_addr;
537 }
538 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
539
540 /*
541 * Allocates bounce buffer and returns its kernel virtual address.
542 */
543
544 static phys_addr_t
map_single(struct device * hwdev,phys_addr_t phys,size_t size,enum dma_data_direction dir)545 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
546 enum dma_data_direction dir)
547 {
548 dma_addr_t start_dma_addr;
549
550 if (swiotlb_force == SWIOTLB_NO_FORCE) {
551 dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n",
552 &phys);
553 return SWIOTLB_MAP_ERROR;
554 }
555
556 start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
557 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
558 }
559
560 /*
561 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
562 */
swiotlb_tbl_unmap_single(struct device * hwdev,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir)563 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
564 size_t size, enum dma_data_direction dir)
565 {
566 unsigned long flags;
567 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
568 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
569 phys_addr_t orig_addr = io_tlb_orig_addr[index];
570
571 /*
572 * First, sync the memory before unmapping the entry
573 */
574 if (orig_addr != INVALID_PHYS_ADDR &&
575 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
576 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
577
578 /*
579 * Return the buffer to the free list by setting the corresponding
580 * entries to indicate the number of contiguous entries available.
581 * While returning the entries to the free list, we merge the entries
582 * with slots below and above the pool being returned.
583 */
584 spin_lock_irqsave(&io_tlb_lock, flags);
585 {
586 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
587 io_tlb_list[index + nslots] : 0);
588 /*
589 * Step 1: return the slots to the free list, merging the
590 * slots with superceeding slots
591 */
592 for (i = index + nslots - 1; i >= index; i--) {
593 io_tlb_list[i] = ++count;
594 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
595 }
596 /*
597 * Step 2: merge the returned slots with the preceding slots,
598 * if available (non zero)
599 */
600 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
601 io_tlb_list[i] = ++count;
602 }
603 spin_unlock_irqrestore(&io_tlb_lock, flags);
604 }
605 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
606
swiotlb_tbl_sync_single(struct device * hwdev,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir,enum dma_sync_target target)607 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
608 size_t size, enum dma_data_direction dir,
609 enum dma_sync_target target)
610 {
611 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
612 phys_addr_t orig_addr = io_tlb_orig_addr[index];
613
614 if (orig_addr == INVALID_PHYS_ADDR)
615 return;
616 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
617
618 switch (target) {
619 case SYNC_FOR_CPU:
620 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
621 swiotlb_bounce(orig_addr, tlb_addr,
622 size, DMA_FROM_DEVICE);
623 else
624 BUG_ON(dir != DMA_TO_DEVICE);
625 break;
626 case SYNC_FOR_DEVICE:
627 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
628 swiotlb_bounce(orig_addr, tlb_addr,
629 size, DMA_TO_DEVICE);
630 else
631 BUG_ON(dir != DMA_FROM_DEVICE);
632 break;
633 default:
634 BUG();
635 }
636 }
637 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
638
639 void *
swiotlb_alloc_coherent(struct device * hwdev,size_t size,dma_addr_t * dma_handle,gfp_t flags)640 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
641 dma_addr_t *dma_handle, gfp_t flags)
642 {
643 dma_addr_t dev_addr;
644 void *ret;
645 int order = get_order(size);
646 u64 dma_mask = DMA_BIT_MASK(32);
647
648 if (hwdev && hwdev->coherent_dma_mask)
649 dma_mask = hwdev->coherent_dma_mask;
650
651 ret = (void *)__get_free_pages(flags, order);
652 if (ret) {
653 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
654 if (dev_addr + size - 1 > dma_mask) {
655 /*
656 * The allocated memory isn't reachable by the device.
657 */
658 free_pages((unsigned long) ret, order);
659 ret = NULL;
660 }
661 }
662 if (!ret) {
663 /*
664 * We are either out of memory or the device can't DMA to
665 * GFP_DMA memory; fall back on map_single(), which
666 * will grab memory from the lowest available address range.
667 */
668 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
669 if (paddr == SWIOTLB_MAP_ERROR)
670 goto err_warn;
671
672 ret = phys_to_virt(paddr);
673 dev_addr = phys_to_dma(hwdev, paddr);
674
675 /* Confirm address can be DMA'd by device */
676 if (dev_addr + size - 1 > dma_mask) {
677 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
678 (unsigned long long)dma_mask,
679 (unsigned long long)dev_addr);
680
681 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
682 swiotlb_tbl_unmap_single(hwdev, paddr,
683 size, DMA_TO_DEVICE);
684 goto err_warn;
685 }
686 }
687
688 *dma_handle = dev_addr;
689 memset(ret, 0, size);
690
691 return ret;
692
693 err_warn:
694 pr_warn("swiotlb: coherent allocation failed for device %s size=%zu\n",
695 dev_name(hwdev), size);
696 dump_stack();
697
698 return NULL;
699 }
700 EXPORT_SYMBOL(swiotlb_alloc_coherent);
701
702 void
swiotlb_free_coherent(struct device * hwdev,size_t size,void * vaddr,dma_addr_t dev_addr)703 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
704 dma_addr_t dev_addr)
705 {
706 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
707
708 WARN_ON(irqs_disabled());
709 if (!is_swiotlb_buffer(paddr))
710 free_pages((unsigned long)vaddr, get_order(size));
711 else
712 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
713 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
714 }
715 EXPORT_SYMBOL(swiotlb_free_coherent);
716
717 static void
swiotlb_full(struct device * dev,size_t size,enum dma_data_direction dir,int do_panic)718 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
719 int do_panic)
720 {
721 if (swiotlb_force == SWIOTLB_NO_FORCE)
722 return;
723
724 /*
725 * Ran out of IOMMU space for this operation. This is very bad.
726 * Unfortunately the drivers cannot handle this operation properly.
727 * unless they check for dma_mapping_error (most don't)
728 * When the mapping is small enough return a static buffer to limit
729 * the damage, or panic when the transfer is too big.
730 */
731 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
732 "device %s\n", size, dev ? dev_name(dev) : "?");
733
734 if (size <= io_tlb_overflow || !do_panic)
735 return;
736
737 if (dir == DMA_BIDIRECTIONAL)
738 panic("DMA: Random memory could be DMA accessed\n");
739 if (dir == DMA_FROM_DEVICE)
740 panic("DMA: Random memory could be DMA written\n");
741 if (dir == DMA_TO_DEVICE)
742 panic("DMA: Random memory could be DMA read\n");
743 }
744
745 /*
746 * Map a single buffer of the indicated size for DMA in streaming mode. The
747 * physical address to use is returned.
748 *
749 * Once the device is given the dma address, the device owns this memory until
750 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
751 */
swiotlb_map_page(struct device * dev,struct page * page,unsigned long offset,size_t size,enum dma_data_direction dir,unsigned long attrs)752 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
753 unsigned long offset, size_t size,
754 enum dma_data_direction dir,
755 unsigned long attrs)
756 {
757 phys_addr_t map, phys = page_to_phys(page) + offset;
758 dma_addr_t dev_addr = phys_to_dma(dev, phys);
759
760 BUG_ON(dir == DMA_NONE);
761 /*
762 * If the address happens to be in the device's DMA window,
763 * we can safely return the device addr and not worry about bounce
764 * buffering it.
765 */
766 if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE)
767 return dev_addr;
768
769 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
770
771 /* Oh well, have to allocate and map a bounce buffer. */
772 map = map_single(dev, phys, size, dir);
773 if (map == SWIOTLB_MAP_ERROR) {
774 swiotlb_full(dev, size, dir, 1);
775 return phys_to_dma(dev, io_tlb_overflow_buffer);
776 }
777
778 dev_addr = phys_to_dma(dev, map);
779
780 /* Ensure that the address returned is DMA'ble */
781 if (!dma_capable(dev, dev_addr, size)) {
782 swiotlb_tbl_unmap_single(dev, map, size, dir);
783 return phys_to_dma(dev, io_tlb_overflow_buffer);
784 }
785
786 return dev_addr;
787 }
788 EXPORT_SYMBOL_GPL(swiotlb_map_page);
789
790 /*
791 * Unmap a single streaming mode DMA translation. The dma_addr and size must
792 * match what was provided for in a previous swiotlb_map_page call. All
793 * other usages are undefined.
794 *
795 * After this call, reads by the cpu to the buffer are guaranteed to see
796 * whatever the device wrote there.
797 */
unmap_single(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir)798 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
799 size_t size, enum dma_data_direction dir)
800 {
801 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
802
803 BUG_ON(dir == DMA_NONE);
804
805 if (is_swiotlb_buffer(paddr)) {
806 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
807 return;
808 }
809
810 if (dir != DMA_FROM_DEVICE)
811 return;
812
813 /*
814 * phys_to_virt doesn't work with hihgmem page but we could
815 * call dma_mark_clean() with hihgmem page here. However, we
816 * are fine since dma_mark_clean() is null on POWERPC. We can
817 * make dma_mark_clean() take a physical address if necessary.
818 */
819 dma_mark_clean(phys_to_virt(paddr), size);
820 }
821
swiotlb_unmap_page(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir,unsigned long attrs)822 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
823 size_t size, enum dma_data_direction dir,
824 unsigned long attrs)
825 {
826 unmap_single(hwdev, dev_addr, size, dir);
827 }
828 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
829
830 /*
831 * Make physical memory consistent for a single streaming mode DMA translation
832 * after a transfer.
833 *
834 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
835 * using the cpu, yet do not wish to teardown the dma mapping, you must
836 * call this function before doing so. At the next point you give the dma
837 * address back to the card, you must first perform a
838 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
839 */
840 static void
swiotlb_sync_single(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir,enum dma_sync_target target)841 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
842 size_t size, enum dma_data_direction dir,
843 enum dma_sync_target target)
844 {
845 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
846
847 BUG_ON(dir == DMA_NONE);
848
849 if (is_swiotlb_buffer(paddr)) {
850 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
851 return;
852 }
853
854 if (dir != DMA_FROM_DEVICE)
855 return;
856
857 dma_mark_clean(phys_to_virt(paddr), size);
858 }
859
860 void
swiotlb_sync_single_for_cpu(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir)861 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
862 size_t size, enum dma_data_direction dir)
863 {
864 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
865 }
866 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
867
868 void
swiotlb_sync_single_for_device(struct device * hwdev,dma_addr_t dev_addr,size_t size,enum dma_data_direction dir)869 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
870 size_t size, enum dma_data_direction dir)
871 {
872 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
873 }
874 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
875
876 /*
877 * Map a set of buffers described by scatterlist in streaming mode for DMA.
878 * This is the scatter-gather version of the above swiotlb_map_page
879 * interface. Here the scatter gather list elements are each tagged with the
880 * appropriate dma address and length. They are obtained via
881 * sg_dma_{address,length}(SG).
882 *
883 * NOTE: An implementation may be able to use a smaller number of
884 * DMA address/length pairs than there are SG table elements.
885 * (for example via virtual mapping capabilities)
886 * The routine returns the number of addr/length pairs actually
887 * used, at most nents.
888 *
889 * Device ownership issues as mentioned above for swiotlb_map_page are the
890 * same here.
891 */
892 int
swiotlb_map_sg_attrs(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir,unsigned long attrs)893 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
894 enum dma_data_direction dir, unsigned long attrs)
895 {
896 struct scatterlist *sg;
897 int i;
898
899 BUG_ON(dir == DMA_NONE);
900
901 for_each_sg(sgl, sg, nelems, i) {
902 phys_addr_t paddr = sg_phys(sg);
903 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
904
905 if (swiotlb_force == SWIOTLB_FORCE ||
906 !dma_capable(hwdev, dev_addr, sg->length)) {
907 phys_addr_t map = map_single(hwdev, sg_phys(sg),
908 sg->length, dir);
909 if (map == SWIOTLB_MAP_ERROR) {
910 /* Don't panic here, we expect map_sg users
911 to do proper error handling. */
912 swiotlb_full(hwdev, sg->length, dir, 0);
913 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
914 attrs);
915 sg_dma_len(sgl) = 0;
916 return 0;
917 }
918 sg->dma_address = phys_to_dma(hwdev, map);
919 } else
920 sg->dma_address = dev_addr;
921 sg_dma_len(sg) = sg->length;
922 }
923 return nelems;
924 }
925 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
926
927 int
swiotlb_map_sg(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir)928 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
929 enum dma_data_direction dir)
930 {
931 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, 0);
932 }
933 EXPORT_SYMBOL(swiotlb_map_sg);
934
935 /*
936 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
937 * concerning calls here are the same as for swiotlb_unmap_page() above.
938 */
939 void
swiotlb_unmap_sg_attrs(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir,unsigned long attrs)940 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
941 int nelems, enum dma_data_direction dir,
942 unsigned long attrs)
943 {
944 struct scatterlist *sg;
945 int i;
946
947 BUG_ON(dir == DMA_NONE);
948
949 for_each_sg(sgl, sg, nelems, i)
950 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
951
952 }
953 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
954
955 void
swiotlb_unmap_sg(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir)956 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
957 enum dma_data_direction dir)
958 {
959 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, 0);
960 }
961 EXPORT_SYMBOL(swiotlb_unmap_sg);
962
963 /*
964 * Make physical memory consistent for a set of streaming mode DMA translations
965 * after a transfer.
966 *
967 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
968 * and usage.
969 */
970 static void
swiotlb_sync_sg(struct device * hwdev,struct scatterlist * sgl,int nelems,enum dma_data_direction dir,enum dma_sync_target target)971 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
972 int nelems, enum dma_data_direction dir,
973 enum dma_sync_target target)
974 {
975 struct scatterlist *sg;
976 int i;
977
978 for_each_sg(sgl, sg, nelems, i)
979 swiotlb_sync_single(hwdev, sg->dma_address,
980 sg_dma_len(sg), dir, target);
981 }
982
983 void
swiotlb_sync_sg_for_cpu(struct device * hwdev,struct scatterlist * sg,int nelems,enum dma_data_direction dir)984 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
985 int nelems, enum dma_data_direction dir)
986 {
987 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
988 }
989 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
990
991 void
swiotlb_sync_sg_for_device(struct device * hwdev,struct scatterlist * sg,int nelems,enum dma_data_direction dir)992 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
993 int nelems, enum dma_data_direction dir)
994 {
995 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
996 }
997 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
998
999 int
swiotlb_dma_mapping_error(struct device * hwdev,dma_addr_t dma_addr)1000 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1001 {
1002 return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
1003 }
1004 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
1005
1006 /*
1007 * Return whether the given device DMA address mask can be supported
1008 * properly. For example, if your device can only drive the low 24-bits
1009 * during bus mastering, then you would pass 0x00ffffff as the mask to
1010 * this function.
1011 */
1012 int
swiotlb_dma_supported(struct device * hwdev,u64 mask)1013 swiotlb_dma_supported(struct device *hwdev, u64 mask)
1014 {
1015 return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
1016 }
1017 EXPORT_SYMBOL(swiotlb_dma_supported);
1018