1 /*
2 * Freescale MPC5200 PSC DMA
3 * ALSA SoC Platform driver
4 *
5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
6 * Copyright (C) 2009 Jon Smirl, Digispeaker
7 */
8
9 #include <linux/module.h>
10 #include <linux/of_device.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/slab.h>
13 #include <linux/of_address.h>
14 #include <linux/of_irq.h>
15 #include <linux/of_platform.h>
16
17 #include <sound/soc.h>
18
19 #include <linux/fsl/bestcomm/bestcomm.h>
20 #include <linux/fsl/bestcomm/gen_bd.h>
21 #include <asm/mpc52xx_psc.h>
22
23 #include "mpc5200_dma.h"
24
25 /*
26 * Interrupt handlers
27 */
psc_dma_status_irq(int irq,void * _psc_dma)28 static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
29 {
30 struct psc_dma *psc_dma = _psc_dma;
31 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
32 u16 isr;
33
34 isr = in_be16(®s->mpc52xx_psc_isr);
35
36 /* Playback underrun error */
37 if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
38 psc_dma->stats.underrun_count++;
39
40 /* Capture overrun error */
41 if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
42 psc_dma->stats.overrun_count++;
43
44 out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT);
45
46 return IRQ_HANDLED;
47 }
48
49 /**
50 * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
51 * @s: pointer to stream private data structure
52 *
53 * Enqueues another audio period buffer into the bestcomm queue.
54 *
55 * Note: The routine must only be called when there is space available in
56 * the queue. Otherwise the enqueue will fail and the audio ring buffer
57 * will get out of sync
58 */
psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream * s)59 static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
60 {
61 struct bcom_bd *bd;
62
63 /* Prepare and enqueue the next buffer descriptor */
64 bd = bcom_prepare_next_buffer(s->bcom_task);
65 bd->status = s->period_bytes;
66 bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
67 bcom_submit_next_buffer(s->bcom_task, NULL);
68
69 /* Update for next period */
70 s->period_next = (s->period_next + 1) % s->runtime->periods;
71 }
72
73 /* Bestcomm DMA irq handler */
psc_dma_bcom_irq(int irq,void * _psc_dma_stream)74 static irqreturn_t psc_dma_bcom_irq(int irq, void *_psc_dma_stream)
75 {
76 struct psc_dma_stream *s = _psc_dma_stream;
77
78 spin_lock(&s->psc_dma->lock);
79 /* For each finished period, dequeue the completed period buffer
80 * and enqueue a new one in it's place. */
81 while (bcom_buffer_done(s->bcom_task)) {
82 bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
83
84 s->period_current = (s->period_current+1) % s->runtime->periods;
85 s->period_count++;
86
87 psc_dma_bcom_enqueue_next_buffer(s);
88 }
89 spin_unlock(&s->psc_dma->lock);
90
91 /* If the stream is active, then also inform the PCM middle layer
92 * of the period finished event. */
93 if (s->active)
94 snd_pcm_period_elapsed(s->stream);
95
96 return IRQ_HANDLED;
97 }
98
psc_dma_hw_free(struct snd_pcm_substream * substream)99 static int psc_dma_hw_free(struct snd_pcm_substream *substream)
100 {
101 snd_pcm_set_runtime_buffer(substream, NULL);
102 return 0;
103 }
104
105 /**
106 * psc_dma_trigger: start and stop the DMA transfer.
107 *
108 * This function is called by ALSA to start, stop, pause, and resume the DMA
109 * transfer of data.
110 */
psc_dma_trigger(struct snd_pcm_substream * substream,int cmd)111 static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd)
112 {
113 struct snd_soc_pcm_runtime *rtd = substream->private_data;
114 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
115 struct snd_pcm_runtime *runtime = substream->runtime;
116 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
117 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
118 u16 imr;
119 unsigned long flags;
120 int i;
121
122 switch (cmd) {
123 case SNDRV_PCM_TRIGGER_START:
124 dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n",
125 substream->pstr->stream, runtime->frame_bits,
126 (int)runtime->period_size, runtime->periods);
127 s->period_bytes = frames_to_bytes(runtime,
128 runtime->period_size);
129 s->period_next = 0;
130 s->period_current = 0;
131 s->active = 1;
132 s->period_count = 0;
133 s->runtime = runtime;
134
135 /* Fill up the bestcomm bd queue and enable DMA.
136 * This will begin filling the PSC's fifo.
137 */
138 spin_lock_irqsave(&psc_dma->lock, flags);
139
140 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
141 bcom_gen_bd_rx_reset(s->bcom_task);
142 else
143 bcom_gen_bd_tx_reset(s->bcom_task);
144
145 for (i = 0; i < runtime->periods; i++)
146 if (!bcom_queue_full(s->bcom_task))
147 psc_dma_bcom_enqueue_next_buffer(s);
148
149 bcom_enable(s->bcom_task);
150 spin_unlock_irqrestore(&psc_dma->lock, flags);
151
152 out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT);
153
154 break;
155
156 case SNDRV_PCM_TRIGGER_STOP:
157 dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n",
158 substream->pstr->stream, s->period_count);
159 s->active = 0;
160
161 spin_lock_irqsave(&psc_dma->lock, flags);
162 bcom_disable(s->bcom_task);
163 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
164 bcom_gen_bd_rx_reset(s->bcom_task);
165 else
166 bcom_gen_bd_tx_reset(s->bcom_task);
167 spin_unlock_irqrestore(&psc_dma->lock, flags);
168
169 break;
170
171 default:
172 dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n",
173 substream->pstr->stream, cmd);
174 return -EINVAL;
175 }
176
177 /* Update interrupt enable settings */
178 imr = 0;
179 if (psc_dma->playback.active)
180 imr |= MPC52xx_PSC_IMR_TXEMP;
181 if (psc_dma->capture.active)
182 imr |= MPC52xx_PSC_IMR_ORERR;
183 out_be16(®s->isr_imr.imr, psc_dma->imr | imr);
184
185 return 0;
186 }
187
188
189 /* ---------------------------------------------------------------------
190 * The PSC DMA 'ASoC platform' driver
191 *
192 * Can be referenced by an 'ASoC machine' driver
193 * This driver only deals with the audio bus; it doesn't have any
194 * interaction with the attached codec
195 */
196
197 static const struct snd_pcm_hardware psc_dma_hardware = {
198 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
199 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
200 SNDRV_PCM_INFO_BATCH,
201 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
202 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
203 .period_bytes_max = 1024 * 1024,
204 .period_bytes_min = 32,
205 .periods_min = 2,
206 .periods_max = 256,
207 .buffer_bytes_max = 2 * 1024 * 1024,
208 .fifo_size = 512,
209 };
210
psc_dma_open(struct snd_pcm_substream * substream)211 static int psc_dma_open(struct snd_pcm_substream *substream)
212 {
213 struct snd_pcm_runtime *runtime = substream->runtime;
214 struct snd_soc_pcm_runtime *rtd = substream->private_data;
215 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
216 struct psc_dma_stream *s;
217 int rc;
218
219 dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
220
221 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
222 s = &psc_dma->capture;
223 else
224 s = &psc_dma->playback;
225
226 snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
227
228 rc = snd_pcm_hw_constraint_integer(runtime,
229 SNDRV_PCM_HW_PARAM_PERIODS);
230 if (rc < 0) {
231 dev_err(substream->pcm->card->dev, "invalid buffer size\n");
232 return rc;
233 }
234
235 s->stream = substream;
236 return 0;
237 }
238
psc_dma_close(struct snd_pcm_substream * substream)239 static int psc_dma_close(struct snd_pcm_substream *substream)
240 {
241 struct snd_soc_pcm_runtime *rtd = substream->private_data;
242 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
243 struct psc_dma_stream *s;
244
245 dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
246
247 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
248 s = &psc_dma->capture;
249 else
250 s = &psc_dma->playback;
251
252 if (!psc_dma->playback.active &&
253 !psc_dma->capture.active) {
254
255 /* Disable all interrupts and reset the PSC */
256 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
257 out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
258 }
259 s->stream = NULL;
260 return 0;
261 }
262
263 static snd_pcm_uframes_t
psc_dma_pointer(struct snd_pcm_substream * substream)264 psc_dma_pointer(struct snd_pcm_substream *substream)
265 {
266 struct snd_soc_pcm_runtime *rtd = substream->private_data;
267 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
268 struct psc_dma_stream *s;
269 dma_addr_t count;
270
271 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
272 s = &psc_dma->capture;
273 else
274 s = &psc_dma->playback;
275
276 count = s->period_current * s->period_bytes;
277
278 return bytes_to_frames(substream->runtime, count);
279 }
280
281 static int
psc_dma_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)282 psc_dma_hw_params(struct snd_pcm_substream *substream,
283 struct snd_pcm_hw_params *params)
284 {
285 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
286
287 return 0;
288 }
289
290 static struct snd_pcm_ops psc_dma_ops = {
291 .open = psc_dma_open,
292 .close = psc_dma_close,
293 .hw_free = psc_dma_hw_free,
294 .ioctl = snd_pcm_lib_ioctl,
295 .pointer = psc_dma_pointer,
296 .trigger = psc_dma_trigger,
297 .hw_params = psc_dma_hw_params,
298 };
299
psc_dma_new(struct snd_soc_pcm_runtime * rtd)300 static int psc_dma_new(struct snd_soc_pcm_runtime *rtd)
301 {
302 struct snd_card *card = rtd->card->snd_card;
303 struct snd_soc_dai *dai = rtd->cpu_dai;
304 struct snd_pcm *pcm = rtd->pcm;
305 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
306 size_t size = psc_dma_hardware.buffer_bytes_max;
307 int rc;
308
309 dev_dbg(rtd->platform->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
310 card, dai, pcm);
311
312 rc = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
313 if (rc)
314 return rc;
315
316 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
317 rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
318 size, &pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
319 if (rc)
320 goto playback_alloc_err;
321 }
322
323 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
324 rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
325 size, &pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->dma_buffer);
326 if (rc)
327 goto capture_alloc_err;
328 }
329
330 return 0;
331
332 capture_alloc_err:
333 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream)
334 snd_dma_free_pages(&pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
335
336 playback_alloc_err:
337 dev_err(card->dev, "Cannot allocate buffer(s)\n");
338
339 return -ENOMEM;
340 }
341
psc_dma_free(struct snd_pcm * pcm)342 static void psc_dma_free(struct snd_pcm *pcm)
343 {
344 struct snd_soc_pcm_runtime *rtd = pcm->private_data;
345 struct snd_pcm_substream *substream;
346 int stream;
347
348 dev_dbg(rtd->platform->dev, "psc_dma_free(pcm=%p)\n", pcm);
349
350 for (stream = 0; stream < 2; stream++) {
351 substream = pcm->streams[stream].substream;
352 if (substream) {
353 snd_dma_free_pages(&substream->dma_buffer);
354 substream->dma_buffer.area = NULL;
355 substream->dma_buffer.addr = 0;
356 }
357 }
358 }
359
360 static struct snd_soc_platform_driver mpc5200_audio_dma_platform = {
361 .ops = &psc_dma_ops,
362 .pcm_new = &psc_dma_new,
363 .pcm_free = &psc_dma_free,
364 };
365
mpc5200_audio_dma_create(struct platform_device * op)366 int mpc5200_audio_dma_create(struct platform_device *op)
367 {
368 phys_addr_t fifo;
369 struct psc_dma *psc_dma;
370 struct resource res;
371 int size, irq, rc;
372 const __be32 *prop;
373 void __iomem *regs;
374 int ret;
375
376 /* Fetch the registers and IRQ of the PSC */
377 irq = irq_of_parse_and_map(op->dev.of_node, 0);
378 if (of_address_to_resource(op->dev.of_node, 0, &res)) {
379 dev_err(&op->dev, "Missing reg property\n");
380 return -ENODEV;
381 }
382 regs = ioremap(res.start, resource_size(&res));
383 if (!regs) {
384 dev_err(&op->dev, "Could not map registers\n");
385 return -ENODEV;
386 }
387
388 /* Allocate and initialize the driver private data */
389 psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
390 if (!psc_dma) {
391 ret = -ENOMEM;
392 goto out_unmap;
393 }
394
395 /* Get the PSC ID */
396 prop = of_get_property(op->dev.of_node, "cell-index", &size);
397 if (!prop || size < sizeof *prop) {
398 ret = -ENODEV;
399 goto out_free;
400 }
401
402 spin_lock_init(&psc_dma->lock);
403 mutex_init(&psc_dma->mutex);
404 psc_dma->id = be32_to_cpu(*prop);
405 psc_dma->irq = irq;
406 psc_dma->psc_regs = regs;
407 psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
408 psc_dma->dev = &op->dev;
409 psc_dma->playback.psc_dma = psc_dma;
410 psc_dma->capture.psc_dma = psc_dma;
411 snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id);
412
413 /* Find the address of the fifo data registers and setup the
414 * DMA tasks */
415 fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
416 psc_dma->capture.bcom_task =
417 bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
418 psc_dma->playback.bcom_task =
419 bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
420 if (!psc_dma->capture.bcom_task ||
421 !psc_dma->playback.bcom_task) {
422 dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
423 ret = -ENODEV;
424 goto out_free;
425 }
426
427 /* Disable all interrupts and reset the PSC */
428 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
429 /* reset receiver */
430 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
431 /* reset transmitter */
432 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
433 /* reset error */
434 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
435 /* reset mode */
436 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
437
438 /* Set up mode register;
439 * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
440 * Second write: register Normal mode for non loopback
441 */
442 out_8(&psc_dma->psc_regs->mode, 0);
443 out_8(&psc_dma->psc_regs->mode, 0);
444
445 /* Set the TX and RX fifo alarm thresholds */
446 out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
447 out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
448 out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
449 out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
450
451 /* Lookup the IRQ numbers */
452 psc_dma->playback.irq =
453 bcom_get_task_irq(psc_dma->playback.bcom_task);
454 psc_dma->capture.irq =
455 bcom_get_task_irq(psc_dma->capture.bcom_task);
456
457 rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
458 "psc-dma-status", psc_dma);
459 rc |= request_irq(psc_dma->capture.irq, &psc_dma_bcom_irq, IRQF_SHARED,
460 "psc-dma-capture", &psc_dma->capture);
461 rc |= request_irq(psc_dma->playback.irq, &psc_dma_bcom_irq, IRQF_SHARED,
462 "psc-dma-playback", &psc_dma->playback);
463 if (rc) {
464 ret = -ENODEV;
465 goto out_irq;
466 }
467
468 /* Save what we've done so it can be found again later */
469 dev_set_drvdata(&op->dev, psc_dma);
470
471 /* Tell the ASoC OF helpers about it */
472 return snd_soc_register_platform(&op->dev, &mpc5200_audio_dma_platform);
473 out_irq:
474 free_irq(psc_dma->irq, psc_dma);
475 free_irq(psc_dma->capture.irq, &psc_dma->capture);
476 free_irq(psc_dma->playback.irq, &psc_dma->playback);
477 out_free:
478 kfree(psc_dma);
479 out_unmap:
480 iounmap(regs);
481 return ret;
482 }
483 EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
484
mpc5200_audio_dma_destroy(struct platform_device * op)485 int mpc5200_audio_dma_destroy(struct platform_device *op)
486 {
487 struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
488
489 dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
490
491 snd_soc_unregister_platform(&op->dev);
492
493 bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
494 bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
495
496 /* Release irqs */
497 free_irq(psc_dma->irq, psc_dma);
498 free_irq(psc_dma->capture.irq, &psc_dma->capture);
499 free_irq(psc_dma->playback.irq, &psc_dma->playback);
500
501 iounmap(psc_dma->psc_regs);
502 kfree(psc_dma);
503 dev_set_drvdata(&op->dev, NULL);
504
505 return 0;
506 }
507 EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
508
509 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
510 MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
511 MODULE_LICENSE("GPL");
512