2703 	WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);  in qla24xx_reset_risc()
2720 	WRT_REG_DWORD(&reg->ctrl_status,  in qla24xx_reset_risc()
2780 	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);  in qla24xx_reset_risc()
2783 	WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);  in qla24xx_reset_risc()
2786 	WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);  in qla24xx_reset_risc()
2823 	WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);  in qla25xx_read_risc_sema_reg()
2833 	WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);  in qla25xx_write_risc_sema_reg()
2834 	WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);  in qla25xx_write_risc_sema_reg()
2850 	WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);  in qla25xx_manipulate_risc_semaphore()
3992 		WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);  in qla24xx_config_rings()
3993 		WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);  in qla24xx_config_rings()
3994 		WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);  in qla24xx_config_rings()
3995 		WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);  in qla24xx_config_rings()
3997 		WRT_REG_DWORD(&reg->isp24.req_q_in, 0);  in qla24xx_config_rings()
3998 		WRT_REG_DWORD(&reg->isp24.req_q_out, 0);  in qla24xx_config_rings()
3999 		WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);  in qla24xx_config_rings()
4000 		WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);  in qla24xx_config_rings()
7023 	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);  in qla24xx_reset_adapter()
7025 	WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);  in qla24xx_reset_adapter()