1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
34 static int qla2x00_restart_isp(scsi_qla_host_t *);
35
36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37 static int qla84xx_init_chip(scsi_qla_host_t *);
38 static int qla25xx_init_queues(struct qla_hw_data *);
39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
40 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
41 struct event_arg *ea);
42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
45
46 /* SRB Extensions ---------------------------------------------------------- */
47
48 void
qla2x00_sp_timeout(struct timer_list * t)49 qla2x00_sp_timeout(struct timer_list *t)
50 {
51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
52 struct srb_iocb *iocb;
53 struct req_que *req;
54 unsigned long flags;
55 struct qla_hw_data *ha = sp->vha->hw;
56
57 WARN_ON_ONCE(irqs_disabled());
58 spin_lock_irqsave(&ha->hardware_lock, flags);
59 req = sp->qpair->req;
60 req->outstanding_cmds[sp->handle] = NULL;
61 iocb = &sp->u.iocb_cmd;
62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
63 iocb->timeout(sp);
64 }
65
qla2x00_sp_free(srb_t * sp)66 void qla2x00_sp_free(srb_t *sp)
67 {
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69
70 del_timer(&iocb->timer);
71 qla2x00_rel_sp(sp);
72 }
73
74 /* Asynchronous Login/Logout Routines -------------------------------------- */
75
76 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)77 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
78 {
79 unsigned long tmo;
80 struct qla_hw_data *ha = vha->hw;
81
82 /* Firmware should use switch negotiated r_a_tov for timeout. */
83 tmo = ha->r_a_tov / 10 * 2;
84 if (IS_QLAFX00(ha)) {
85 tmo = FX00_DEF_RATOV * 2;
86 } else if (!IS_FWI2_CAPABLE(ha)) {
87 /*
88 * Except for earlier ISPs where the timeout is seeded from the
89 * initialization control block.
90 */
91 tmo = ha->login_timeout;
92 }
93 return tmo;
94 }
95
qla24xx_abort_iocb_timeout(void * data)96 static void qla24xx_abort_iocb_timeout(void *data)
97 {
98 srb_t *sp = data;
99 struct srb_iocb *abt = &sp->u.iocb_cmd;
100 struct qla_qpair *qpair = sp->qpair;
101 u32 handle;
102 unsigned long flags;
103
104 if (sp->cmd_sp)
105 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
106 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
107 sp->cmd_sp->handle, sp->cmd_sp->type,
108 sp->handle, sp->type);
109 else
110 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
111 "Abort timeout 2 - hdl=%x, type=%x\n",
112 sp->handle, sp->type);
113
114 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
115 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
116 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
117 sp->cmd_sp))
118 qpair->req->outstanding_cmds[handle] = NULL;
119
120 /* removing the abort */
121 if (qpair->req->outstanding_cmds[handle] == sp) {
122 qpair->req->outstanding_cmds[handle] = NULL;
123 break;
124 }
125 }
126 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
127
128 if (sp->cmd_sp)
129 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
130
131 abt->u.abt.comp_status = CS_TIMEOUT;
132 sp->done(sp, QLA_OS_TIMER_EXPIRED);
133 }
134
qla24xx_abort_sp_done(srb_t * sp,int res)135 static void qla24xx_abort_sp_done(srb_t *sp, int res)
136 {
137 struct srb_iocb *abt = &sp->u.iocb_cmd;
138
139 del_timer(&sp->u.iocb_cmd.timer);
140 if (sp->flags & SRB_WAKEUP_ON_COMP)
141 complete(&abt->u.abt.comp);
142 else
143 sp->free(sp);
144 }
145
qla24xx_async_abort_cmd(srb_t * cmd_sp,bool wait)146 static int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
147 {
148 scsi_qla_host_t *vha = cmd_sp->vha;
149 struct srb_iocb *abt_iocb;
150 srb_t *sp;
151 int rval = QLA_FUNCTION_FAILED;
152
153 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
154 GFP_ATOMIC);
155 if (!sp)
156 return rval;
157
158 abt_iocb = &sp->u.iocb_cmd;
159 sp->type = SRB_ABT_CMD;
160 sp->name = "abort";
161 sp->qpair = cmd_sp->qpair;
162 sp->cmd_sp = cmd_sp;
163 if (wait)
164 sp->flags = SRB_WAKEUP_ON_COMP;
165
166 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
167 init_completion(&abt_iocb->u.abt.comp);
168 /* FW can send 2 x ABTS's timeout/20s */
169 qla2x00_init_timer(sp, 42);
170
171 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
172 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
173
174 sp->done = qla24xx_abort_sp_done;
175
176 ql_dbg(ql_dbg_async, vha, 0x507c,
177 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
178 cmd_sp->type);
179
180 rval = qla2x00_start_sp(sp);
181 if (rval != QLA_SUCCESS) {
182 sp->free(sp);
183 return rval;
184 }
185
186 if (wait) {
187 wait_for_completion(&abt_iocb->u.abt.comp);
188 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
189 QLA_SUCCESS : QLA_FUNCTION_FAILED;
190 sp->free(sp);
191 }
192
193 return rval;
194 }
195
196 void
qla2x00_async_iocb_timeout(void * data)197 qla2x00_async_iocb_timeout(void *data)
198 {
199 srb_t *sp = data;
200 fc_port_t *fcport = sp->fcport;
201 struct srb_iocb *lio = &sp->u.iocb_cmd;
202 int rc, h;
203 unsigned long flags;
204
205 if (fcport) {
206 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
207 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
208 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
209
210 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
211 } else {
212 pr_info("Async-%s timeout - hdl=%x.\n",
213 sp->name, sp->handle);
214 }
215
216 switch (sp->type) {
217 case SRB_LOGIN_CMD:
218 rc = qla24xx_async_abort_cmd(sp, false);
219 if (rc) {
220 /* Retry as needed. */
221 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
222 lio->u.logio.data[1] =
223 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
224 QLA_LOGIO_LOGIN_RETRIED : 0;
225 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
226 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
227 h++) {
228 if (sp->qpair->req->outstanding_cmds[h] ==
229 sp) {
230 sp->qpair->req->outstanding_cmds[h] =
231 NULL;
232 break;
233 }
234 }
235 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
236 sp->done(sp, QLA_FUNCTION_TIMEOUT);
237 }
238 break;
239 case SRB_LOGOUT_CMD:
240 case SRB_CT_PTHRU_CMD:
241 case SRB_MB_IOCB:
242 case SRB_NACK_PLOGI:
243 case SRB_NACK_PRLI:
244 case SRB_NACK_LOGO:
245 case SRB_CTRL_VP:
246 rc = qla24xx_async_abort_cmd(sp, false);
247 if (rc) {
248 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
249 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
250 h++) {
251 if (sp->qpair->req->outstanding_cmds[h] ==
252 sp) {
253 sp->qpair->req->outstanding_cmds[h] =
254 NULL;
255 break;
256 }
257 }
258 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
259 sp->done(sp, QLA_FUNCTION_TIMEOUT);
260 }
261 break;
262 default:
263 WARN_ON_ONCE(true);
264 sp->done(sp, QLA_FUNCTION_TIMEOUT);
265 break;
266 }
267 }
268
qla2x00_async_login_sp_done(srb_t * sp,int res)269 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
270 {
271 struct scsi_qla_host *vha = sp->vha;
272 struct srb_iocb *lio = &sp->u.iocb_cmd;
273 struct event_arg ea;
274
275 ql_dbg(ql_dbg_disc, vha, 0x20dd,
276 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
277
278 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
279
280 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
281 memset(&ea, 0, sizeof(ea));
282 ea.fcport = sp->fcport;
283 ea.data[0] = lio->u.logio.data[0];
284 ea.data[1] = lio->u.logio.data[1];
285 ea.iop[0] = lio->u.logio.iop[0];
286 ea.iop[1] = lio->u.logio.iop[1];
287 ea.sp = sp;
288 qla24xx_handle_plogi_done_event(vha, &ea);
289 }
290
291 sp->free(sp);
292 }
293
294 static inline bool
fcport_is_smaller(fc_port_t * fcport)295 fcport_is_smaller(fc_port_t *fcport)
296 {
297 if (wwn_to_u64(fcport->port_name) <
298 wwn_to_u64(fcport->vha->port_name))
299 return true;
300 else
301 return false;
302 }
303
304 static inline bool
fcport_is_bigger(fc_port_t * fcport)305 fcport_is_bigger(fc_port_t *fcport)
306 {
307 return !fcport_is_smaller(fcport);
308 }
309
310 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)311 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
312 uint16_t *data)
313 {
314 srb_t *sp;
315 struct srb_iocb *lio;
316 int rval = QLA_FUNCTION_FAILED;
317
318 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
319 fcport->loop_id == FC_NO_LOOP_ID) {
320 ql_log(ql_log_warn, vha, 0xffff,
321 "%s: %8phC - not sending command.\n",
322 __func__, fcport->port_name);
323 return rval;
324 }
325
326 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
327 if (!sp)
328 goto done;
329
330 fcport->flags |= FCF_ASYNC_SENT;
331 fcport->logout_completed = 0;
332
333 fcport->disc_state = DSC_LOGIN_PEND;
334 sp->type = SRB_LOGIN_CMD;
335 sp->name = "login";
336 sp->gen1 = fcport->rscn_gen;
337 sp->gen2 = fcport->login_gen;
338
339 lio = &sp->u.iocb_cmd;
340 lio->timeout = qla2x00_async_iocb_timeout;
341 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
342
343 sp->done = qla2x00_async_login_sp_done;
344 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
345 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
346 else
347 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
348
349 if (fcport->fc4f_nvme)
350 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
351
352 ql_dbg(ql_dbg_disc, vha, 0x2072,
353 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
354 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
355 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
356 fcport->login_retry);
357
358 rval = qla2x00_start_sp(sp);
359 if (rval != QLA_SUCCESS) {
360 fcport->flags |= FCF_LOGIN_NEEDED;
361 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
362 goto done_free_sp;
363 }
364
365 return rval;
366
367 done_free_sp:
368 sp->free(sp);
369 fcport->flags &= ~FCF_ASYNC_SENT;
370 done:
371 fcport->flags &= ~FCF_ASYNC_ACTIVE;
372 return rval;
373 }
374
qla2x00_async_logout_sp_done(srb_t * sp,int res)375 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
376 {
377 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
378 sp->fcport->login_gen++;
379 qlt_logo_completion_handler(sp->fcport, res);
380 sp->free(sp);
381 }
382
383 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)384 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
385 {
386 srb_t *sp;
387 struct srb_iocb *lio;
388 int rval = QLA_FUNCTION_FAILED;
389
390 fcport->flags |= FCF_ASYNC_SENT;
391 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
392 if (!sp)
393 goto done;
394
395 sp->type = SRB_LOGOUT_CMD;
396 sp->name = "logout";
397
398 lio = &sp->u.iocb_cmd;
399 lio->timeout = qla2x00_async_iocb_timeout;
400 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
401
402 sp->done = qla2x00_async_logout_sp_done;
403
404 ql_dbg(ql_dbg_disc, vha, 0x2070,
405 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
406 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
407 fcport->d_id.b.area, fcport->d_id.b.al_pa,
408 fcport->port_name);
409
410 rval = qla2x00_start_sp(sp);
411 if (rval != QLA_SUCCESS)
412 goto done_free_sp;
413 return rval;
414
415 done_free_sp:
416 sp->free(sp);
417 done:
418 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
419 return rval;
420 }
421
422 void
qla2x00_async_prlo_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)423 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
424 uint16_t *data)
425 {
426 fcport->flags &= ~FCF_ASYNC_ACTIVE;
427 /* Don't re-login in target mode */
428 if (!fcport->tgt_session)
429 qla2x00_mark_device_lost(vha, fcport, 1, 0);
430 qlt_logo_completion_handler(fcport, data[0]);
431 }
432
qla2x00_async_prlo_sp_done(srb_t * sp,int res)433 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
434 {
435 struct srb_iocb *lio = &sp->u.iocb_cmd;
436 struct scsi_qla_host *vha = sp->vha;
437
438 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
439 if (!test_bit(UNLOADING, &vha->dpc_flags))
440 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
441 lio->u.logio.data);
442 sp->free(sp);
443 }
444
445 int
qla2x00_async_prlo(struct scsi_qla_host * vha,fc_port_t * fcport)446 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
447 {
448 srb_t *sp;
449 struct srb_iocb *lio;
450 int rval;
451
452 rval = QLA_FUNCTION_FAILED;
453 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
454 if (!sp)
455 goto done;
456
457 sp->type = SRB_PRLO_CMD;
458 sp->name = "prlo";
459
460 lio = &sp->u.iocb_cmd;
461 lio->timeout = qla2x00_async_iocb_timeout;
462 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
463
464 sp->done = qla2x00_async_prlo_sp_done;
465
466 ql_dbg(ql_dbg_disc, vha, 0x2070,
467 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
468 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
469 fcport->d_id.b.area, fcport->d_id.b.al_pa);
470
471 rval = qla2x00_start_sp(sp);
472 if (rval != QLA_SUCCESS)
473 goto done_free_sp;
474
475 return rval;
476
477 done_free_sp:
478 sp->free(sp);
479 done:
480 fcport->flags &= ~FCF_ASYNC_ACTIVE;
481 return rval;
482 }
483
484 static
qla24xx_handle_adisc_event(scsi_qla_host_t * vha,struct event_arg * ea)485 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
486 {
487 struct fc_port *fcport = ea->fcport;
488
489 ql_dbg(ql_dbg_disc, vha, 0x20d2,
490 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
491 __func__, fcport->port_name, fcport->disc_state,
492 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
493 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
494
495 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
496 ea->data[0]);
497
498 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
499 ql_dbg(ql_dbg_disc, vha, 0x2066,
500 "%s %8phC: adisc fail: post delete\n",
501 __func__, ea->fcport->port_name);
502 /* deleted = 0 & logout_on_delete = force fw cleanup */
503 fcport->deleted = 0;
504 fcport->logout_on_delete = 1;
505 qlt_schedule_sess_for_deletion(ea->fcport);
506 return;
507 }
508
509 if (ea->fcport->disc_state == DSC_DELETE_PEND)
510 return;
511
512 if (ea->sp->gen2 != ea->fcport->login_gen) {
513 /* target side must have changed it. */
514 ql_dbg(ql_dbg_disc, vha, 0x20d3,
515 "%s %8phC generation changed\n",
516 __func__, ea->fcport->port_name);
517 return;
518 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
519 qla_rscn_replay(fcport);
520 qlt_schedule_sess_for_deletion(fcport);
521 return;
522 }
523
524 __qla24xx_handle_gpdb_event(vha, ea);
525 }
526
qla_post_els_plogi_work(struct scsi_qla_host * vha,fc_port_t * fcport)527 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
528 {
529 struct qla_work_evt *e;
530
531 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
532 if (!e)
533 return QLA_FUNCTION_FAILED;
534
535 e->u.fcport.fcport = fcport;
536 fcport->flags |= FCF_ASYNC_ACTIVE;
537 fcport->disc_state = DSC_LOGIN_PEND;
538 return qla2x00_post_work(vha, e);
539 }
540
qla2x00_async_adisc_sp_done(srb_t * sp,int res)541 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
542 {
543 struct scsi_qla_host *vha = sp->vha;
544 struct event_arg ea;
545 struct srb_iocb *lio = &sp->u.iocb_cmd;
546
547 ql_dbg(ql_dbg_disc, vha, 0x2066,
548 "Async done-%s res %x %8phC\n",
549 sp->name, res, sp->fcport->port_name);
550
551 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
552
553 memset(&ea, 0, sizeof(ea));
554 ea.rc = res;
555 ea.data[0] = lio->u.logio.data[0];
556 ea.data[1] = lio->u.logio.data[1];
557 ea.iop[0] = lio->u.logio.iop[0];
558 ea.iop[1] = lio->u.logio.iop[1];
559 ea.fcport = sp->fcport;
560 ea.sp = sp;
561
562 qla24xx_handle_adisc_event(vha, &ea);
563
564 sp->free(sp);
565 }
566
567 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)568 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
569 uint16_t *data)
570 {
571 srb_t *sp;
572 struct srb_iocb *lio;
573 int rval = QLA_FUNCTION_FAILED;
574
575 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
576 return rval;
577
578 fcport->flags |= FCF_ASYNC_SENT;
579 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
580 if (!sp)
581 goto done;
582
583 sp->type = SRB_ADISC_CMD;
584 sp->name = "adisc";
585
586 lio = &sp->u.iocb_cmd;
587 lio->timeout = qla2x00_async_iocb_timeout;
588 sp->gen1 = fcport->rscn_gen;
589 sp->gen2 = fcport->login_gen;
590 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
591
592 sp->done = qla2x00_async_adisc_sp_done;
593 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
594 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
595
596 ql_dbg(ql_dbg_disc, vha, 0x206f,
597 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
598 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
599
600 rval = qla2x00_start_sp(sp);
601 if (rval != QLA_SUCCESS)
602 goto done_free_sp;
603
604 return rval;
605
606 done_free_sp:
607 sp->free(sp);
608 done:
609 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
610 qla2x00_post_async_adisc_work(vha, fcport, data);
611 return rval;
612 }
613
qla2x00_is_reserved_id(scsi_qla_host_t * vha,uint16_t loop_id)614 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
615 {
616 struct qla_hw_data *ha = vha->hw;
617
618 if (IS_FWI2_CAPABLE(ha))
619 return loop_id > NPH_LAST_HANDLE;
620
621 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
622 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
623 }
624
625 /**
626 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
627 * @vha: adapter state pointer.
628 * @dev: port structure pointer.
629 *
630 * Returns:
631 * qla2x00 local function return status code.
632 *
633 * Context:
634 * Kernel context.
635 */
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)636 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
637 {
638 int rval;
639 struct qla_hw_data *ha = vha->hw;
640 unsigned long flags = 0;
641
642 rval = QLA_SUCCESS;
643
644 spin_lock_irqsave(&ha->vport_slock, flags);
645
646 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
647 if (dev->loop_id >= LOOPID_MAP_SIZE ||
648 qla2x00_is_reserved_id(vha, dev->loop_id)) {
649 dev->loop_id = FC_NO_LOOP_ID;
650 rval = QLA_FUNCTION_FAILED;
651 } else {
652 set_bit(dev->loop_id, ha->loop_id_map);
653 }
654 spin_unlock_irqrestore(&ha->vport_slock, flags);
655
656 if (rval == QLA_SUCCESS)
657 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
658 "Assigning new loopid=%x, portid=%x.\n",
659 dev->loop_id, dev->d_id.b24);
660 else
661 ql_log(ql_log_warn, dev->vha, 0x2087,
662 "No loop_id's available, portid=%x.\n",
663 dev->d_id.b24);
664
665 return rval;
666 }
667
qla2x00_clear_loop_id(fc_port_t * fcport)668 void qla2x00_clear_loop_id(fc_port_t *fcport)
669 {
670 struct qla_hw_data *ha = fcport->vha->hw;
671
672 if (fcport->loop_id == FC_NO_LOOP_ID ||
673 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
674 return;
675
676 clear_bit(fcport->loop_id, ha->loop_id_map);
677 fcport->loop_id = FC_NO_LOOP_ID;
678 }
679
qla24xx_handle_gnl_done_event(scsi_qla_host_t * vha,struct event_arg * ea)680 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
681 struct event_arg *ea)
682 {
683 fc_port_t *fcport, *conflict_fcport;
684 struct get_name_list_extended *e;
685 u16 i, n, found = 0, loop_id;
686 port_id_t id;
687 u64 wwn;
688 u16 data[2];
689 u8 current_login_state;
690
691 fcport = ea->fcport;
692 ql_dbg(ql_dbg_disc, vha, 0xffff,
693 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
694 __func__, fcport->port_name, fcport->disc_state,
695 fcport->fw_login_state, ea->rc,
696 fcport->login_gen, fcport->last_login_gen,
697 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
698
699 if (fcport->disc_state == DSC_DELETE_PEND)
700 return;
701
702 if (ea->rc) { /* rval */
703 if (fcport->login_retry == 0) {
704 ql_dbg(ql_dbg_disc, vha, 0x20de,
705 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
706 fcport->port_name, fcport->login_retry);
707 }
708 return;
709 }
710
711 if (fcport->last_rscn_gen != fcport->rscn_gen) {
712 qla_rscn_replay(fcport);
713 qlt_schedule_sess_for_deletion(fcport);
714 return;
715 } else if (fcport->last_login_gen != fcport->login_gen) {
716 ql_dbg(ql_dbg_disc, vha, 0x20e0,
717 "%s %8phC login gen changed\n",
718 __func__, fcport->port_name);
719 return;
720 }
721
722 n = ea->data[0] / sizeof(struct get_name_list_extended);
723
724 ql_dbg(ql_dbg_disc, vha, 0x20e1,
725 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
726 __func__, __LINE__, fcport->port_name, n,
727 fcport->d_id.b.domain, fcport->d_id.b.area,
728 fcport->d_id.b.al_pa, fcport->loop_id);
729
730 for (i = 0; i < n; i++) {
731 e = &vha->gnl.l[i];
732 wwn = wwn_to_u64(e->port_name);
733 id.b.domain = e->port_id[2];
734 id.b.area = e->port_id[1];
735 id.b.al_pa = e->port_id[0];
736 id.b.rsvd_1 = 0;
737
738 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
739 continue;
740
741 if (IS_SW_RESV_ADDR(id))
742 continue;
743
744 found = 1;
745
746 loop_id = le16_to_cpu(e->nport_handle);
747 loop_id = (loop_id & 0x7fff);
748 if (fcport->fc4f_nvme)
749 current_login_state = e->current_login_state >> 4;
750 else
751 current_login_state = e->current_login_state & 0xf;
752
753
754 ql_dbg(ql_dbg_disc, vha, 0x20e2,
755 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
756 __func__, fcport->port_name,
757 e->current_login_state, fcport->fw_login_state,
758 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa,
759 fcport->d_id.b.domain, fcport->d_id.b.area,
760 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
761
762 switch (fcport->disc_state) {
763 case DSC_DELETE_PEND:
764 case DSC_DELETED:
765 break;
766 default:
767 if ((id.b24 != fcport->d_id.b24 &&
768 fcport->d_id.b24 &&
769 fcport->loop_id != FC_NO_LOOP_ID) ||
770 (fcport->loop_id != FC_NO_LOOP_ID &&
771 fcport->loop_id != loop_id)) {
772 ql_dbg(ql_dbg_disc, vha, 0x20e3,
773 "%s %d %8phC post del sess\n",
774 __func__, __LINE__, fcport->port_name);
775 if (fcport->n2n_flag)
776 fcport->d_id.b24 = 0;
777 qlt_schedule_sess_for_deletion(fcport);
778 return;
779 }
780 break;
781 }
782
783 fcport->loop_id = loop_id;
784 if (fcport->n2n_flag)
785 fcport->d_id.b24 = id.b24;
786
787 wwn = wwn_to_u64(fcport->port_name);
788 qlt_find_sess_invalidate_other(vha, wwn,
789 id, loop_id, &conflict_fcport);
790
791 if (conflict_fcport) {
792 /*
793 * Another share fcport share the same loop_id &
794 * nport id. Conflict fcport needs to finish
795 * cleanup before this fcport can proceed to login.
796 */
797 conflict_fcport->conflict = fcport;
798 fcport->login_pause = 1;
799 }
800
801 switch (vha->hw->current_topology) {
802 default:
803 switch (current_login_state) {
804 case DSC_LS_PRLI_COMP:
805 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
806 vha, 0x20e4, "%s %d %8phC post gpdb\n",
807 __func__, __LINE__, fcport->port_name);
808
809 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
810 fcport->port_type = FCT_INITIATOR;
811 else
812 fcport->port_type = FCT_TARGET;
813 data[0] = data[1] = 0;
814 qla2x00_post_async_adisc_work(vha, fcport,
815 data);
816 break;
817 case DSC_LS_PORT_UNAVAIL:
818 default:
819 if (fcport->loop_id == FC_NO_LOOP_ID) {
820 qla2x00_find_new_loop_id(vha, fcport);
821 fcport->fw_login_state =
822 DSC_LS_PORT_UNAVAIL;
823 }
824 ql_dbg(ql_dbg_disc, vha, 0x20e5,
825 "%s %d %8phC\n", __func__, __LINE__,
826 fcport->port_name);
827 qla24xx_fcport_handle_login(vha, fcport);
828 break;
829 }
830 break;
831 case ISP_CFG_N:
832 fcport->fw_login_state = current_login_state;
833 fcport->d_id = id;
834 switch (current_login_state) {
835 case DSC_LS_PRLI_PEND:
836 /*
837 * In the middle of PRLI. Let it finish.
838 * Allow relogin code to recheck state again
839 * with GNL. Push disc_state back to DELETED
840 * so GNL can go out again
841 */
842 fcport->disc_state = DSC_DELETED;
843 break;
844 case DSC_LS_PRLI_COMP:
845 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
846 fcport->port_type = FCT_INITIATOR;
847 else
848 fcport->port_type = FCT_TARGET;
849
850 data[0] = data[1] = 0;
851 qla2x00_post_async_adisc_work(vha, fcport,
852 data);
853 break;
854 case DSC_LS_PLOGI_COMP:
855 if (fcport_is_bigger(fcport)) {
856 /* local adapter is smaller */
857 if (fcport->loop_id != FC_NO_LOOP_ID)
858 qla2x00_clear_loop_id(fcport);
859
860 fcport->loop_id = loop_id;
861 qla24xx_fcport_handle_login(vha,
862 fcport);
863 break;
864 }
865 /* fall through */
866 default:
867 if (fcport_is_smaller(fcport)) {
868 /* local adapter is bigger */
869 if (fcport->loop_id != FC_NO_LOOP_ID)
870 qla2x00_clear_loop_id(fcport);
871
872 fcport->loop_id = loop_id;
873 qla24xx_fcport_handle_login(vha,
874 fcport);
875 }
876 break;
877 }
878 break;
879 } /* switch (ha->current_topology) */
880 }
881
882 if (!found) {
883 switch (vha->hw->current_topology) {
884 case ISP_CFG_F:
885 case ISP_CFG_FL:
886 for (i = 0; i < n; i++) {
887 e = &vha->gnl.l[i];
888 id.b.domain = e->port_id[0];
889 id.b.area = e->port_id[1];
890 id.b.al_pa = e->port_id[2];
891 id.b.rsvd_1 = 0;
892 loop_id = le16_to_cpu(e->nport_handle);
893
894 if (fcport->d_id.b24 == id.b24) {
895 conflict_fcport =
896 qla2x00_find_fcport_by_wwpn(vha,
897 e->port_name, 0);
898 if (conflict_fcport) {
899 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
900 vha, 0x20e5,
901 "%s %d %8phC post del sess\n",
902 __func__, __LINE__,
903 conflict_fcport->port_name);
904 qlt_schedule_sess_for_deletion
905 (conflict_fcport);
906 }
907 }
908 /*
909 * FW already picked this loop id for
910 * another fcport
911 */
912 if (fcport->loop_id == loop_id)
913 fcport->loop_id = FC_NO_LOOP_ID;
914 }
915 qla24xx_fcport_handle_login(vha, fcport);
916 break;
917 case ISP_CFG_N:
918 fcport->disc_state = DSC_DELETED;
919 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
920 if (fcport->n2n_link_reset_cnt < 2) {
921 fcport->n2n_link_reset_cnt++;
922 /*
923 * remote port is not sending PLOGI.
924 * Reset link to kick start his state
925 * machine
926 */
927 set_bit(N2N_LINK_RESET,
928 &vha->dpc_flags);
929 } else {
930 if (fcport->n2n_chip_reset < 1) {
931 ql_log(ql_log_info, vha, 0x705d,
932 "Chip reset to bring laser down");
933 set_bit(ISP_ABORT_NEEDED,
934 &vha->dpc_flags);
935 fcport->n2n_chip_reset++;
936 } else {
937 ql_log(ql_log_info, vha, 0x705d,
938 "Remote port %8ph is not coming back\n",
939 fcport->port_name);
940 fcport->scan_state = 0;
941 }
942 }
943 qla2xxx_wake_dpc(vha);
944 } else {
945 /*
946 * report port suppose to do PLOGI. Give him
947 * more time. FW will catch it.
948 */
949 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
950 }
951 break;
952 default:
953 break;
954 }
955 }
956 } /* gnl_event */
957
qla24xx_async_gnl_sp_done(srb_t * sp,int res)958 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
959 {
960 struct scsi_qla_host *vha = sp->vha;
961 unsigned long flags;
962 struct fc_port *fcport = NULL, *tf;
963 u16 i, n = 0, loop_id;
964 struct event_arg ea;
965 struct get_name_list_extended *e;
966 u64 wwn;
967 struct list_head h;
968 bool found = false;
969
970 ql_dbg(ql_dbg_disc, vha, 0x20e7,
971 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
972 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
973 sp->u.iocb_cmd.u.mbx.in_mb[2]);
974
975 if (res == QLA_FUNCTION_TIMEOUT)
976 return;
977
978 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
979 memset(&ea, 0, sizeof(ea));
980 ea.sp = sp;
981 ea.rc = res;
982
983 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
984 sizeof(struct get_name_list_extended)) {
985 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
986 sizeof(struct get_name_list_extended);
987 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
988 }
989
990 for (i = 0; i < n; i++) {
991 e = &vha->gnl.l[i];
992 loop_id = le16_to_cpu(e->nport_handle);
993 /* mask out reserve bit */
994 loop_id = (loop_id & 0x7fff);
995 set_bit(loop_id, vha->hw->loop_id_map);
996 wwn = wwn_to_u64(e->port_name);
997
998 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
999 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1000 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
1001 e->port_id[0], e->current_login_state, e->last_login_state,
1002 (loop_id & 0x7fff));
1003 }
1004
1005 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1006
1007 INIT_LIST_HEAD(&h);
1008 fcport = tf = NULL;
1009 if (!list_empty(&vha->gnl.fcports))
1010 list_splice_init(&vha->gnl.fcports, &h);
1011 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1012
1013 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1014 list_del_init(&fcport->gnl_entry);
1015 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1016 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1017 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1018 ea.fcport = fcport;
1019
1020 qla24xx_handle_gnl_done_event(vha, &ea);
1021 }
1022
1023 /* create new fcport if fw has knowledge of new sessions */
1024 for (i = 0; i < n; i++) {
1025 port_id_t id;
1026 u64 wwnn;
1027
1028 e = &vha->gnl.l[i];
1029 wwn = wwn_to_u64(e->port_name);
1030
1031 found = false;
1032 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1033 if (!memcmp((u8 *)&wwn, fcport->port_name,
1034 WWN_SIZE)) {
1035 found = true;
1036 break;
1037 }
1038 }
1039
1040 id.b.domain = e->port_id[2];
1041 id.b.area = e->port_id[1];
1042 id.b.al_pa = e->port_id[0];
1043 id.b.rsvd_1 = 0;
1044
1045 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1046 ql_dbg(ql_dbg_disc, vha, 0x2065,
1047 "%s %d %8phC %06x post new sess\n",
1048 __func__, __LINE__, (u8 *)&wwn, id.b24);
1049 wwnn = wwn_to_u64(e->node_name);
1050 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1051 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
1052 }
1053 }
1054
1055 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1056 vha->gnl.sent = 0;
1057 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1058
1059 sp->free(sp);
1060 }
1061
qla24xx_async_gnl(struct scsi_qla_host * vha,fc_port_t * fcport)1062 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1063 {
1064 srb_t *sp;
1065 struct srb_iocb *mbx;
1066 int rval = QLA_FUNCTION_FAILED;
1067 unsigned long flags;
1068 u16 *mb;
1069
1070 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1071 return rval;
1072
1073 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1074 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1075
1076 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1077 fcport->flags |= FCF_ASYNC_SENT;
1078 fcport->disc_state = DSC_GNL;
1079 fcport->last_rscn_gen = fcport->rscn_gen;
1080 fcport->last_login_gen = fcport->login_gen;
1081
1082 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1083 if (vha->gnl.sent) {
1084 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1085 return QLA_SUCCESS;
1086 }
1087 vha->gnl.sent = 1;
1088 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1089
1090 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1091 if (!sp)
1092 goto done;
1093
1094 sp->type = SRB_MB_IOCB;
1095 sp->name = "gnlist";
1096 sp->gen1 = fcport->rscn_gen;
1097 sp->gen2 = fcport->login_gen;
1098
1099 mbx = &sp->u.iocb_cmd;
1100 mbx->timeout = qla2x00_async_iocb_timeout;
1101 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
1102
1103 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1104 mb[0] = MBC_PORT_NODE_NAME_LIST;
1105 mb[1] = BIT_2 | BIT_3;
1106 mb[2] = MSW(vha->gnl.ldma);
1107 mb[3] = LSW(vha->gnl.ldma);
1108 mb[6] = MSW(MSD(vha->gnl.ldma));
1109 mb[7] = LSW(MSD(vha->gnl.ldma));
1110 mb[8] = vha->gnl.size;
1111 mb[9] = vha->vp_idx;
1112
1113 sp->done = qla24xx_async_gnl_sp_done;
1114
1115 ql_dbg(ql_dbg_disc, vha, 0x20da,
1116 "Async-%s - OUT WWPN %8phC hndl %x\n",
1117 sp->name, fcport->port_name, sp->handle);
1118
1119 rval = qla2x00_start_sp(sp);
1120 if (rval != QLA_SUCCESS)
1121 goto done_free_sp;
1122
1123 return rval;
1124
1125 done_free_sp:
1126 sp->free(sp);
1127 fcport->flags &= ~FCF_ASYNC_SENT;
1128 done:
1129 return rval;
1130 }
1131
qla24xx_post_gnl_work(struct scsi_qla_host * vha,fc_port_t * fcport)1132 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1133 {
1134 struct qla_work_evt *e;
1135
1136 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1137 if (!e)
1138 return QLA_FUNCTION_FAILED;
1139
1140 e->u.fcport.fcport = fcport;
1141 fcport->flags |= FCF_ASYNC_ACTIVE;
1142 return qla2x00_post_work(vha, e);
1143 }
1144
qla24xx_async_gpdb_sp_done(srb_t * sp,int res)1145 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1146 {
1147 struct scsi_qla_host *vha = sp->vha;
1148 struct qla_hw_data *ha = vha->hw;
1149 fc_port_t *fcport = sp->fcport;
1150 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1151 struct event_arg ea;
1152
1153 ql_dbg(ql_dbg_disc, vha, 0x20db,
1154 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1155 sp->name, res, fcport->port_name, mb[1], mb[2]);
1156
1157 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1158
1159 if (res == QLA_FUNCTION_TIMEOUT)
1160 goto done;
1161
1162 memset(&ea, 0, sizeof(ea));
1163 ea.fcport = fcport;
1164 ea.sp = sp;
1165
1166 qla24xx_handle_gpdb_event(vha, &ea);
1167
1168 done:
1169 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1170 sp->u.iocb_cmd.u.mbx.in_dma);
1171
1172 sp->free(sp);
1173 }
1174
qla24xx_post_prli_work(struct scsi_qla_host * vha,fc_port_t * fcport)1175 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1176 {
1177 struct qla_work_evt *e;
1178
1179 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1180 if (!e)
1181 return QLA_FUNCTION_FAILED;
1182
1183 e->u.fcport.fcport = fcport;
1184
1185 return qla2x00_post_work(vha, e);
1186 }
1187
qla2x00_async_prli_sp_done(srb_t * sp,int res)1188 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1189 {
1190 struct scsi_qla_host *vha = sp->vha;
1191 struct srb_iocb *lio = &sp->u.iocb_cmd;
1192 struct event_arg ea;
1193
1194 ql_dbg(ql_dbg_disc, vha, 0x2129,
1195 "%s %8phC res %d \n", __func__,
1196 sp->fcport->port_name, res);
1197
1198 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1199
1200 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1201 memset(&ea, 0, sizeof(ea));
1202 ea.fcport = sp->fcport;
1203 ea.data[0] = lio->u.logio.data[0];
1204 ea.data[1] = lio->u.logio.data[1];
1205 ea.iop[0] = lio->u.logio.iop[0];
1206 ea.iop[1] = lio->u.logio.iop[1];
1207 ea.sp = sp;
1208
1209 qla24xx_handle_prli_done_event(vha, &ea);
1210 }
1211
1212 sp->free(sp);
1213 }
1214
1215 int
qla24xx_async_prli(struct scsi_qla_host * vha,fc_port_t * fcport)1216 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1217 {
1218 srb_t *sp;
1219 struct srb_iocb *lio;
1220 int rval = QLA_FUNCTION_FAILED;
1221
1222 if (!vha->flags.online)
1223 return rval;
1224
1225 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1226 fcport->fw_login_state == DSC_LS_PRLI_PEND)
1227 return rval;
1228
1229 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1230 if (!sp)
1231 return rval;
1232
1233 fcport->flags |= FCF_ASYNC_SENT;
1234 fcport->logout_completed = 0;
1235
1236 sp->type = SRB_PRLI_CMD;
1237 sp->name = "prli";
1238
1239 lio = &sp->u.iocb_cmd;
1240 lio->timeout = qla2x00_async_iocb_timeout;
1241 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1242
1243 sp->done = qla2x00_async_prli_sp_done;
1244 lio->u.logio.flags = 0;
1245
1246 if (fcport->fc4f_nvme)
1247 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1248
1249 ql_dbg(ql_dbg_disc, vha, 0x211b,
1250 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1251 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1252 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc");
1253
1254 rval = qla2x00_start_sp(sp);
1255 if (rval != QLA_SUCCESS) {
1256 fcport->flags |= FCF_LOGIN_NEEDED;
1257 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1258 goto done_free_sp;
1259 }
1260
1261 return rval;
1262
1263 done_free_sp:
1264 sp->free(sp);
1265 fcport->flags &= ~FCF_ASYNC_SENT;
1266 return rval;
1267 }
1268
qla24xx_post_gpdb_work(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1269 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1270 {
1271 struct qla_work_evt *e;
1272
1273 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1274 if (!e)
1275 return QLA_FUNCTION_FAILED;
1276
1277 e->u.fcport.fcport = fcport;
1278 e->u.fcport.opt = opt;
1279 fcport->flags |= FCF_ASYNC_ACTIVE;
1280 return qla2x00_post_work(vha, e);
1281 }
1282
qla24xx_async_gpdb(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1283 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1284 {
1285 srb_t *sp;
1286 struct srb_iocb *mbx;
1287 int rval = QLA_FUNCTION_FAILED;
1288 u16 *mb;
1289 dma_addr_t pd_dma;
1290 struct port_database_24xx *pd;
1291 struct qla_hw_data *ha = vha->hw;
1292
1293 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
1294 fcport->loop_id == FC_NO_LOOP_ID) {
1295 ql_log(ql_log_warn, vha, 0xffff,
1296 "%s: %8phC - not sending command.\n",
1297 __func__, fcport->port_name);
1298 return rval;
1299 }
1300
1301 fcport->disc_state = DSC_GPDB;
1302
1303 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1304 if (!sp)
1305 goto done;
1306
1307 fcport->flags |= FCF_ASYNC_SENT;
1308 sp->type = SRB_MB_IOCB;
1309 sp->name = "gpdb";
1310 sp->gen1 = fcport->rscn_gen;
1311 sp->gen2 = fcport->login_gen;
1312
1313 mbx = &sp->u.iocb_cmd;
1314 mbx->timeout = qla2x00_async_iocb_timeout;
1315 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1316
1317 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1318 if (pd == NULL) {
1319 ql_log(ql_log_warn, vha, 0xd043,
1320 "Failed to allocate port database structure.\n");
1321 goto done_free_sp;
1322 }
1323
1324 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1325 mb[0] = MBC_GET_PORT_DATABASE;
1326 mb[1] = fcport->loop_id;
1327 mb[2] = MSW(pd_dma);
1328 mb[3] = LSW(pd_dma);
1329 mb[6] = MSW(MSD(pd_dma));
1330 mb[7] = LSW(MSD(pd_dma));
1331 mb[9] = vha->vp_idx;
1332 mb[10] = opt;
1333
1334 mbx->u.mbx.in = (void *)pd;
1335 mbx->u.mbx.in_dma = pd_dma;
1336
1337 sp->done = qla24xx_async_gpdb_sp_done;
1338
1339 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1340 "Async-%s %8phC hndl %x opt %x\n",
1341 sp->name, fcport->port_name, sp->handle, opt);
1342
1343 rval = qla2x00_start_sp(sp);
1344 if (rval != QLA_SUCCESS)
1345 goto done_free_sp;
1346 return rval;
1347
1348 done_free_sp:
1349 if (pd)
1350 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1351
1352 sp->free(sp);
1353 fcport->flags &= ~FCF_ASYNC_SENT;
1354 done:
1355 qla24xx_post_gpdb_work(vha, fcport, opt);
1356 return rval;
1357 }
1358
1359 static
__qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1360 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1361 {
1362 unsigned long flags;
1363
1364 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1365 ea->fcport->login_gen++;
1366 ea->fcport->deleted = 0;
1367 ea->fcport->logout_on_delete = 1;
1368
1369 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1370 vha->fcport_count++;
1371 ea->fcport->login_succ = 1;
1372
1373 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1374 qla24xx_sched_upd_fcport(ea->fcport);
1375 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1376 } else if (ea->fcport->login_succ) {
1377 /*
1378 * We have an existing session. A late RSCN delivery
1379 * must have triggered the session to be re-validate.
1380 * Session is still valid.
1381 */
1382 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1383 "%s %d %8phC session revalidate success\n",
1384 __func__, __LINE__, ea->fcport->port_name);
1385 ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
1386 }
1387 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1388 }
1389
1390 static
qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1391 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1392 {
1393 fc_port_t *fcport = ea->fcport;
1394 struct port_database_24xx *pd;
1395 struct srb *sp = ea->sp;
1396 uint8_t ls;
1397
1398 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1399
1400 fcport->flags &= ~FCF_ASYNC_SENT;
1401
1402 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1403 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name,
1404 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme,
1405 ea->rc);
1406
1407 if (fcport->disc_state == DSC_DELETE_PEND)
1408 return;
1409
1410 if (fcport->fc4f_nvme)
1411 ls = pd->current_login_state >> 4;
1412 else
1413 ls = pd->current_login_state & 0xf;
1414
1415 if (ea->sp->gen2 != fcport->login_gen) {
1416 /* target side must have changed it. */
1417
1418 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1419 "%s %8phC generation changed\n",
1420 __func__, fcport->port_name);
1421 return;
1422 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1423 qla_rscn_replay(fcport);
1424 qlt_schedule_sess_for_deletion(fcport);
1425 return;
1426 }
1427
1428 switch (ls) {
1429 case PDS_PRLI_COMPLETE:
1430 __qla24xx_parse_gpdb(vha, fcport, pd);
1431 break;
1432 case PDS_PLOGI_PENDING:
1433 case PDS_PLOGI_COMPLETE:
1434 case PDS_PRLI_PENDING:
1435 case PDS_PRLI2_PENDING:
1436 /* Set discovery state back to GNL to Relogin attempt */
1437 if (qla_dual_mode_enabled(vha) ||
1438 qla_ini_mode_enabled(vha)) {
1439 fcport->disc_state = DSC_GNL;
1440 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1441 }
1442 return;
1443 case PDS_LOGO_PENDING:
1444 case PDS_PORT_UNAVAILABLE:
1445 default:
1446 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1447 __func__, __LINE__, fcport->port_name);
1448 qlt_schedule_sess_for_deletion(fcport);
1449 return;
1450 }
1451 __qla24xx_handle_gpdb_event(vha, ea);
1452 } /* gpdb event */
1453
qla_chk_n2n_b4_login(struct scsi_qla_host * vha,fc_port_t * fcport)1454 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1455 {
1456 u8 login = 0;
1457 int rc;
1458
1459 if (qla_tgt_mode_enabled(vha))
1460 return;
1461
1462 if (qla_dual_mode_enabled(vha)) {
1463 if (N2N_TOPO(vha->hw)) {
1464 u64 mywwn, wwn;
1465
1466 mywwn = wwn_to_u64(vha->port_name);
1467 wwn = wwn_to_u64(fcport->port_name);
1468 if (mywwn > wwn)
1469 login = 1;
1470 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1471 && time_after_eq(jiffies,
1472 fcport->plogi_nack_done_deadline))
1473 login = 1;
1474 } else {
1475 login = 1;
1476 }
1477 } else {
1478 /* initiator mode */
1479 login = 1;
1480 }
1481
1482 if (login && fcport->login_retry) {
1483 fcport->login_retry--;
1484 if (fcport->loop_id == FC_NO_LOOP_ID) {
1485 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1486 rc = qla2x00_find_new_loop_id(vha, fcport);
1487 if (rc) {
1488 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1489 "%s %d %8phC post del sess - out of loopid\n",
1490 __func__, __LINE__, fcport->port_name);
1491 fcport->scan_state = 0;
1492 qlt_schedule_sess_for_deletion(fcport);
1493 return;
1494 }
1495 }
1496 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1497 "%s %d %8phC post login\n",
1498 __func__, __LINE__, fcport->port_name);
1499 qla2x00_post_async_login_work(vha, fcport, NULL);
1500 }
1501 }
1502
qla24xx_fcport_handle_login(struct scsi_qla_host * vha,fc_port_t * fcport)1503 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1504 {
1505 u16 data[2];
1506 u64 wwn;
1507 u16 sec;
1508
1509 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1510 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
1511 __func__, fcport->port_name, fcport->disc_state,
1512 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1513 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1514 fcport->login_gen, fcport->loop_id, fcport->scan_state);
1515
1516 if (fcport->scan_state != QLA_FCPORT_FOUND)
1517 return 0;
1518
1519 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1520 qla_dual_mode_enabled(vha) &&
1521 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1522 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1523 return 0;
1524
1525 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1526 !N2N_TOPO(vha->hw)) {
1527 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1528 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1529 return 0;
1530 }
1531 }
1532
1533 /* for pure Target Mode. Login will not be initiated */
1534 if (vha->host->active_mode == MODE_TARGET)
1535 return 0;
1536
1537 if (fcport->flags & FCF_ASYNC_SENT) {
1538 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1539 return 0;
1540 }
1541
1542 switch (fcport->disc_state) {
1543 case DSC_DELETED:
1544 wwn = wwn_to_u64(fcport->node_name);
1545 switch (vha->hw->current_topology) {
1546 case ISP_CFG_N:
1547 if (fcport_is_smaller(fcport)) {
1548 /* this adapter is bigger */
1549 if (fcport->login_retry) {
1550 if (fcport->loop_id == FC_NO_LOOP_ID) {
1551 qla2x00_find_new_loop_id(vha,
1552 fcport);
1553 fcport->fw_login_state =
1554 DSC_LS_PORT_UNAVAIL;
1555 }
1556 fcport->login_retry--;
1557 qla_post_els_plogi_work(vha, fcport);
1558 } else {
1559 ql_log(ql_log_info, vha, 0x705d,
1560 "Unable to reach remote port %8phC",
1561 fcport->port_name);
1562 }
1563 } else {
1564 qla24xx_post_gnl_work(vha, fcport);
1565 }
1566 break;
1567 default:
1568 if (wwn == 0) {
1569 ql_dbg(ql_dbg_disc, vha, 0xffff,
1570 "%s %d %8phC post GNNID\n",
1571 __func__, __LINE__, fcport->port_name);
1572 qla24xx_post_gnnid_work(vha, fcport);
1573 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1574 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1575 "%s %d %8phC post gnl\n",
1576 __func__, __LINE__, fcport->port_name);
1577 qla24xx_post_gnl_work(vha, fcport);
1578 } else {
1579 qla_chk_n2n_b4_login(vha, fcport);
1580 }
1581 break;
1582 }
1583 break;
1584
1585 case DSC_GNL:
1586 switch (vha->hw->current_topology) {
1587 case ISP_CFG_N:
1588 if ((fcport->current_login_state & 0xf) == 0x6) {
1589 ql_dbg(ql_dbg_disc, vha, 0x2118,
1590 "%s %d %8phC post GPDB work\n",
1591 __func__, __LINE__, fcport->port_name);
1592 fcport->chip_reset =
1593 vha->hw->base_qpair->chip_reset;
1594 qla24xx_post_gpdb_work(vha, fcport, 0);
1595 } else {
1596 ql_dbg(ql_dbg_disc, vha, 0x2118,
1597 "%s %d %8phC post %s PRLI\n",
1598 __func__, __LINE__, fcport->port_name,
1599 fcport->fc4f_nvme ? "NVME" : "FC");
1600 qla24xx_post_prli_work(vha, fcport);
1601 }
1602 break;
1603 default:
1604 if (fcport->login_pause) {
1605 fcport->last_rscn_gen = fcport->rscn_gen;
1606 fcport->last_login_gen = fcport->login_gen;
1607 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1608 break;
1609 }
1610 qla_chk_n2n_b4_login(vha, fcport);
1611 break;
1612 }
1613 break;
1614
1615 case DSC_LOGIN_FAILED:
1616 if (N2N_TOPO(vha->hw))
1617 qla_chk_n2n_b4_login(vha, fcport);
1618 else
1619 qlt_schedule_sess_for_deletion(fcport);
1620 break;
1621
1622 case DSC_LOGIN_COMPLETE:
1623 /* recheck login state */
1624 data[0] = data[1] = 0;
1625 qla2x00_post_async_adisc_work(vha, fcport, data);
1626 break;
1627
1628 case DSC_LOGIN_PEND:
1629 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1630 qla24xx_post_prli_work(vha, fcport);
1631 break;
1632
1633 case DSC_UPD_FCPORT:
1634 sec = jiffies_to_msecs(jiffies -
1635 fcport->jiffies_at_registration)/1000;
1636 if (fcport->sec_since_registration < sec && sec &&
1637 !(sec % 60)) {
1638 fcport->sec_since_registration = sec;
1639 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1640 "%s %8phC - Slow Rport registration(%d Sec)\n",
1641 __func__, fcport->port_name, sec);
1642 }
1643
1644 if (fcport->next_disc_state != DSC_DELETE_PEND)
1645 fcport->next_disc_state = DSC_ADISC;
1646 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1647 break;
1648
1649 default:
1650 break;
1651 }
1652
1653 return 0;
1654 }
1655
qla24xx_post_newsess_work(struct scsi_qla_host * vha,port_id_t * id,u8 * port_name,u8 * node_name,void * pla,u8 fc4_type)1656 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1657 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1658 {
1659 struct qla_work_evt *e;
1660
1661 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1662 if (!e)
1663 return QLA_FUNCTION_FAILED;
1664
1665 e->u.new_sess.id = *id;
1666 e->u.new_sess.pla = pla;
1667 e->u.new_sess.fc4_type = fc4_type;
1668 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1669 if (node_name)
1670 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1671
1672 return qla2x00_post_work(vha, e);
1673 }
1674
qla2x00_handle_rscn(scsi_qla_host_t * vha,struct event_arg * ea)1675 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1676 {
1677 fc_port_t *fcport;
1678 unsigned long flags;
1679
1680 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1681 if (fcport) {
1682 fcport->scan_needed = 1;
1683 fcport->rscn_gen++;
1684 }
1685
1686 spin_lock_irqsave(&vha->work_lock, flags);
1687 if (vha->scan.scan_flags == 0) {
1688 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1689 vha->scan.scan_flags |= SF_QUEUED;
1690 schedule_delayed_work(&vha->scan.scan_work, 5);
1691 }
1692 spin_unlock_irqrestore(&vha->work_lock, flags);
1693 }
1694
qla24xx_handle_relogin_event(scsi_qla_host_t * vha,struct event_arg * ea)1695 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1696 struct event_arg *ea)
1697 {
1698 fc_port_t *fcport = ea->fcport;
1699
1700 if (test_bit(UNLOADING, &vha->dpc_flags))
1701 return;
1702
1703 ql_dbg(ql_dbg_disc, vha, 0x2102,
1704 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1705 __func__, fcport->port_name, fcport->disc_state,
1706 fcport->fw_login_state, fcport->login_pause,
1707 fcport->deleted, fcport->conflict,
1708 fcport->last_rscn_gen, fcport->rscn_gen,
1709 fcport->last_login_gen, fcport->login_gen,
1710 fcport->flags);
1711
1712 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1713 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1714 __func__, __LINE__, fcport->port_name);
1715 qla24xx_post_gnl_work(vha, fcport);
1716 return;
1717 }
1718
1719 qla24xx_fcport_handle_login(vha, fcport);
1720 }
1721
1722 /*
1723 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1724 * to be consumed by the fcport
1725 */
qla_rscn_replay(fc_port_t * fcport)1726 void qla_rscn_replay(fc_port_t *fcport)
1727 {
1728 struct event_arg ea;
1729
1730 switch (fcport->disc_state) {
1731 case DSC_DELETE_PEND:
1732 return;
1733 default:
1734 break;
1735 }
1736
1737 if (fcport->scan_needed) {
1738 memset(&ea, 0, sizeof(ea));
1739 ea.id = fcport->d_id;
1740 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1741 qla2x00_handle_rscn(fcport->vha, &ea);
1742 }
1743 }
1744
1745 static void
qla2x00_tmf_iocb_timeout(void * data)1746 qla2x00_tmf_iocb_timeout(void *data)
1747 {
1748 srb_t *sp = data;
1749 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1750
1751 tmf->u.tmf.comp_status = CS_TIMEOUT;
1752 complete(&tmf->u.tmf.comp);
1753 }
1754
qla2x00_tmf_sp_done(srb_t * sp,int res)1755 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
1756 {
1757 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1758
1759 complete(&tmf->u.tmf.comp);
1760 }
1761
1762 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint32_t lun,uint32_t tag)1763 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1764 uint32_t tag)
1765 {
1766 struct scsi_qla_host *vha = fcport->vha;
1767 struct srb_iocb *tm_iocb;
1768 srb_t *sp;
1769 int rval = QLA_FUNCTION_FAILED;
1770
1771 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1772 if (!sp)
1773 goto done;
1774
1775 tm_iocb = &sp->u.iocb_cmd;
1776 sp->type = SRB_TM_CMD;
1777 sp->name = "tmf";
1778
1779 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1780 init_completion(&tm_iocb->u.tmf.comp);
1781 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1782
1783 tm_iocb->u.tmf.flags = flags;
1784 tm_iocb->u.tmf.lun = lun;
1785 tm_iocb->u.tmf.data = tag;
1786 sp->done = qla2x00_tmf_sp_done;
1787
1788 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1789 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1790 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1791 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1792
1793 rval = qla2x00_start_sp(sp);
1794 if (rval != QLA_SUCCESS)
1795 goto done_free_sp;
1796 wait_for_completion(&tm_iocb->u.tmf.comp);
1797
1798 rval = tm_iocb->u.tmf.data;
1799
1800 if (rval != QLA_SUCCESS) {
1801 ql_log(ql_log_warn, vha, 0x8030,
1802 "TM IOCB failed (%x).\n", rval);
1803 }
1804
1805 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1806 flags = tm_iocb->u.tmf.flags;
1807 lun = (uint16_t)tm_iocb->u.tmf.lun;
1808
1809 /* Issue Marker IOCB */
1810 qla2x00_marker(vha, vha->hw->base_qpair,
1811 fcport->loop_id, lun,
1812 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1813 }
1814
1815 done_free_sp:
1816 sp->free(sp);
1817 fcport->flags &= ~FCF_ASYNC_SENT;
1818 done:
1819 return rval;
1820 }
1821
1822 int
qla24xx_async_abort_command(srb_t * sp)1823 qla24xx_async_abort_command(srb_t *sp)
1824 {
1825 unsigned long flags = 0;
1826
1827 uint32_t handle;
1828 fc_port_t *fcport = sp->fcport;
1829 struct qla_qpair *qpair = sp->qpair;
1830 struct scsi_qla_host *vha = fcport->vha;
1831 struct req_que *req = qpair->req;
1832
1833 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1834 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1835 if (req->outstanding_cmds[handle] == sp)
1836 break;
1837 }
1838 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1839
1840 if (handle == req->num_outstanding_cmds) {
1841 /* Command not found. */
1842 return QLA_FUNCTION_FAILED;
1843 }
1844 if (sp->type == SRB_FXIOCB_DCMD)
1845 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1846 FXDISC_ABORT_IOCTL);
1847
1848 return qla24xx_async_abort_cmd(sp, true);
1849 }
1850
1851 static void
qla24xx_handle_prli_done_event(struct scsi_qla_host * vha,struct event_arg * ea)1852 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1853 {
1854 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1855 ea->data[0]);
1856
1857 switch (ea->data[0]) {
1858 case MBS_COMMAND_COMPLETE:
1859 ql_dbg(ql_dbg_disc, vha, 0x2118,
1860 "%s %d %8phC post gpdb\n",
1861 __func__, __LINE__, ea->fcport->port_name);
1862
1863 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1864 ea->fcport->logout_on_delete = 1;
1865 ea->fcport->nvme_prli_service_param = ea->iop[0];
1866 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
1867 ea->fcport->nvme_first_burst_size =
1868 (ea->iop[1] & 0xffff) * 512;
1869 else
1870 ea->fcport->nvme_first_burst_size = 0;
1871 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1872 break;
1873 default:
1874 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1875 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1876 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1877 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1878 break;
1879 }
1880
1881 if (ea->fcport->fc4f_nvme) {
1882 ql_dbg(ql_dbg_disc, vha, 0x2118,
1883 "%s %d %8phC post fc4 prli\n",
1884 __func__, __LINE__, ea->fcport->port_name);
1885 ea->fcport->fc4f_nvme = 0;
1886 qla24xx_post_prli_work(vha, ea->fcport);
1887 return;
1888 }
1889
1890 /* at this point both PRLI NVME & PRLI FCP failed */
1891 if (N2N_TOPO(vha->hw)) {
1892 if (ea->fcport->n2n_link_reset_cnt < 3) {
1893 ea->fcport->n2n_link_reset_cnt++;
1894 /*
1895 * remote port is not sending Plogi. Reset
1896 * link to kick start his state machine
1897 */
1898 set_bit(N2N_LINK_RESET, &vha->dpc_flags);
1899 } else {
1900 ql_log(ql_log_warn, vha, 0x2119,
1901 "%s %d %8phC Unable to reconnect\n",
1902 __func__, __LINE__, ea->fcport->port_name);
1903 }
1904 } else {
1905 /*
1906 * switch connect. login failed. Take connection
1907 * down and allow relogin to retrigger
1908 */
1909 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1910 ea->fcport->keep_nport_handle = 0;
1911 qlt_schedule_sess_for_deletion(ea->fcport);
1912 }
1913 break;
1914 }
1915 }
1916
1917 void
qla24xx_handle_plogi_done_event(struct scsi_qla_host * vha,struct event_arg * ea)1918 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1919 {
1920 port_id_t cid; /* conflict Nport id */
1921 u16 lid;
1922 struct fc_port *conflict_fcport;
1923 unsigned long flags;
1924 struct fc_port *fcport = ea->fcport;
1925
1926 ql_dbg(ql_dbg_disc, vha, 0xffff,
1927 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1928 __func__, fcport->port_name, fcport->disc_state,
1929 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1930 ea->sp->gen1, fcport->rscn_gen,
1931 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1932
1933 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1934 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1935 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1936 "%s %d %8phC Remote is trying to login\n",
1937 __func__, __LINE__, fcport->port_name);
1938 return;
1939 }
1940
1941 if ((fcport->disc_state == DSC_DELETE_PEND) ||
1942 (fcport->disc_state == DSC_DELETED)) {
1943 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1944 return;
1945 }
1946
1947 if (ea->sp->gen2 != fcport->login_gen) {
1948 /* target side must have changed it. */
1949 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1950 "%s %8phC generation changed\n",
1951 __func__, fcport->port_name);
1952 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1953 return;
1954 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1955 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1956 "%s %8phC RSCN generation changed\n",
1957 __func__, fcport->port_name);
1958 qla_rscn_replay(fcport);
1959 qlt_schedule_sess_for_deletion(fcport);
1960 return;
1961 }
1962
1963 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1964 ea->data[0]);
1965
1966 switch (ea->data[0]) {
1967 case MBS_COMMAND_COMPLETE:
1968 /*
1969 * Driver must validate login state - If PRLI not complete,
1970 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1971 * requests.
1972 */
1973 if (ea->fcport->fc4f_nvme) {
1974 ql_dbg(ql_dbg_disc, vha, 0x2117,
1975 "%s %d %8phC post prli\n",
1976 __func__, __LINE__, ea->fcport->port_name);
1977 qla24xx_post_prli_work(vha, ea->fcport);
1978 } else {
1979 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1980 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1981 __func__, __LINE__, ea->fcport->port_name,
1982 ea->fcport->loop_id, ea->fcport->d_id.b24);
1983
1984 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1985 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1986 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1987 ea->fcport->logout_on_delete = 1;
1988 ea->fcport->send_els_logo = 0;
1989 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
1990 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1991
1992 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1993 }
1994 break;
1995 case MBS_COMMAND_ERROR:
1996 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
1997 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1998
1999 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2000 ea->fcport->disc_state = DSC_LOGIN_FAILED;
2001 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
2002 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2003 else
2004 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
2005 break;
2006 case MBS_LOOP_ID_USED:
2007 /* data[1] = IO PARAM 1 = nport ID */
2008 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2009 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2010 cid.b.al_pa = ea->iop[1] & 0xff;
2011 cid.b.rsvd_1 = 0;
2012
2013 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2014 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2015 __func__, __LINE__, ea->fcport->port_name,
2016 ea->fcport->loop_id, cid.b24);
2017
2018 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2019 ea->fcport->loop_id = FC_NO_LOOP_ID;
2020 qla24xx_post_gnl_work(vha, ea->fcport);
2021 break;
2022 case MBS_PORT_ID_USED:
2023 lid = ea->iop[1] & 0xffff;
2024 qlt_find_sess_invalidate_other(vha,
2025 wwn_to_u64(ea->fcport->port_name),
2026 ea->fcport->d_id, lid, &conflict_fcport);
2027
2028 if (conflict_fcport) {
2029 /*
2030 * Another fcport share the same loop_id/nport id.
2031 * Conflict fcport needs to finish cleanup before this
2032 * fcport can proceed to login.
2033 */
2034 conflict_fcport->conflict = ea->fcport;
2035 ea->fcport->login_pause = 1;
2036
2037 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2038 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2039 __func__, __LINE__, ea->fcport->port_name,
2040 ea->fcport->d_id.b24, lid);
2041 } else {
2042 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2043 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2044 __func__, __LINE__, ea->fcport->port_name,
2045 ea->fcport->d_id.b24, lid);
2046
2047 qla2x00_clear_loop_id(ea->fcport);
2048 set_bit(lid, vha->hw->loop_id_map);
2049 ea->fcport->loop_id = lid;
2050 ea->fcport->keep_nport_handle = 0;
2051 qlt_schedule_sess_for_deletion(ea->fcport);
2052 }
2053 break;
2054 }
2055 return;
2056 }
2057
2058 void
qla2x00_async_logout_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)2059 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2060 uint16_t *data)
2061 {
2062 qlt_logo_completion_handler(fcport, data[0]);
2063 fcport->login_gen++;
2064 fcport->flags &= ~FCF_ASYNC_ACTIVE;
2065 return;
2066 }
2067
2068 /****************************************************************************/
2069 /* QLogic ISP2x00 Hardware Support Functions. */
2070 /****************************************************************************/
2071
2072 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)2073 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2074 {
2075 int rval = QLA_SUCCESS;
2076 struct qla_hw_data *ha = vha->hw;
2077 uint32_t idc_major_ver, idc_minor_ver;
2078 uint16_t config[4];
2079
2080 qla83xx_idc_lock(vha, 0);
2081
2082 /* SV: TODO: Assign initialization timeout from
2083 * flash-info / other param
2084 */
2085 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2086 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2087
2088 /* Set our fcoe function presence */
2089 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2090 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2091 "Error while setting DRV-Presence.\n");
2092 rval = QLA_FUNCTION_FAILED;
2093 goto exit;
2094 }
2095
2096 /* Decide the reset ownership */
2097 qla83xx_reset_ownership(vha);
2098
2099 /*
2100 * On first protocol driver load:
2101 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2102 * register.
2103 * Others: Check compatibility with current IDC Major version.
2104 */
2105 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2106 if (ha->flags.nic_core_reset_owner) {
2107 /* Set IDC Major version */
2108 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2109 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2110
2111 /* Clearing IDC-Lock-Recovery register */
2112 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2113 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2114 /*
2115 * Clear further IDC participation if we are not compatible with
2116 * the current IDC Major Version.
2117 */
2118 ql_log(ql_log_warn, vha, 0xb07d,
2119 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2120 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2121 __qla83xx_clear_drv_presence(vha);
2122 rval = QLA_FUNCTION_FAILED;
2123 goto exit;
2124 }
2125 /* Each function sets its supported Minor version. */
2126 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2127 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2128 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2129
2130 if (ha->flags.nic_core_reset_owner) {
2131 memset(config, 0, sizeof(config));
2132 if (!qla81xx_get_port_config(vha, config))
2133 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2134 QLA8XXX_DEV_READY);
2135 }
2136
2137 rval = qla83xx_idc_state_handler(vha);
2138
2139 exit:
2140 qla83xx_idc_unlock(vha, 0);
2141
2142 return rval;
2143 }
2144
2145 /*
2146 * qla2x00_initialize_adapter
2147 * Initialize board.
2148 *
2149 * Input:
2150 * ha = adapter block pointer.
2151 *
2152 * Returns:
2153 * 0 = success
2154 */
2155 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)2156 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2157 {
2158 int rval;
2159 struct qla_hw_data *ha = vha->hw;
2160 struct req_que *req = ha->req_q_map[0];
2161 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2162
2163 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2164 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2165
2166 /* Clear adapter flags. */
2167 vha->flags.online = 0;
2168 ha->flags.chip_reset_done = 0;
2169 vha->flags.reset_active = 0;
2170 ha->flags.pci_channel_io_perm_failure = 0;
2171 ha->flags.eeh_busy = 0;
2172 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2173 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2174 atomic_set(&vha->loop_state, LOOP_DOWN);
2175 vha->device_flags = DFLG_NO_CABLE;
2176 vha->dpc_flags = 0;
2177 vha->flags.management_server_logged_in = 0;
2178 vha->marker_needed = 0;
2179 ha->isp_abort_cnt = 0;
2180 ha->beacon_blink_led = 0;
2181
2182 set_bit(0, ha->req_qid_map);
2183 set_bit(0, ha->rsp_qid_map);
2184
2185 ql_dbg(ql_dbg_init, vha, 0x0040,
2186 "Configuring PCI space...\n");
2187 rval = ha->isp_ops->pci_config(vha);
2188 if (rval) {
2189 ql_log(ql_log_warn, vha, 0x0044,
2190 "Unable to configure PCI space.\n");
2191 return (rval);
2192 }
2193
2194 ha->isp_ops->reset_chip(vha);
2195
2196 /* Check for secure flash support */
2197 if (IS_QLA28XX(ha)) {
2198 if (RD_REG_DWORD(®->mailbox12) & BIT_0) {
2199 ql_log(ql_log_info, vha, 0xffff, "Adapter is Secure\n");
2200 ha->flags.secure_adapter = 1;
2201 }
2202 }
2203
2204
2205 rval = qla2xxx_get_flash_info(vha);
2206 if (rval) {
2207 ql_log(ql_log_fatal, vha, 0x004f,
2208 "Unable to validate FLASH data.\n");
2209 return rval;
2210 }
2211
2212 if (IS_QLA8044(ha)) {
2213 qla8044_read_reset_template(vha);
2214
2215 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2216 * If DONRESET_BIT0 is set, drivers should not set dev_state
2217 * to NEED_RESET. But if NEED_RESET is set, drivers should
2218 * should honor the reset. */
2219 if (ql2xdontresethba == 1)
2220 qla8044_set_idc_dontreset(vha);
2221 }
2222
2223 ha->isp_ops->get_flash_version(vha, req->ring);
2224 ql_dbg(ql_dbg_init, vha, 0x0061,
2225 "Configure NVRAM parameters...\n");
2226
2227 ha->isp_ops->nvram_config(vha);
2228
2229 if (ha->flags.disable_serdes) {
2230 /* Mask HBA via NVRAM settings? */
2231 ql_log(ql_log_info, vha, 0x0077,
2232 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2233 return QLA_FUNCTION_FAILED;
2234 }
2235
2236 ql_dbg(ql_dbg_init, vha, 0x0078,
2237 "Verifying loaded RISC code...\n");
2238
2239 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2240 rval = ha->isp_ops->chip_diag(vha);
2241 if (rval)
2242 return (rval);
2243 rval = qla2x00_setup_chip(vha);
2244 if (rval)
2245 return (rval);
2246 }
2247
2248 if (IS_QLA84XX(ha)) {
2249 ha->cs84xx = qla84xx_get_chip(vha);
2250 if (!ha->cs84xx) {
2251 ql_log(ql_log_warn, vha, 0x00d0,
2252 "Unable to configure ISP84XX.\n");
2253 return QLA_FUNCTION_FAILED;
2254 }
2255 }
2256
2257 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2258 rval = qla2x00_init_rings(vha);
2259
2260 /* No point in continuing if firmware initialization failed. */
2261 if (rval != QLA_SUCCESS)
2262 return rval;
2263
2264 ha->flags.chip_reset_done = 1;
2265
2266 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2267 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2268 rval = qla84xx_init_chip(vha);
2269 if (rval != QLA_SUCCESS) {
2270 ql_log(ql_log_warn, vha, 0x00d4,
2271 "Unable to initialize ISP84XX.\n");
2272 qla84xx_put_chip(vha);
2273 }
2274 }
2275
2276 /* Load the NIC Core f/w if we are the first protocol driver. */
2277 if (IS_QLA8031(ha)) {
2278 rval = qla83xx_nic_core_fw_load(vha);
2279 if (rval)
2280 ql_log(ql_log_warn, vha, 0x0124,
2281 "Error in initializing NIC Core f/w.\n");
2282 }
2283
2284 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2285 qla24xx_read_fcp_prio_cfg(vha);
2286
2287 if (IS_P3P_TYPE(ha))
2288 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2289 else
2290 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2291
2292 return (rval);
2293 }
2294
2295 /**
2296 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2297 * @vha: HA context
2298 *
2299 * Returns 0 on success.
2300 */
2301 int
qla2100_pci_config(scsi_qla_host_t * vha)2302 qla2100_pci_config(scsi_qla_host_t *vha)
2303 {
2304 uint16_t w;
2305 unsigned long flags;
2306 struct qla_hw_data *ha = vha->hw;
2307 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2308
2309 pci_set_master(ha->pdev);
2310 pci_try_set_mwi(ha->pdev);
2311
2312 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2313 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2314 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2315
2316 pci_disable_rom(ha->pdev);
2317
2318 /* Get PCI bus information. */
2319 spin_lock_irqsave(&ha->hardware_lock, flags);
2320 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
2321 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2322
2323 return QLA_SUCCESS;
2324 }
2325
2326 /**
2327 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2328 * @vha: HA context
2329 *
2330 * Returns 0 on success.
2331 */
2332 int
qla2300_pci_config(scsi_qla_host_t * vha)2333 qla2300_pci_config(scsi_qla_host_t *vha)
2334 {
2335 uint16_t w;
2336 unsigned long flags = 0;
2337 uint32_t cnt;
2338 struct qla_hw_data *ha = vha->hw;
2339 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2340
2341 pci_set_master(ha->pdev);
2342 pci_try_set_mwi(ha->pdev);
2343
2344 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2345 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2346
2347 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2348 w &= ~PCI_COMMAND_INTX_DISABLE;
2349 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2350
2351 /*
2352 * If this is a 2300 card and not 2312, reset the
2353 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2354 * the 2310 also reports itself as a 2300 so we need to get the
2355 * fb revision level -- a 6 indicates it really is a 2300 and
2356 * not a 2310.
2357 */
2358 if (IS_QLA2300(ha)) {
2359 spin_lock_irqsave(&ha->hardware_lock, flags);
2360
2361 /* Pause RISC. */
2362 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
2363 for (cnt = 0; cnt < 30000; cnt++) {
2364 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0)
2365 break;
2366
2367 udelay(10);
2368 }
2369
2370 /* Select FPM registers. */
2371 WRT_REG_WORD(®->ctrl_status, 0x20);
2372 RD_REG_WORD(®->ctrl_status);
2373
2374 /* Get the fb rev level */
2375 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2376
2377 if (ha->fb_rev == FPM_2300)
2378 pci_clear_mwi(ha->pdev);
2379
2380 /* Deselect FPM registers. */
2381 WRT_REG_WORD(®->ctrl_status, 0x0);
2382 RD_REG_WORD(®->ctrl_status);
2383
2384 /* Release RISC module. */
2385 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2386 for (cnt = 0; cnt < 30000; cnt++) {
2387 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0)
2388 break;
2389
2390 udelay(10);
2391 }
2392
2393 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2394 }
2395
2396 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2397
2398 pci_disable_rom(ha->pdev);
2399
2400 /* Get PCI bus information. */
2401 spin_lock_irqsave(&ha->hardware_lock, flags);
2402 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
2403 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2404
2405 return QLA_SUCCESS;
2406 }
2407
2408 /**
2409 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2410 * @vha: HA context
2411 *
2412 * Returns 0 on success.
2413 */
2414 int
qla24xx_pci_config(scsi_qla_host_t * vha)2415 qla24xx_pci_config(scsi_qla_host_t *vha)
2416 {
2417 uint16_t w;
2418 unsigned long flags = 0;
2419 struct qla_hw_data *ha = vha->hw;
2420 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2421
2422 pci_set_master(ha->pdev);
2423 pci_try_set_mwi(ha->pdev);
2424
2425 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2426 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2427 w &= ~PCI_COMMAND_INTX_DISABLE;
2428 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2429
2430 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2431
2432 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2433 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2434 pcix_set_mmrbc(ha->pdev, 2048);
2435
2436 /* PCIe -- adjust Maximum Read Request Size (2048). */
2437 if (pci_is_pcie(ha->pdev))
2438 pcie_set_readrq(ha->pdev, 4096);
2439
2440 pci_disable_rom(ha->pdev);
2441
2442 ha->chip_revision = ha->pdev->revision;
2443
2444 /* Get PCI bus information. */
2445 spin_lock_irqsave(&ha->hardware_lock, flags);
2446 ha->pci_attr = RD_REG_DWORD(®->ctrl_status);
2447 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2448
2449 return QLA_SUCCESS;
2450 }
2451
2452 /**
2453 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2454 * @vha: HA context
2455 *
2456 * Returns 0 on success.
2457 */
2458 int
qla25xx_pci_config(scsi_qla_host_t * vha)2459 qla25xx_pci_config(scsi_qla_host_t *vha)
2460 {
2461 uint16_t w;
2462 struct qla_hw_data *ha = vha->hw;
2463
2464 pci_set_master(ha->pdev);
2465 pci_try_set_mwi(ha->pdev);
2466
2467 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2468 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2469 w &= ~PCI_COMMAND_INTX_DISABLE;
2470 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2471
2472 /* PCIe -- adjust Maximum Read Request Size (2048). */
2473 if (pci_is_pcie(ha->pdev))
2474 pcie_set_readrq(ha->pdev, 4096);
2475
2476 pci_disable_rom(ha->pdev);
2477
2478 ha->chip_revision = ha->pdev->revision;
2479
2480 return QLA_SUCCESS;
2481 }
2482
2483 /**
2484 * qla2x00_isp_firmware() - Choose firmware image.
2485 * @vha: HA context
2486 *
2487 * Returns 0 on success.
2488 */
2489 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)2490 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2491 {
2492 int rval;
2493 uint16_t loop_id, topo, sw_cap;
2494 uint8_t domain, area, al_pa;
2495 struct qla_hw_data *ha = vha->hw;
2496
2497 /* Assume loading risc code */
2498 rval = QLA_FUNCTION_FAILED;
2499
2500 if (ha->flags.disable_risc_code_load) {
2501 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2502
2503 /* Verify checksum of loaded RISC code. */
2504 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2505 if (rval == QLA_SUCCESS) {
2506 /* And, verify we are not in ROM code. */
2507 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2508 &area, &domain, &topo, &sw_cap);
2509 }
2510 }
2511
2512 if (rval)
2513 ql_dbg(ql_dbg_init, vha, 0x007a,
2514 "**** Load RISC code ****.\n");
2515
2516 return (rval);
2517 }
2518
2519 /**
2520 * qla2x00_reset_chip() - Reset ISP chip.
2521 * @vha: HA context
2522 *
2523 * Returns 0 on success.
2524 */
2525 int
qla2x00_reset_chip(scsi_qla_host_t * vha)2526 qla2x00_reset_chip(scsi_qla_host_t *vha)
2527 {
2528 unsigned long flags = 0;
2529 struct qla_hw_data *ha = vha->hw;
2530 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2531 uint32_t cnt;
2532 uint16_t cmd;
2533 int rval = QLA_FUNCTION_FAILED;
2534
2535 if (unlikely(pci_channel_offline(ha->pdev)))
2536 return rval;
2537
2538 ha->isp_ops->disable_intrs(ha);
2539
2540 spin_lock_irqsave(&ha->hardware_lock, flags);
2541
2542 /* Turn off master enable */
2543 cmd = 0;
2544 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2545 cmd &= ~PCI_COMMAND_MASTER;
2546 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2547
2548 if (!IS_QLA2100(ha)) {
2549 /* Pause RISC. */
2550 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
2551 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2552 for (cnt = 0; cnt < 30000; cnt++) {
2553 if ((RD_REG_WORD(®->hccr) &
2554 HCCR_RISC_PAUSE) != 0)
2555 break;
2556 udelay(100);
2557 }
2558 } else {
2559 RD_REG_WORD(®->hccr); /* PCI Posting. */
2560 udelay(10);
2561 }
2562
2563 /* Select FPM registers. */
2564 WRT_REG_WORD(®->ctrl_status, 0x20);
2565 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
2566
2567 /* FPM Soft Reset. */
2568 WRT_REG_WORD(®->fpm_diag_config, 0x100);
2569 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */
2570
2571 /* Toggle Fpm Reset. */
2572 if (!IS_QLA2200(ha)) {
2573 WRT_REG_WORD(®->fpm_diag_config, 0x0);
2574 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */
2575 }
2576
2577 /* Select frame buffer registers. */
2578 WRT_REG_WORD(®->ctrl_status, 0x10);
2579 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
2580
2581 /* Reset frame buffer FIFOs. */
2582 if (IS_QLA2200(ha)) {
2583 WRT_FB_CMD_REG(ha, reg, 0xa000);
2584 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2585 } else {
2586 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2587
2588 /* Read back fb_cmd until zero or 3 seconds max */
2589 for (cnt = 0; cnt < 3000; cnt++) {
2590 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2591 break;
2592 udelay(100);
2593 }
2594 }
2595
2596 /* Select RISC module registers. */
2597 WRT_REG_WORD(®->ctrl_status, 0);
2598 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
2599
2600 /* Reset RISC processor. */
2601 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2602 RD_REG_WORD(®->hccr); /* PCI Posting. */
2603
2604 /* Release RISC processor. */
2605 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2606 RD_REG_WORD(®->hccr); /* PCI Posting. */
2607 }
2608
2609 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT);
2610 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT);
2611
2612 /* Reset ISP chip. */
2613 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
2614
2615 /* Wait for RISC to recover from reset. */
2616 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2617 /*
2618 * It is necessary to for a delay here since the card doesn't
2619 * respond to PCI reads during a reset. On some architectures
2620 * this will result in an MCA.
2621 */
2622 udelay(20);
2623 for (cnt = 30000; cnt; cnt--) {
2624 if ((RD_REG_WORD(®->ctrl_status) &
2625 CSR_ISP_SOFT_RESET) == 0)
2626 break;
2627 udelay(100);
2628 }
2629 } else
2630 udelay(10);
2631
2632 /* Reset RISC processor. */
2633 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2634
2635 WRT_REG_WORD(®->semaphore, 0);
2636
2637 /* Release RISC processor. */
2638 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2639 RD_REG_WORD(®->hccr); /* PCI Posting. */
2640
2641 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2642 for (cnt = 0; cnt < 30000; cnt++) {
2643 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2644 break;
2645
2646 udelay(100);
2647 }
2648 } else
2649 udelay(100);
2650
2651 /* Turn on master enable */
2652 cmd |= PCI_COMMAND_MASTER;
2653 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2654
2655 /* Disable RISC pause on FPM parity error. */
2656 if (!IS_QLA2100(ha)) {
2657 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
2658 RD_REG_WORD(®->hccr); /* PCI Posting. */
2659 }
2660
2661 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2662
2663 return QLA_SUCCESS;
2664 }
2665
2666 /**
2667 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2668 * @vha: HA context
2669 *
2670 * Returns 0 on success.
2671 */
2672 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)2673 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2674 {
2675 uint16_t mb[4] = {0x1010, 0, 1, 0};
2676
2677 if (!IS_QLA81XX(vha->hw))
2678 return QLA_SUCCESS;
2679
2680 return qla81xx_write_mpi_register(vha, mb);
2681 }
2682
2683 /**
2684 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2685 * @vha: HA context
2686 *
2687 * Returns 0 on success.
2688 */
2689 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)2690 qla24xx_reset_risc(scsi_qla_host_t *vha)
2691 {
2692 unsigned long flags = 0;
2693 struct qla_hw_data *ha = vha->hw;
2694 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2695 uint32_t cnt;
2696 uint16_t wd;
2697 static int abts_cnt; /* ISP abort retry counts */
2698 int rval = QLA_SUCCESS;
2699
2700 spin_lock_irqsave(&ha->hardware_lock, flags);
2701
2702 /* Reset RISC. */
2703 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2704 for (cnt = 0; cnt < 30000; cnt++) {
2705 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2706 break;
2707
2708 udelay(10);
2709 }
2710
2711 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE))
2712 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2713
2714 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2715 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2716 RD_REG_DWORD(®->hccr),
2717 RD_REG_DWORD(®->ctrl_status),
2718 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE));
2719
2720 WRT_REG_DWORD(®->ctrl_status,
2721 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2722 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2723
2724 udelay(100);
2725
2726 /* Wait for firmware to complete NVRAM accesses. */
2727 RD_REG_WORD(®->mailbox0);
2728 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 &&
2729 rval == QLA_SUCCESS; cnt--) {
2730 barrier();
2731 if (cnt)
2732 udelay(5);
2733 else
2734 rval = QLA_FUNCTION_TIMEOUT;
2735 }
2736
2737 if (rval == QLA_SUCCESS)
2738 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2739
2740 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2741 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2742 RD_REG_DWORD(®->hccr),
2743 RD_REG_DWORD(®->mailbox0));
2744
2745 /* Wait for soft-reset to complete. */
2746 RD_REG_DWORD(®->ctrl_status);
2747 for (cnt = 0; cnt < 60; cnt++) {
2748 barrier();
2749 if ((RD_REG_DWORD(®->ctrl_status) &
2750 CSRX_ISP_SOFT_RESET) == 0)
2751 break;
2752
2753 udelay(5);
2754 }
2755 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
2756 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2757
2758 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2759 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2760 RD_REG_DWORD(®->hccr),
2761 RD_REG_DWORD(®->ctrl_status));
2762
2763 /* If required, do an MPI FW reset now */
2764 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2765 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2766 if (++abts_cnt < 5) {
2767 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2768 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2769 } else {
2770 /*
2771 * We exhausted the ISP abort retries. We have to
2772 * set the board offline.
2773 */
2774 abts_cnt = 0;
2775 vha->flags.online = 0;
2776 }
2777 }
2778 }
2779
2780 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
2781 RD_REG_DWORD(®->hccr);
2782
2783 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
2784 RD_REG_DWORD(®->hccr);
2785
2786 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET);
2787 RD_REG_DWORD(®->hccr);
2788
2789 RD_REG_WORD(®->mailbox0);
2790 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 &&
2791 rval == QLA_SUCCESS; cnt--) {
2792 barrier();
2793 if (cnt)
2794 udelay(5);
2795 else
2796 rval = QLA_FUNCTION_TIMEOUT;
2797 }
2798 if (rval == QLA_SUCCESS)
2799 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2800
2801 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2802 "Host Risc 0x%x, mailbox0 0x%x\n",
2803 RD_REG_DWORD(®->hccr),
2804 RD_REG_WORD(®->mailbox0));
2805
2806 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2807
2808 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2809 "Driver in %s mode\n",
2810 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2811
2812 if (IS_NOPOLLING_TYPE(ha))
2813 ha->isp_ops->enable_intrs(ha);
2814
2815 return rval;
2816 }
2817
2818 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)2819 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2820 {
2821 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2822
2823 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2824 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2825
2826 }
2827
2828 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)2829 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2830 {
2831 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2832
2833 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2834 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2835 }
2836
2837 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)2838 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2839 {
2840 uint32_t wd32 = 0;
2841 uint delta_msec = 100;
2842 uint elapsed_msec = 0;
2843 uint timeout_msec;
2844 ulong n;
2845
2846 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2847 vha->hw->pdev->subsystem_device != 0x0240)
2848 return;
2849
2850 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2851 udelay(100);
2852
2853 attempt:
2854 timeout_msec = TIMEOUT_SEMAPHORE;
2855 n = timeout_msec / delta_msec;
2856 while (n--) {
2857 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2858 qla25xx_read_risc_sema_reg(vha, &wd32);
2859 if (wd32 & RISC_SEMAPHORE)
2860 break;
2861 msleep(delta_msec);
2862 elapsed_msec += delta_msec;
2863 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2864 goto force;
2865 }
2866
2867 if (!(wd32 & RISC_SEMAPHORE))
2868 goto force;
2869
2870 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2871 goto acquired;
2872
2873 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2874 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2875 n = timeout_msec / delta_msec;
2876 while (n--) {
2877 qla25xx_read_risc_sema_reg(vha, &wd32);
2878 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2879 break;
2880 msleep(delta_msec);
2881 elapsed_msec += delta_msec;
2882 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2883 goto force;
2884 }
2885
2886 if (wd32 & RISC_SEMAPHORE_FORCE)
2887 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2888
2889 goto attempt;
2890
2891 force:
2892 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2893
2894 acquired:
2895 return;
2896 }
2897
2898 /**
2899 * qla24xx_reset_chip() - Reset ISP24xx chip.
2900 * @vha: HA context
2901 *
2902 * Returns 0 on success.
2903 */
2904 int
qla24xx_reset_chip(scsi_qla_host_t * vha)2905 qla24xx_reset_chip(scsi_qla_host_t *vha)
2906 {
2907 struct qla_hw_data *ha = vha->hw;
2908 int rval = QLA_FUNCTION_FAILED;
2909
2910 if (pci_channel_offline(ha->pdev) &&
2911 ha->flags.pci_channel_io_perm_failure) {
2912 return rval;
2913 }
2914
2915 ha->isp_ops->disable_intrs(ha);
2916
2917 qla25xx_manipulate_risc_semaphore(vha);
2918
2919 /* Perform RISC reset. */
2920 rval = qla24xx_reset_risc(vha);
2921
2922 return rval;
2923 }
2924
2925 /**
2926 * qla2x00_chip_diag() - Test chip for proper operation.
2927 * @vha: HA context
2928 *
2929 * Returns 0 on success.
2930 */
2931 int
qla2x00_chip_diag(scsi_qla_host_t * vha)2932 qla2x00_chip_diag(scsi_qla_host_t *vha)
2933 {
2934 int rval;
2935 struct qla_hw_data *ha = vha->hw;
2936 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2937 unsigned long flags = 0;
2938 uint16_t data;
2939 uint32_t cnt;
2940 uint16_t mb[5];
2941 struct req_que *req = ha->req_q_map[0];
2942
2943 /* Assume a failed state */
2944 rval = QLA_FUNCTION_FAILED;
2945
2946 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2947 ®->flash_address);
2948
2949 spin_lock_irqsave(&ha->hardware_lock, flags);
2950
2951 /* Reset ISP chip. */
2952 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
2953
2954 /*
2955 * We need to have a delay here since the card will not respond while
2956 * in reset causing an MCA on some architectures.
2957 */
2958 udelay(20);
2959 data = qla2x00_debounce_register(®->ctrl_status);
2960 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2961 udelay(5);
2962 data = RD_REG_WORD(®->ctrl_status);
2963 barrier();
2964 }
2965
2966 if (!cnt)
2967 goto chip_diag_failed;
2968
2969 ql_dbg(ql_dbg_init, vha, 0x007c,
2970 "Reset register cleared by chip reset.\n");
2971
2972 /* Reset RISC processor. */
2973 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2974 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2975
2976 /* Workaround for QLA2312 PCI parity error */
2977 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2978 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2979 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2980 udelay(5);
2981 data = RD_MAILBOX_REG(ha, reg, 0);
2982 barrier();
2983 }
2984 } else
2985 udelay(10);
2986
2987 if (!cnt)
2988 goto chip_diag_failed;
2989
2990 /* Check product ID of chip */
2991 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
2992
2993 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2994 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2995 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2996 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2997 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2998 mb[3] != PROD_ID_3) {
2999 ql_log(ql_log_warn, vha, 0x0062,
3000 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3001 mb[1], mb[2], mb[3]);
3002
3003 goto chip_diag_failed;
3004 }
3005 ha->product_id[0] = mb[1];
3006 ha->product_id[1] = mb[2];
3007 ha->product_id[2] = mb[3];
3008 ha->product_id[3] = mb[4];
3009
3010 /* Adjust fw RISC transfer size */
3011 if (req->length > 1024)
3012 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3013 else
3014 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3015 req->length;
3016
3017 if (IS_QLA2200(ha) &&
3018 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3019 /* Limit firmware transfer size with a 2200A */
3020 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3021
3022 ha->device_type |= DT_ISP2200A;
3023 ha->fw_transfer_size = 128;
3024 }
3025
3026 /* Wrap Incoming Mailboxes Test. */
3027 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3028
3029 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3030 rval = qla2x00_mbx_reg_test(vha);
3031 if (rval)
3032 ql_log(ql_log_warn, vha, 0x0080,
3033 "Failed mailbox send register test.\n");
3034 else
3035 /* Flag a successful rval */
3036 rval = QLA_SUCCESS;
3037 spin_lock_irqsave(&ha->hardware_lock, flags);
3038
3039 chip_diag_failed:
3040 if (rval)
3041 ql_log(ql_log_info, vha, 0x0081,
3042 "Chip diagnostics **** FAILED ****.\n");
3043
3044 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3045
3046 return (rval);
3047 }
3048
3049 /**
3050 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3051 * @vha: HA context
3052 *
3053 * Returns 0 on success.
3054 */
3055 int
qla24xx_chip_diag(scsi_qla_host_t * vha)3056 qla24xx_chip_diag(scsi_qla_host_t *vha)
3057 {
3058 int rval;
3059 struct qla_hw_data *ha = vha->hw;
3060 struct req_que *req = ha->req_q_map[0];
3061
3062 if (IS_P3P_TYPE(ha))
3063 return QLA_SUCCESS;
3064
3065 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3066
3067 rval = qla2x00_mbx_reg_test(vha);
3068 if (rval) {
3069 ql_log(ql_log_warn, vha, 0x0082,
3070 "Failed mailbox send register test.\n");
3071 } else {
3072 /* Flag a successful rval */
3073 rval = QLA_SUCCESS;
3074 }
3075
3076 return rval;
3077 }
3078
3079 static void
qla2x00_init_fce_trace(scsi_qla_host_t * vha)3080 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3081 {
3082 int rval;
3083 dma_addr_t tc_dma;
3084 void *tc;
3085 struct qla_hw_data *ha = vha->hw;
3086
3087 if (!IS_FWI2_CAPABLE(ha))
3088 return;
3089
3090 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3091 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3092 return;
3093
3094 if (ha->fce) {
3095 ql_dbg(ql_dbg_init, vha, 0x00bd,
3096 "%s: FCE Mem is already allocated.\n",
3097 __func__);
3098 return;
3099 }
3100
3101 /* Allocate memory for Fibre Channel Event Buffer. */
3102 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3103 GFP_KERNEL);
3104 if (!tc) {
3105 ql_log(ql_log_warn, vha, 0x00be,
3106 "Unable to allocate (%d KB) for FCE.\n",
3107 FCE_SIZE / 1024);
3108 return;
3109 }
3110
3111 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3112 ha->fce_mb, &ha->fce_bufs);
3113 if (rval) {
3114 ql_log(ql_log_warn, vha, 0x00bf,
3115 "Unable to initialize FCE (%d).\n", rval);
3116 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3117 return;
3118 }
3119
3120 ql_dbg(ql_dbg_init, vha, 0x00c0,
3121 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3122
3123 ha->flags.fce_enabled = 1;
3124 ha->fce_dma = tc_dma;
3125 ha->fce = tc;
3126 }
3127
3128 static void
qla2x00_init_eft_trace(scsi_qla_host_t * vha)3129 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3130 {
3131 int rval;
3132 dma_addr_t tc_dma;
3133 void *tc;
3134 struct qla_hw_data *ha = vha->hw;
3135
3136 if (!IS_FWI2_CAPABLE(ha))
3137 return;
3138
3139 if (ha->eft) {
3140 ql_dbg(ql_dbg_init, vha, 0x00bd,
3141 "%s: EFT Mem is already allocated.\n",
3142 __func__);
3143 return;
3144 }
3145
3146 /* Allocate memory for Extended Trace Buffer. */
3147 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3148 GFP_KERNEL);
3149 if (!tc) {
3150 ql_log(ql_log_warn, vha, 0x00c1,
3151 "Unable to allocate (%d KB) for EFT.\n",
3152 EFT_SIZE / 1024);
3153 return;
3154 }
3155
3156 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3157 if (rval) {
3158 ql_log(ql_log_warn, vha, 0x00c2,
3159 "Unable to initialize EFT (%d).\n", rval);
3160 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3161 return;
3162 }
3163
3164 ql_dbg(ql_dbg_init, vha, 0x00c3,
3165 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3166
3167 ha->eft_dma = tc_dma;
3168 ha->eft = tc;
3169 }
3170
3171 static void
qla2x00_alloc_offload_mem(scsi_qla_host_t * vha)3172 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3173 {
3174 qla2x00_init_fce_trace(vha);
3175 qla2x00_init_eft_trace(vha);
3176 }
3177
3178 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)3179 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3180 {
3181 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3182 eft_size, fce_size, mq_size;
3183 struct qla_hw_data *ha = vha->hw;
3184 struct req_que *req = ha->req_q_map[0];
3185 struct rsp_que *rsp = ha->rsp_q_map[0];
3186 struct qla2xxx_fw_dump *fw_dump;
3187
3188 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3189 req_q_size = rsp_q_size = 0;
3190
3191 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3192 fixed_size = sizeof(struct qla2100_fw_dump);
3193 } else if (IS_QLA23XX(ha)) {
3194 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3195 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3196 sizeof(uint16_t);
3197 } else if (IS_FWI2_CAPABLE(ha)) {
3198 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
3199 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3200 else if (IS_QLA81XX(ha))
3201 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3202 else if (IS_QLA25XX(ha))
3203 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3204 else
3205 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3206
3207 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3208 sizeof(uint32_t);
3209 if (ha->mqenable) {
3210 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) &&
3211 !IS_QLA28XX(ha))
3212 mq_size = sizeof(struct qla2xxx_mq_chain);
3213 /*
3214 * Allocate maximum buffer size for all queues - Q0.
3215 * Resizing must be done at end-of-dump processing.
3216 */
3217 mq_size += (ha->max_req_queues - 1) *
3218 (req->length * sizeof(request_t));
3219 mq_size += (ha->max_rsp_queues - 1) *
3220 (rsp->length * sizeof(response_t));
3221 }
3222 if (ha->tgt.atio_ring)
3223 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3224
3225 qla2x00_init_fce_trace(vha);
3226 if (ha->fce)
3227 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3228 qla2x00_init_eft_trace(vha);
3229 if (ha->eft)
3230 eft_size = EFT_SIZE;
3231 }
3232
3233 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3234 struct fwdt *fwdt = ha->fwdt;
3235 uint j;
3236
3237 for (j = 0; j < 2; j++, fwdt++) {
3238 if (!fwdt->template) {
3239 ql_dbg(ql_dbg_init, vha, 0x00ba,
3240 "-> fwdt%u no template\n", j);
3241 continue;
3242 }
3243 ql_dbg(ql_dbg_init, vha, 0x00fa,
3244 "-> fwdt%u calculating fwdump size...\n", j);
3245 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3246 vha, fwdt->template);
3247 ql_dbg(ql_dbg_init, vha, 0x00fa,
3248 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3249 j, fwdt->dump_size);
3250 dump_size += fwdt->dump_size;
3251 }
3252 } else {
3253 req_q_size = req->length * sizeof(request_t);
3254 rsp_q_size = rsp->length * sizeof(response_t);
3255 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3256 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3257 + eft_size;
3258 ha->chain_offset = dump_size;
3259 dump_size += mq_size + fce_size;
3260 if (ha->exchoffld_buf)
3261 dump_size += sizeof(struct qla2xxx_offld_chain) +
3262 ha->exchoffld_size;
3263 if (ha->exlogin_buf)
3264 dump_size += sizeof(struct qla2xxx_offld_chain) +
3265 ha->exlogin_size;
3266 }
3267
3268 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3269
3270 ql_dbg(ql_dbg_init, vha, 0x00c5,
3271 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3272 __func__, dump_size, ha->fw_dump_len,
3273 ha->fw_dump_alloc_len);
3274
3275 fw_dump = vmalloc(dump_size);
3276 if (!fw_dump) {
3277 ql_log(ql_log_warn, vha, 0x00c4,
3278 "Unable to allocate (%d KB) for firmware dump.\n",
3279 dump_size / 1024);
3280 } else {
3281 mutex_lock(&ha->optrom_mutex);
3282 if (ha->fw_dumped) {
3283 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3284 vfree(ha->fw_dump);
3285 ha->fw_dump = fw_dump;
3286 ha->fw_dump_alloc_len = dump_size;
3287 ql_dbg(ql_dbg_init, vha, 0x00c5,
3288 "Re-Allocated (%d KB) and save firmware dump.\n",
3289 dump_size / 1024);
3290 } else {
3291 if (ha->fw_dump)
3292 vfree(ha->fw_dump);
3293 ha->fw_dump = fw_dump;
3294
3295 ha->fw_dump_len = ha->fw_dump_alloc_len =
3296 dump_size;
3297 ql_dbg(ql_dbg_init, vha, 0x00c5,
3298 "Allocated (%d KB) for firmware dump.\n",
3299 dump_size / 1024);
3300
3301 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3302 mutex_unlock(&ha->optrom_mutex);
3303 return;
3304 }
3305
3306 ha->fw_dump->signature[0] = 'Q';
3307 ha->fw_dump->signature[1] = 'L';
3308 ha->fw_dump->signature[2] = 'G';
3309 ha->fw_dump->signature[3] = 'C';
3310 ha->fw_dump->version = htonl(1);
3311
3312 ha->fw_dump->fixed_size = htonl(fixed_size);
3313 ha->fw_dump->mem_size = htonl(mem_size);
3314 ha->fw_dump->req_q_size = htonl(req_q_size);
3315 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3316
3317 ha->fw_dump->eft_size = htonl(eft_size);
3318 ha->fw_dump->eft_addr_l =
3319 htonl(LSD(ha->eft_dma));
3320 ha->fw_dump->eft_addr_h =
3321 htonl(MSD(ha->eft_dma));
3322
3323 ha->fw_dump->header_size =
3324 htonl(offsetof
3325 (struct qla2xxx_fw_dump, isp));
3326 }
3327 mutex_unlock(&ha->optrom_mutex);
3328 }
3329 }
3330 }
3331
3332 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)3333 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3334 {
3335 #define MPS_MASK 0xe0
3336 int rval;
3337 uint16_t dc;
3338 uint32_t dw;
3339
3340 if (!IS_QLA81XX(vha->hw))
3341 return QLA_SUCCESS;
3342
3343 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3344 if (rval != QLA_SUCCESS) {
3345 ql_log(ql_log_warn, vha, 0x0105,
3346 "Unable to acquire semaphore.\n");
3347 goto done;
3348 }
3349
3350 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3351 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3352 if (rval != QLA_SUCCESS) {
3353 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3354 goto done_release;
3355 }
3356
3357 dc &= MPS_MASK;
3358 if (dc == (dw & MPS_MASK))
3359 goto done_release;
3360
3361 dw &= ~MPS_MASK;
3362 dw |= dc;
3363 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3364 if (rval != QLA_SUCCESS) {
3365 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3366 }
3367
3368 done_release:
3369 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3370 if (rval != QLA_SUCCESS) {
3371 ql_log(ql_log_warn, vha, 0x006d,
3372 "Unable to release semaphore.\n");
3373 }
3374
3375 done:
3376 return rval;
3377 }
3378
3379 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)3380 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3381 {
3382 /* Don't try to reallocate the array */
3383 if (req->outstanding_cmds)
3384 return QLA_SUCCESS;
3385
3386 if (!IS_FWI2_CAPABLE(ha))
3387 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3388 else {
3389 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3390 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3391 else
3392 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3393 }
3394
3395 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3396 sizeof(srb_t *),
3397 GFP_KERNEL);
3398
3399 if (!req->outstanding_cmds) {
3400 /*
3401 * Try to allocate a minimal size just so we can get through
3402 * initialization.
3403 */
3404 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3405 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3406 sizeof(srb_t *),
3407 GFP_KERNEL);
3408
3409 if (!req->outstanding_cmds) {
3410 ql_log(ql_log_fatal, NULL, 0x0126,
3411 "Failed to allocate memory for "
3412 "outstanding_cmds for req_que %p.\n", req);
3413 req->num_outstanding_cmds = 0;
3414 return QLA_FUNCTION_FAILED;
3415 }
3416 }
3417
3418 return QLA_SUCCESS;
3419 }
3420
3421 #define PRINT_FIELD(_field, _flag, _str) { \
3422 if (a0->_field & _flag) {\
3423 if (p) {\
3424 strcat(ptr, "|");\
3425 ptr++;\
3426 leftover--;\
3427 } \
3428 len = snprintf(ptr, leftover, "%s", _str); \
3429 p = 1;\
3430 leftover -= len;\
3431 ptr += len; \
3432 } \
3433 }
3434
qla2xxx_print_sfp_info(struct scsi_qla_host * vha)3435 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3436 {
3437 #define STR_LEN 64
3438 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3439 u8 str[STR_LEN], *ptr, p;
3440 int leftover, len;
3441
3442 memset(str, 0, STR_LEN);
3443 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3444 ql_dbg(ql_dbg_init, vha, 0x015a,
3445 "SFP MFG Name: %s\n", str);
3446
3447 memset(str, 0, STR_LEN);
3448 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3449 ql_dbg(ql_dbg_init, vha, 0x015c,
3450 "SFP Part Name: %s\n", str);
3451
3452 /* media */
3453 memset(str, 0, STR_LEN);
3454 ptr = str;
3455 leftover = STR_LEN;
3456 p = len = 0;
3457 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3458 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3459 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3460 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3461 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3462 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3463 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3464 ql_dbg(ql_dbg_init, vha, 0x0160,
3465 "SFP Media: %s\n", str);
3466
3467 /* link length */
3468 memset(str, 0, STR_LEN);
3469 ptr = str;
3470 leftover = STR_LEN;
3471 p = len = 0;
3472 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3473 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3474 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3475 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3476 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3477 ql_dbg(ql_dbg_init, vha, 0x0196,
3478 "SFP Link Length: %s\n", str);
3479
3480 memset(str, 0, STR_LEN);
3481 ptr = str;
3482 leftover = STR_LEN;
3483 p = len = 0;
3484 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3485 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3486 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3487 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3488 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3489 ql_dbg(ql_dbg_init, vha, 0x016e,
3490 "SFP FC Link Tech: %s\n", str);
3491
3492 if (a0->length_km)
3493 ql_dbg(ql_dbg_init, vha, 0x016f,
3494 "SFP Distant: %d km\n", a0->length_km);
3495 if (a0->length_100m)
3496 ql_dbg(ql_dbg_init, vha, 0x0170,
3497 "SFP Distant: %d m\n", a0->length_100m*100);
3498 if (a0->length_50um_10m)
3499 ql_dbg(ql_dbg_init, vha, 0x0189,
3500 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3501 if (a0->length_62um_10m)
3502 ql_dbg(ql_dbg_init, vha, 0x018a,
3503 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3504 if (a0->length_om4_10m)
3505 ql_dbg(ql_dbg_init, vha, 0x0194,
3506 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3507 if (a0->length_om3_10m)
3508 ql_dbg(ql_dbg_init, vha, 0x0195,
3509 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3510 }
3511
3512
3513 /*
3514 * Return Code:
3515 * QLA_SUCCESS: no action
3516 * QLA_INTERFACE_ERROR: SFP is not there.
3517 * QLA_FUNCTION_FAILED: detected New SFP
3518 */
3519 int
qla24xx_detect_sfp(scsi_qla_host_t * vha)3520 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3521 {
3522 int rc = QLA_SUCCESS;
3523 struct sff_8247_a0 *a;
3524 struct qla_hw_data *ha = vha->hw;
3525
3526 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3527 goto out;
3528
3529 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3530 if (rc)
3531 goto out;
3532
3533 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3534 qla2xxx_print_sfp_info(vha);
3535
3536 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3537 /* long range */
3538 ha->flags.detected_lr_sfp = 1;
3539
3540 if (a->length_km > 5 || a->length_100m > 50)
3541 ha->long_range_distance = LR_DISTANCE_10K;
3542 else
3543 ha->long_range_distance = LR_DISTANCE_5K;
3544
3545 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3546 ql_dbg(ql_dbg_async, vha, 0x507b,
3547 "Detected Long Range SFP.\n");
3548 } else {
3549 /* short range */
3550 ha->flags.detected_lr_sfp = 0;
3551 if (ha->flags.using_lr_setting)
3552 ql_dbg(ql_dbg_async, vha, 0x5084,
3553 "Detected Short Range SFP.\n");
3554 }
3555
3556 if (!vha->flags.init_done)
3557 rc = QLA_SUCCESS;
3558 out:
3559 return rc;
3560 }
3561
3562 /**
3563 * qla2x00_setup_chip() - Load and start RISC firmware.
3564 * @vha: HA context
3565 *
3566 * Returns 0 on success.
3567 */
3568 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)3569 qla2x00_setup_chip(scsi_qla_host_t *vha)
3570 {
3571 int rval;
3572 uint32_t srisc_address = 0;
3573 struct qla_hw_data *ha = vha->hw;
3574 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3575 unsigned long flags;
3576 uint16_t fw_major_version;
3577
3578 if (IS_P3P_TYPE(ha)) {
3579 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3580 if (rval == QLA_SUCCESS) {
3581 qla2x00_stop_firmware(vha);
3582 goto enable_82xx_npiv;
3583 } else
3584 goto failed;
3585 }
3586
3587 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3588 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3589 spin_lock_irqsave(&ha->hardware_lock, flags);
3590 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
3591 RD_REG_WORD(®->hccr);
3592 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3593 }
3594
3595 qla81xx_mpi_sync(vha);
3596
3597 /* Load firmware sequences */
3598 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3599 if (rval == QLA_SUCCESS) {
3600 ql_dbg(ql_dbg_init, vha, 0x00c9,
3601 "Verifying Checksum of loaded RISC code.\n");
3602
3603 rval = qla2x00_verify_checksum(vha, srisc_address);
3604 if (rval == QLA_SUCCESS) {
3605 /* Start firmware execution. */
3606 ql_dbg(ql_dbg_init, vha, 0x00ca,
3607 "Starting firmware.\n");
3608
3609 if (ql2xexlogins)
3610 ha->flags.exlogins_enabled = 1;
3611
3612 if (qla_is_exch_offld_enabled(vha))
3613 ha->flags.exchoffld_enabled = 1;
3614
3615 rval = qla2x00_execute_fw(vha, srisc_address);
3616 /* Retrieve firmware information. */
3617 if (rval == QLA_SUCCESS) {
3618 qla24xx_detect_sfp(vha);
3619
3620 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3621 IS_QLA28XX(ha)) &&
3622 (ha->zio_mode == QLA_ZIO_MODE_6))
3623 qla27xx_set_zio_threshold(vha,
3624 ha->last_zio_threshold);
3625
3626 rval = qla2x00_set_exlogins_buffer(vha);
3627 if (rval != QLA_SUCCESS)
3628 goto failed;
3629
3630 rval = qla2x00_set_exchoffld_buffer(vha);
3631 if (rval != QLA_SUCCESS)
3632 goto failed;
3633
3634 enable_82xx_npiv:
3635 fw_major_version = ha->fw_major_version;
3636 if (IS_P3P_TYPE(ha))
3637 qla82xx_check_md_needed(vha);
3638 else
3639 rval = qla2x00_get_fw_version(vha);
3640 if (rval != QLA_SUCCESS)
3641 goto failed;
3642 ha->flags.npiv_supported = 0;
3643 if (IS_QLA2XXX_MIDTYPE(ha) &&
3644 (ha->fw_attributes & BIT_2)) {
3645 ha->flags.npiv_supported = 1;
3646 if ((!ha->max_npiv_vports) ||
3647 ((ha->max_npiv_vports + 1) %
3648 MIN_MULTI_ID_FABRIC))
3649 ha->max_npiv_vports =
3650 MIN_MULTI_ID_FABRIC - 1;
3651 }
3652 qla2x00_get_resource_cnts(vha);
3653
3654 /*
3655 * Allocate the array of outstanding commands
3656 * now that we know the firmware resources.
3657 */
3658 rval = qla2x00_alloc_outstanding_cmds(ha,
3659 vha->req);
3660 if (rval != QLA_SUCCESS)
3661 goto failed;
3662
3663 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3664 qla2x00_alloc_offload_mem(vha);
3665
3666 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3667 qla2x00_alloc_fw_dump(vha);
3668
3669 } else {
3670 goto failed;
3671 }
3672 } else {
3673 ql_log(ql_log_fatal, vha, 0x00cd,
3674 "ISP Firmware failed checksum.\n");
3675 goto failed;
3676 }
3677 } else
3678 goto failed;
3679
3680 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3681 /* Enable proper parity. */
3682 spin_lock_irqsave(&ha->hardware_lock, flags);
3683 if (IS_QLA2300(ha))
3684 /* SRAM parity */
3685 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1);
3686 else
3687 /* SRAM, Instruction RAM and GP RAM parity */
3688 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7);
3689 RD_REG_WORD(®->hccr);
3690 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3691 }
3692
3693 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
3694 ha->flags.fac_supported = 1;
3695 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3696 uint32_t size;
3697
3698 rval = qla81xx_fac_get_sector_size(vha, &size);
3699 if (rval == QLA_SUCCESS) {
3700 ha->flags.fac_supported = 1;
3701 ha->fdt_block_size = size << 2;
3702 } else {
3703 ql_log(ql_log_warn, vha, 0x00ce,
3704 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3705 ha->fw_major_version, ha->fw_minor_version,
3706 ha->fw_subminor_version);
3707
3708 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3709 IS_QLA28XX(ha)) {
3710 ha->flags.fac_supported = 0;
3711 rval = QLA_SUCCESS;
3712 }
3713 }
3714 }
3715 failed:
3716 if (rval) {
3717 ql_log(ql_log_fatal, vha, 0x00cf,
3718 "Setup chip ****FAILED****.\n");
3719 }
3720
3721 return (rval);
3722 }
3723
3724 /**
3725 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3726 * @rsp: response queue
3727 *
3728 * Beginning of request ring has initialization control block already built
3729 * by nvram config routine.
3730 *
3731 * Returns 0 on success.
3732 */
3733 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)3734 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3735 {
3736 uint16_t cnt;
3737 response_t *pkt;
3738
3739 rsp->ring_ptr = rsp->ring;
3740 rsp->ring_index = 0;
3741 rsp->status_srb = NULL;
3742 pkt = rsp->ring_ptr;
3743 for (cnt = 0; cnt < rsp->length; cnt++) {
3744 pkt->signature = RESPONSE_PROCESSED;
3745 pkt++;
3746 }
3747 }
3748
3749 /**
3750 * qla2x00_update_fw_options() - Read and process firmware options.
3751 * @vha: HA context
3752 *
3753 * Returns 0 on success.
3754 */
3755 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)3756 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3757 {
3758 uint16_t swing, emphasis, tx_sens, rx_sens;
3759 struct qla_hw_data *ha = vha->hw;
3760
3761 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3762 qla2x00_get_fw_options(vha, ha->fw_options);
3763
3764 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3765 return;
3766
3767 /* Serial Link options. */
3768 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3769 "Serial link options.\n");
3770 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3771 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
3772
3773 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3774 if (ha->fw_seriallink_options[3] & BIT_2) {
3775 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3776
3777 /* 1G settings */
3778 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3779 emphasis = (ha->fw_seriallink_options[2] &
3780 (BIT_4 | BIT_3)) >> 3;
3781 tx_sens = ha->fw_seriallink_options[0] &
3782 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3783 rx_sens = (ha->fw_seriallink_options[0] &
3784 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3785 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3786 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3787 if (rx_sens == 0x0)
3788 rx_sens = 0x3;
3789 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3790 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3791 ha->fw_options[10] |= BIT_5 |
3792 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3793 (tx_sens & (BIT_1 | BIT_0));
3794
3795 /* 2G settings */
3796 swing = (ha->fw_seriallink_options[2] &
3797 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3798 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3799 tx_sens = ha->fw_seriallink_options[1] &
3800 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3801 rx_sens = (ha->fw_seriallink_options[1] &
3802 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3803 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3804 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3805 if (rx_sens == 0x0)
3806 rx_sens = 0x3;
3807 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3808 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3809 ha->fw_options[11] |= BIT_5 |
3810 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3811 (tx_sens & (BIT_1 | BIT_0));
3812 }
3813
3814 /* FCP2 options. */
3815 /* Return command IOCBs without waiting for an ABTS to complete. */
3816 ha->fw_options[3] |= BIT_13;
3817
3818 /* LED scheme. */
3819 if (ha->flags.enable_led_scheme)
3820 ha->fw_options[2] |= BIT_12;
3821
3822 /* Detect ISP6312. */
3823 if (IS_QLA6312(ha))
3824 ha->fw_options[2] |= BIT_13;
3825
3826 /* Set Retry FLOGI in case of P2P connection */
3827 if (ha->operating_mode == P2P) {
3828 ha->fw_options[2] |= BIT_3;
3829 ql_dbg(ql_dbg_disc, vha, 0x2100,
3830 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3831 __func__, ha->fw_options[2]);
3832 }
3833
3834 /* Update firmware options. */
3835 qla2x00_set_fw_options(vha, ha->fw_options);
3836 }
3837
3838 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)3839 qla24xx_update_fw_options(scsi_qla_host_t *vha)
3840 {
3841 int rval;
3842 struct qla_hw_data *ha = vha->hw;
3843
3844 if (IS_P3P_TYPE(ha))
3845 return;
3846
3847 /* Hold status IOCBs until ABTS response received. */
3848 if (ql2xfwholdabts)
3849 ha->fw_options[3] |= BIT_12;
3850
3851 /* Set Retry FLOGI in case of P2P connection */
3852 if (ha->operating_mode == P2P) {
3853 ha->fw_options[2] |= BIT_3;
3854 ql_dbg(ql_dbg_disc, vha, 0x2101,
3855 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3856 __func__, ha->fw_options[2]);
3857 }
3858
3859 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3860 if (ql2xmvasynctoatio &&
3861 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
3862 if (qla_tgt_mode_enabled(vha) ||
3863 qla_dual_mode_enabled(vha))
3864 ha->fw_options[2] |= BIT_11;
3865 else
3866 ha->fw_options[2] &= ~BIT_11;
3867 }
3868
3869 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3870 IS_QLA28XX(ha)) {
3871 /*
3872 * Tell FW to track each exchange to prevent
3873 * driver from using stale exchange.
3874 */
3875 if (qla_tgt_mode_enabled(vha) ||
3876 qla_dual_mode_enabled(vha))
3877 ha->fw_options[2] |= BIT_4;
3878 else
3879 ha->fw_options[2] &= ~BIT_4;
3880
3881 /* Reserve 1/2 of emergency exchanges for ELS.*/
3882 if (qla2xuseresexchforels)
3883 ha->fw_options[2] |= BIT_8;
3884 else
3885 ha->fw_options[2] &= ~BIT_8;
3886 }
3887
3888 ql_dbg(ql_dbg_init, vha, 0x00e8,
3889 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3890 __func__, ha->fw_options[1], ha->fw_options[2],
3891 ha->fw_options[3], vha->host->active_mode);
3892
3893 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3894 qla2x00_set_fw_options(vha, ha->fw_options);
3895
3896 /* Update Serial Link options. */
3897 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
3898 return;
3899
3900 rval = qla2x00_set_serdes_params(vha,
3901 le16_to_cpu(ha->fw_seriallink_options24[1]),
3902 le16_to_cpu(ha->fw_seriallink_options24[2]),
3903 le16_to_cpu(ha->fw_seriallink_options24[3]));
3904 if (rval != QLA_SUCCESS) {
3905 ql_log(ql_log_warn, vha, 0x0104,
3906 "Unable to update Serial Link options (%x).\n", rval);
3907 }
3908 }
3909
3910 void
qla2x00_config_rings(struct scsi_qla_host * vha)3911 qla2x00_config_rings(struct scsi_qla_host *vha)
3912 {
3913 struct qla_hw_data *ha = vha->hw;
3914 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3915 struct req_que *req = ha->req_q_map[0];
3916 struct rsp_que *rsp = ha->rsp_q_map[0];
3917
3918 /* Setup ring parameters in initialization control block. */
3919 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3920 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3921 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3922 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3923 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
3924 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
3925
3926 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3927 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3928 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3929 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3930 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3931 }
3932
3933 void
qla24xx_config_rings(struct scsi_qla_host * vha)3934 qla24xx_config_rings(struct scsi_qla_host *vha)
3935 {
3936 struct qla_hw_data *ha = vha->hw;
3937 device_reg_t *reg = ISP_QUE_REG(ha, 0);
3938 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3939 struct qla_msix_entry *msix;
3940 struct init_cb_24xx *icb;
3941 uint16_t rid = 0;
3942 struct req_que *req = ha->req_q_map[0];
3943 struct rsp_que *rsp = ha->rsp_q_map[0];
3944
3945 /* Setup ring parameters in initialization control block. */
3946 icb = (struct init_cb_24xx *)ha->init_cb;
3947 icb->request_q_outpointer = cpu_to_le16(0);
3948 icb->response_q_inpointer = cpu_to_le16(0);
3949 icb->request_q_length = cpu_to_le16(req->length);
3950 icb->response_q_length = cpu_to_le16(rsp->length);
3951 put_unaligned_le64(req->dma, &icb->request_q_address);
3952 put_unaligned_le64(rsp->dma, &icb->response_q_address);
3953
3954 /* Setup ATIO queue dma pointers for target mode */
3955 icb->atio_q_inpointer = cpu_to_le16(0);
3956 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3957 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
3958
3959 if (IS_SHADOW_REG_CAPABLE(ha))
3960 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
3961
3962 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3963 IS_QLA28XX(ha)) {
3964 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3965 icb->rid = cpu_to_le16(rid);
3966 if (ha->flags.msix_enabled) {
3967 msix = &ha->msix_entries[1];
3968 ql_dbg(ql_dbg_init, vha, 0x0019,
3969 "Registering vector 0x%x for base que.\n",
3970 msix->entry);
3971 icb->msix = cpu_to_le16(msix->entry);
3972 }
3973 /* Use alternate PCI bus number */
3974 if (MSB(rid))
3975 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
3976 /* Use alternate PCI devfn */
3977 if (LSB(rid))
3978 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
3979
3980 /* Use Disable MSIX Handshake mode for capable adapters */
3981 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3982 (ha->flags.msix_enabled)) {
3983 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3984 ha->flags.disable_msix_handshake = 1;
3985 ql_dbg(ql_dbg_init, vha, 0x00fe,
3986 "MSIX Handshake Disable Mode turned on.\n");
3987 } else {
3988 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3989 }
3990 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
3991
3992 WRT_REG_DWORD(®->isp25mq.req_q_in, 0);
3993 WRT_REG_DWORD(®->isp25mq.req_q_out, 0);
3994 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0);
3995 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0);
3996 } else {
3997 WRT_REG_DWORD(®->isp24.req_q_in, 0);
3998 WRT_REG_DWORD(®->isp24.req_q_out, 0);
3999 WRT_REG_DWORD(®->isp24.rsp_q_in, 0);
4000 WRT_REG_DWORD(®->isp24.rsp_q_out, 0);
4001 }
4002
4003 qlt_24xx_config_rings(vha);
4004
4005 /* If the user has configured the speed, set it here */
4006 if (ha->set_data_rate) {
4007 ql_dbg(ql_dbg_init, vha, 0x00fd,
4008 "Speed set by user : %s Gbps \n",
4009 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4010 icb->firmware_options_3 = (ha->set_data_rate << 13);
4011 }
4012
4013 /* PCI posting */
4014 RD_REG_DWORD(&ioreg->hccr);
4015 }
4016
4017 /**
4018 * qla2x00_init_rings() - Initializes firmware.
4019 * @vha: HA context
4020 *
4021 * Beginning of request ring has initialization control block already built
4022 * by nvram config routine.
4023 *
4024 * Returns 0 on success.
4025 */
4026 int
qla2x00_init_rings(scsi_qla_host_t * vha)4027 qla2x00_init_rings(scsi_qla_host_t *vha)
4028 {
4029 int rval;
4030 unsigned long flags = 0;
4031 int cnt, que;
4032 struct qla_hw_data *ha = vha->hw;
4033 struct req_que *req;
4034 struct rsp_que *rsp;
4035 struct mid_init_cb_24xx *mid_init_cb =
4036 (struct mid_init_cb_24xx *) ha->init_cb;
4037
4038 spin_lock_irqsave(&ha->hardware_lock, flags);
4039
4040 /* Clear outstanding commands array. */
4041 for (que = 0; que < ha->max_req_queues; que++) {
4042 req = ha->req_q_map[que];
4043 if (!req || !test_bit(que, ha->req_qid_map))
4044 continue;
4045 req->out_ptr = (void *)(req->ring + req->length);
4046 *req->out_ptr = 0;
4047 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4048 req->outstanding_cmds[cnt] = NULL;
4049
4050 req->current_outstanding_cmd = 1;
4051
4052 /* Initialize firmware. */
4053 req->ring_ptr = req->ring;
4054 req->ring_index = 0;
4055 req->cnt = req->length;
4056 }
4057
4058 for (que = 0; que < ha->max_rsp_queues; que++) {
4059 rsp = ha->rsp_q_map[que];
4060 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4061 continue;
4062 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
4063 *rsp->in_ptr = 0;
4064 /* Initialize response queue entries */
4065 if (IS_QLAFX00(ha))
4066 qlafx00_init_response_q_entries(rsp);
4067 else
4068 qla2x00_init_response_q_entries(rsp);
4069 }
4070
4071 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4072 ha->tgt.atio_ring_index = 0;
4073 /* Initialize ATIO queue entries */
4074 qlt_init_atio_q_entries(vha);
4075
4076 ha->isp_ops->config_rings(vha);
4077
4078 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4079
4080 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4081
4082 if (IS_QLAFX00(ha)) {
4083 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4084 goto next_check;
4085 }
4086
4087 /* Update any ISP specific firmware options before initialization. */
4088 ha->isp_ops->update_fw_options(vha);
4089
4090 if (ha->flags.npiv_supported) {
4091 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4092 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4093 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4094 }
4095
4096 if (IS_FWI2_CAPABLE(ha)) {
4097 mid_init_cb->options = cpu_to_le16(BIT_1);
4098 mid_init_cb->init_cb.execution_throttle =
4099 cpu_to_le16(ha->cur_fw_xcb_count);
4100 ha->flags.dport_enabled =
4101 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
4102 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4103 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4104 /* FA-WWPN Status */
4105 ha->flags.fawwpn_enabled =
4106 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
4107 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4108 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4109 }
4110
4111 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4112 next_check:
4113 if (rval) {
4114 ql_log(ql_log_fatal, vha, 0x00d2,
4115 "Init Firmware **** FAILED ****.\n");
4116 } else {
4117 ql_dbg(ql_dbg_init, vha, 0x00d3,
4118 "Init Firmware -- success.\n");
4119 QLA_FW_STARTED(ha);
4120 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4121 }
4122
4123 return (rval);
4124 }
4125
4126 /**
4127 * qla2x00_fw_ready() - Waits for firmware ready.
4128 * @vha: HA context
4129 *
4130 * Returns 0 on success.
4131 */
4132 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)4133 qla2x00_fw_ready(scsi_qla_host_t *vha)
4134 {
4135 int rval;
4136 unsigned long wtime, mtime, cs84xx_time;
4137 uint16_t min_wait; /* Minimum wait time if loop is down */
4138 uint16_t wait_time; /* Wait time if loop is coming ready */
4139 uint16_t state[6];
4140 struct qla_hw_data *ha = vha->hw;
4141
4142 if (IS_QLAFX00(vha->hw))
4143 return qlafx00_fw_ready(vha);
4144
4145 rval = QLA_SUCCESS;
4146
4147 /* Time to wait for loop down */
4148 if (IS_P3P_TYPE(ha))
4149 min_wait = 30;
4150 else
4151 min_wait = 20;
4152
4153 /*
4154 * Firmware should take at most one RATOV to login, plus 5 seconds for
4155 * our own processing.
4156 */
4157 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4158 wait_time = min_wait;
4159 }
4160
4161 /* Min wait time if loop down */
4162 mtime = jiffies + (min_wait * HZ);
4163
4164 /* wait time before firmware ready */
4165 wtime = jiffies + (wait_time * HZ);
4166
4167 /* Wait for ISP to finish LIP */
4168 if (!vha->flags.init_done)
4169 ql_log(ql_log_info, vha, 0x801e,
4170 "Waiting for LIP to complete.\n");
4171
4172 do {
4173 memset(state, -1, sizeof(state));
4174 rval = qla2x00_get_firmware_state(vha, state);
4175 if (rval == QLA_SUCCESS) {
4176 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4177 vha->device_flags &= ~DFLG_NO_CABLE;
4178 }
4179 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4180 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4181 "fw_state=%x 84xx=%x.\n", state[0],
4182 state[2]);
4183 if ((state[2] & FSTATE_LOGGED_IN) &&
4184 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4185 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4186 "Sending verify iocb.\n");
4187
4188 cs84xx_time = jiffies;
4189 rval = qla84xx_init_chip(vha);
4190 if (rval != QLA_SUCCESS) {
4191 ql_log(ql_log_warn,
4192 vha, 0x8007,
4193 "Init chip failed.\n");
4194 break;
4195 }
4196
4197 /* Add time taken to initialize. */
4198 cs84xx_time = jiffies - cs84xx_time;
4199 wtime += cs84xx_time;
4200 mtime += cs84xx_time;
4201 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4202 "Increasing wait time by %ld. "
4203 "New time %ld.\n", cs84xx_time,
4204 wtime);
4205 }
4206 } else if (state[0] == FSTATE_READY) {
4207 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4208 "F/W Ready - OK.\n");
4209
4210 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4211 &ha->login_timeout, &ha->r_a_tov);
4212
4213 rval = QLA_SUCCESS;
4214 break;
4215 }
4216
4217 rval = QLA_FUNCTION_FAILED;
4218
4219 if (atomic_read(&vha->loop_down_timer) &&
4220 state[0] != FSTATE_READY) {
4221 /* Loop down. Timeout on min_wait for states
4222 * other than Wait for Login.
4223 */
4224 if (time_after_eq(jiffies, mtime)) {
4225 ql_log(ql_log_info, vha, 0x8038,
4226 "Cable is unplugged...\n");
4227
4228 vha->device_flags |= DFLG_NO_CABLE;
4229 break;
4230 }
4231 }
4232 } else {
4233 /* Mailbox cmd failed. Timeout on min_wait. */
4234 if (time_after_eq(jiffies, mtime) ||
4235 ha->flags.isp82xx_fw_hung)
4236 break;
4237 }
4238
4239 if (time_after_eq(jiffies, wtime))
4240 break;
4241
4242 /* Delay for a while */
4243 msleep(500);
4244 } while (1);
4245
4246 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4247 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4248 state[1], state[2], state[3], state[4], state[5], jiffies);
4249
4250 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4251 ql_log(ql_log_warn, vha, 0x803b,
4252 "Firmware ready **** FAILED ****.\n");
4253 }
4254
4255 return (rval);
4256 }
4257
4258 /*
4259 * qla2x00_configure_hba
4260 * Setup adapter context.
4261 *
4262 * Input:
4263 * ha = adapter state pointer.
4264 *
4265 * Returns:
4266 * 0 = success
4267 *
4268 * Context:
4269 * Kernel context.
4270 */
4271 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)4272 qla2x00_configure_hba(scsi_qla_host_t *vha)
4273 {
4274 int rval;
4275 uint16_t loop_id;
4276 uint16_t topo;
4277 uint16_t sw_cap;
4278 uint8_t al_pa;
4279 uint8_t area;
4280 uint8_t domain;
4281 char connect_type[22];
4282 struct qla_hw_data *ha = vha->hw;
4283 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4284 port_id_t id;
4285 unsigned long flags;
4286
4287 /* Get host addresses. */
4288 rval = qla2x00_get_adapter_id(vha,
4289 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4290 if (rval != QLA_SUCCESS) {
4291 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4292 IS_CNA_CAPABLE(ha) ||
4293 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4294 ql_dbg(ql_dbg_disc, vha, 0x2008,
4295 "Loop is in a transition state.\n");
4296 } else {
4297 ql_log(ql_log_warn, vha, 0x2009,
4298 "Unable to get host loop ID.\n");
4299 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4300 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4301 ql_log(ql_log_warn, vha, 0x1151,
4302 "Doing link init.\n");
4303 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4304 return rval;
4305 }
4306 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4307 }
4308 return (rval);
4309 }
4310
4311 if (topo == 4) {
4312 ql_log(ql_log_info, vha, 0x200a,
4313 "Cannot get topology - retrying.\n");
4314 return (QLA_FUNCTION_FAILED);
4315 }
4316
4317 vha->loop_id = loop_id;
4318
4319 /* initialize */
4320 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4321 ha->operating_mode = LOOP;
4322 ha->switch_cap = 0;
4323
4324 switch (topo) {
4325 case 0:
4326 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4327 ha->current_topology = ISP_CFG_NL;
4328 strcpy(connect_type, "(Loop)");
4329 break;
4330
4331 case 1:
4332 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4333 ha->switch_cap = sw_cap;
4334 ha->current_topology = ISP_CFG_FL;
4335 strcpy(connect_type, "(FL_Port)");
4336 break;
4337
4338 case 2:
4339 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4340 ha->operating_mode = P2P;
4341 ha->current_topology = ISP_CFG_N;
4342 strcpy(connect_type, "(N_Port-to-N_Port)");
4343 break;
4344
4345 case 3:
4346 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4347 ha->switch_cap = sw_cap;
4348 ha->operating_mode = P2P;
4349 ha->current_topology = ISP_CFG_F;
4350 strcpy(connect_type, "(F_Port)");
4351 break;
4352
4353 default:
4354 ql_dbg(ql_dbg_disc, vha, 0x200f,
4355 "HBA in unknown topology %x, using NL.\n", topo);
4356 ha->current_topology = ISP_CFG_NL;
4357 strcpy(connect_type, "(Loop)");
4358 break;
4359 }
4360
4361 /* Save Host port and loop ID. */
4362 /* byte order - Big Endian */
4363 id.b.domain = domain;
4364 id.b.area = area;
4365 id.b.al_pa = al_pa;
4366 id.b.rsvd_1 = 0;
4367 spin_lock_irqsave(&ha->hardware_lock, flags);
4368 if (!(topo == 2 && ha->flags.n2n_bigger))
4369 qlt_update_host_map(vha, id);
4370 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4371
4372 if (!vha->flags.init_done)
4373 ql_log(ql_log_info, vha, 0x2010,
4374 "Topology - %s, Host Loop address 0x%x.\n",
4375 connect_type, vha->loop_id);
4376
4377 return(rval);
4378 }
4379
4380 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,const char * def)4381 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4382 const char *def)
4383 {
4384 char *st, *en;
4385 uint16_t index;
4386 uint64_t zero[2] = { 0 };
4387 struct qla_hw_data *ha = vha->hw;
4388 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4389 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4390
4391 if (len > sizeof(zero))
4392 len = sizeof(zero);
4393 if (memcmp(model, &zero, len) != 0) {
4394 memcpy(ha->model_number, model, len);
4395 st = en = ha->model_number;
4396 en += len - 1;
4397 while (en > st) {
4398 if (*en != 0x20 && *en != 0x00)
4399 break;
4400 *en-- = '\0';
4401 }
4402
4403 index = (ha->pdev->subsystem_device & 0xff);
4404 if (use_tbl &&
4405 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4406 index < QLA_MODEL_NAMES)
4407 strlcpy(ha->model_desc,
4408 qla2x00_model_name[index * 2 + 1],
4409 sizeof(ha->model_desc));
4410 } else {
4411 index = (ha->pdev->subsystem_device & 0xff);
4412 if (use_tbl &&
4413 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4414 index < QLA_MODEL_NAMES) {
4415 strlcpy(ha->model_number,
4416 qla2x00_model_name[index * 2],
4417 sizeof(ha->model_number));
4418 strlcpy(ha->model_desc,
4419 qla2x00_model_name[index * 2 + 1],
4420 sizeof(ha->model_desc));
4421 } else {
4422 strlcpy(ha->model_number, def,
4423 sizeof(ha->model_number));
4424 }
4425 }
4426 if (IS_FWI2_CAPABLE(ha))
4427 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4428 sizeof(ha->model_desc));
4429 }
4430
4431 /* On sparc systems, obtain port and node WWN from firmware
4432 * properties.
4433 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)4434 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4435 {
4436 #ifdef CONFIG_SPARC
4437 struct qla_hw_data *ha = vha->hw;
4438 struct pci_dev *pdev = ha->pdev;
4439 struct device_node *dp = pci_device_to_OF_node(pdev);
4440 const u8 *val;
4441 int len;
4442
4443 val = of_get_property(dp, "port-wwn", &len);
4444 if (val && len >= WWN_SIZE)
4445 memcpy(nv->port_name, val, WWN_SIZE);
4446
4447 val = of_get_property(dp, "node-wwn", &len);
4448 if (val && len >= WWN_SIZE)
4449 memcpy(nv->node_name, val, WWN_SIZE);
4450 #endif
4451 }
4452
4453 /*
4454 * NVRAM configuration for ISP 2xxx
4455 *
4456 * Input:
4457 * ha = adapter block pointer.
4458 *
4459 * Output:
4460 * initialization control block in response_ring
4461 * host adapters parameters in host adapter block
4462 *
4463 * Returns:
4464 * 0 = success.
4465 */
4466 int
qla2x00_nvram_config(scsi_qla_host_t * vha)4467 qla2x00_nvram_config(scsi_qla_host_t *vha)
4468 {
4469 int rval;
4470 uint8_t chksum = 0;
4471 uint16_t cnt;
4472 uint8_t *dptr1, *dptr2;
4473 struct qla_hw_data *ha = vha->hw;
4474 init_cb_t *icb = ha->init_cb;
4475 nvram_t *nv = ha->nvram;
4476 uint8_t *ptr = ha->nvram;
4477 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4478
4479 rval = QLA_SUCCESS;
4480
4481 /* Determine NVRAM starting address. */
4482 ha->nvram_size = sizeof(*nv);
4483 ha->nvram_base = 0;
4484 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4485 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1)
4486 ha->nvram_base = 0x80;
4487
4488 /* Get NVRAM data and calculate checksum. */
4489 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4490 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4491 chksum += *ptr++;
4492
4493 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4494 "Contents of NVRAM.\n");
4495 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4496 nv, ha->nvram_size);
4497
4498 /* Bad NVRAM data, set defaults parameters. */
4499 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4500 nv->nvram_version < 1) {
4501 /* Reset NVRAM data. */
4502 ql_log(ql_log_warn, vha, 0x0064,
4503 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4504 chksum, nv->id, nv->nvram_version);
4505 ql_log(ql_log_warn, vha, 0x0065,
4506 "Falling back to "
4507 "functioning (yet invalid -- WWPN) defaults.\n");
4508
4509 /*
4510 * Set default initialization control block.
4511 */
4512 memset(nv, 0, ha->nvram_size);
4513 nv->parameter_block_version = ICB_VERSION;
4514
4515 if (IS_QLA23XX(ha)) {
4516 nv->firmware_options[0] = BIT_2 | BIT_1;
4517 nv->firmware_options[1] = BIT_7 | BIT_5;
4518 nv->add_firmware_options[0] = BIT_5;
4519 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4520 nv->frame_payload_size = 2048;
4521 nv->special_options[1] = BIT_7;
4522 } else if (IS_QLA2200(ha)) {
4523 nv->firmware_options[0] = BIT_2 | BIT_1;
4524 nv->firmware_options[1] = BIT_7 | BIT_5;
4525 nv->add_firmware_options[0] = BIT_5;
4526 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4527 nv->frame_payload_size = 1024;
4528 } else if (IS_QLA2100(ha)) {
4529 nv->firmware_options[0] = BIT_3 | BIT_1;
4530 nv->firmware_options[1] = BIT_5;
4531 nv->frame_payload_size = 1024;
4532 }
4533
4534 nv->max_iocb_allocation = cpu_to_le16(256);
4535 nv->execution_throttle = cpu_to_le16(16);
4536 nv->retry_count = 8;
4537 nv->retry_delay = 1;
4538
4539 nv->port_name[0] = 33;
4540 nv->port_name[3] = 224;
4541 nv->port_name[4] = 139;
4542
4543 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4544
4545 nv->login_timeout = 4;
4546
4547 /*
4548 * Set default host adapter parameters
4549 */
4550 nv->host_p[1] = BIT_2;
4551 nv->reset_delay = 5;
4552 nv->port_down_retry_count = 8;
4553 nv->max_luns_per_target = cpu_to_le16(8);
4554 nv->link_down_timeout = 60;
4555
4556 rval = 1;
4557 }
4558
4559 /* Reset Initialization control block */
4560 memset(icb, 0, ha->init_cb_size);
4561
4562 /*
4563 * Setup driver NVRAM options.
4564 */
4565 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4566 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4567 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4568 nv->firmware_options[1] &= ~BIT_4;
4569
4570 if (IS_QLA23XX(ha)) {
4571 nv->firmware_options[0] |= BIT_2;
4572 nv->firmware_options[0] &= ~BIT_3;
4573 nv->special_options[0] &= ~BIT_6;
4574 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4575
4576 if (IS_QLA2300(ha)) {
4577 if (ha->fb_rev == FPM_2310) {
4578 strcpy(ha->model_number, "QLA2310");
4579 } else {
4580 strcpy(ha->model_number, "QLA2300");
4581 }
4582 } else {
4583 qla2x00_set_model_info(vha, nv->model_number,
4584 sizeof(nv->model_number), "QLA23xx");
4585 }
4586 } else if (IS_QLA2200(ha)) {
4587 nv->firmware_options[0] |= BIT_2;
4588 /*
4589 * 'Point-to-point preferred, else loop' is not a safe
4590 * connection mode setting.
4591 */
4592 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4593 (BIT_5 | BIT_4)) {
4594 /* Force 'loop preferred, else point-to-point'. */
4595 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4596 nv->add_firmware_options[0] |= BIT_5;
4597 }
4598 strcpy(ha->model_number, "QLA22xx");
4599 } else /*if (IS_QLA2100(ha))*/ {
4600 strcpy(ha->model_number, "QLA2100");
4601 }
4602
4603 /*
4604 * Copy over NVRAM RISC parameter block to initialization control block.
4605 */
4606 dptr1 = (uint8_t *)icb;
4607 dptr2 = (uint8_t *)&nv->parameter_block_version;
4608 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4609 while (cnt--)
4610 *dptr1++ = *dptr2++;
4611
4612 /* Copy 2nd half. */
4613 dptr1 = (uint8_t *)icb->add_firmware_options;
4614 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4615 while (cnt--)
4616 *dptr1++ = *dptr2++;
4617 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4618 /* Use alternate WWN? */
4619 if (nv->host_p[1] & BIT_7) {
4620 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4621 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4622 }
4623
4624 /* Prepare nodename */
4625 if ((icb->firmware_options[1] & BIT_6) == 0) {
4626 /*
4627 * Firmware will apply the following mask if the nodename was
4628 * not provided.
4629 */
4630 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4631 icb->node_name[0] &= 0xF0;
4632 }
4633
4634 /*
4635 * Set host adapter parameters.
4636 */
4637
4638 /*
4639 * BIT_7 in the host-parameters section allows for modification to
4640 * internal driver logging.
4641 */
4642 if (nv->host_p[0] & BIT_7)
4643 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4644 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4645 /* Always load RISC code on non ISP2[12]00 chips. */
4646 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4647 ha->flags.disable_risc_code_load = 0;
4648 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4649 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4650 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4651 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4652 ha->flags.disable_serdes = 0;
4653
4654 ha->operating_mode =
4655 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4656
4657 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4658 sizeof(ha->fw_seriallink_options));
4659
4660 /* save HBA serial number */
4661 ha->serial0 = icb->port_name[5];
4662 ha->serial1 = icb->port_name[6];
4663 ha->serial2 = icb->port_name[7];
4664 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4665 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4666
4667 icb->execution_throttle = cpu_to_le16(0xFFFF);
4668
4669 ha->retry_count = nv->retry_count;
4670
4671 /* Set minimum login_timeout to 4 seconds. */
4672 if (nv->login_timeout != ql2xlogintimeout)
4673 nv->login_timeout = ql2xlogintimeout;
4674 if (nv->login_timeout < 4)
4675 nv->login_timeout = 4;
4676 ha->login_timeout = nv->login_timeout;
4677
4678 /* Set minimum RATOV to 100 tenths of a second. */
4679 ha->r_a_tov = 100;
4680
4681 ha->loop_reset_delay = nv->reset_delay;
4682
4683 /* Link Down Timeout = 0:
4684 *
4685 * When Port Down timer expires we will start returning
4686 * I/O's to OS with "DID_NO_CONNECT".
4687 *
4688 * Link Down Timeout != 0:
4689 *
4690 * The driver waits for the link to come up after link down
4691 * before returning I/Os to OS with "DID_NO_CONNECT".
4692 */
4693 if (nv->link_down_timeout == 0) {
4694 ha->loop_down_abort_time =
4695 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4696 } else {
4697 ha->link_down_timeout = nv->link_down_timeout;
4698 ha->loop_down_abort_time =
4699 (LOOP_DOWN_TIME - ha->link_down_timeout);
4700 }
4701
4702 /*
4703 * Need enough time to try and get the port back.
4704 */
4705 ha->port_down_retry_count = nv->port_down_retry_count;
4706 if (qlport_down_retry)
4707 ha->port_down_retry_count = qlport_down_retry;
4708 /* Set login_retry_count */
4709 ha->login_retry_count = nv->retry_count;
4710 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4711 ha->port_down_retry_count > 3)
4712 ha->login_retry_count = ha->port_down_retry_count;
4713 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4714 ha->login_retry_count = ha->port_down_retry_count;
4715 if (ql2xloginretrycount)
4716 ha->login_retry_count = ql2xloginretrycount;
4717
4718 icb->lun_enables = cpu_to_le16(0);
4719 icb->command_resource_count = 0;
4720 icb->immediate_notify_resource_count = 0;
4721 icb->timeout = cpu_to_le16(0);
4722
4723 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4724 /* Enable RIO */
4725 icb->firmware_options[0] &= ~BIT_3;
4726 icb->add_firmware_options[0] &=
4727 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4728 icb->add_firmware_options[0] |= BIT_2;
4729 icb->response_accumulation_timer = 3;
4730 icb->interrupt_delay_timer = 5;
4731
4732 vha->flags.process_response_queue = 1;
4733 } else {
4734 /* Enable ZIO. */
4735 if (!vha->flags.init_done) {
4736 ha->zio_mode = icb->add_firmware_options[0] &
4737 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4738 ha->zio_timer = icb->interrupt_delay_timer ?
4739 icb->interrupt_delay_timer : 2;
4740 }
4741 icb->add_firmware_options[0] &=
4742 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4743 vha->flags.process_response_queue = 0;
4744 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4745 ha->zio_mode = QLA_ZIO_MODE_6;
4746
4747 ql_log(ql_log_info, vha, 0x0068,
4748 "ZIO mode %d enabled; timer delay (%d us).\n",
4749 ha->zio_mode, ha->zio_timer * 100);
4750
4751 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4752 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4753 vha->flags.process_response_queue = 1;
4754 }
4755 }
4756
4757 if (rval) {
4758 ql_log(ql_log_warn, vha, 0x0069,
4759 "NVRAM configuration failed.\n");
4760 }
4761 return (rval);
4762 }
4763
4764 static void
qla2x00_rport_del(void * data)4765 qla2x00_rport_del(void *data)
4766 {
4767 fc_port_t *fcport = data;
4768 struct fc_rport *rport;
4769 unsigned long flags;
4770
4771 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4772 rport = fcport->drport ? fcport->drport : fcport->rport;
4773 fcport->drport = NULL;
4774 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4775 if (rport) {
4776 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4777 "%s %8phN. rport %p roles %x\n",
4778 __func__, fcport->port_name, rport,
4779 rport->roles);
4780
4781 fc_remote_port_delete(rport);
4782 }
4783 }
4784
qla2x00_set_fcport_state(fc_port_t * fcport,int state)4785 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
4786 {
4787 int old_state;
4788
4789 old_state = atomic_read(&fcport->state);
4790 atomic_set(&fcport->state, state);
4791
4792 /* Don't print state transitions during initial allocation of fcport */
4793 if (old_state && old_state != state) {
4794 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
4795 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
4796 fcport->port_name, port_state_str[old_state],
4797 port_state_str[state], fcport->d_id.b.domain,
4798 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4799 }
4800 }
4801
4802 /**
4803 * qla2x00_alloc_fcport() - Allocate a generic fcport.
4804 * @vha: HA context
4805 * @flags: allocation flags
4806 *
4807 * Returns a pointer to the allocated fcport, or NULL, if none available.
4808 */
4809 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)4810 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4811 {
4812 fc_port_t *fcport;
4813
4814 fcport = kzalloc(sizeof(fc_port_t), flags);
4815 if (!fcport)
4816 return NULL;
4817
4818 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4819 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4820 flags);
4821 if (!fcport->ct_desc.ct_sns) {
4822 ql_log(ql_log_warn, vha, 0xd049,
4823 "Failed to allocate ct_sns request.\n");
4824 kfree(fcport);
4825 return NULL;
4826 }
4827
4828 /* Setup fcport template structure. */
4829 fcport->vha = vha;
4830 fcport->port_type = FCT_UNKNOWN;
4831 fcport->loop_id = FC_NO_LOOP_ID;
4832 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4833 fcport->supported_classes = FC_COS_UNSPECIFIED;
4834 fcport->fp_speed = PORT_SPEED_UNKNOWN;
4835
4836 fcport->disc_state = DSC_DELETED;
4837 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4838 fcport->deleted = QLA_SESS_DELETED;
4839 fcport->login_retry = vha->hw->login_retry_count;
4840 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4841 fcport->logout_on_delete = 1;
4842
4843 if (!fcport->ct_desc.ct_sns) {
4844 ql_log(ql_log_warn, vha, 0xd049,
4845 "Failed to allocate ct_sns request.\n");
4846 kfree(fcport);
4847 return NULL;
4848 }
4849
4850 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4851 INIT_WORK(&fcport->free_work, qlt_free_session_done);
4852 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
4853 INIT_LIST_HEAD(&fcport->gnl_entry);
4854 INIT_LIST_HEAD(&fcport->list);
4855
4856 return fcport;
4857 }
4858
4859 void
qla2x00_free_fcport(fc_port_t * fcport)4860 qla2x00_free_fcport(fc_port_t *fcport)
4861 {
4862 if (fcport->ct_desc.ct_sns) {
4863 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4864 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4865 fcport->ct_desc.ct_sns_dma);
4866
4867 fcport->ct_desc.ct_sns = NULL;
4868 }
4869 list_del(&fcport->list);
4870 qla2x00_clear_loop_id(fcport);
4871 kfree(fcport);
4872 }
4873
4874 /*
4875 * qla2x00_configure_loop
4876 * Updates Fibre Channel Device Database with what is actually on loop.
4877 *
4878 * Input:
4879 * ha = adapter block pointer.
4880 *
4881 * Returns:
4882 * 0 = success.
4883 * 1 = error.
4884 * 2 = database was full and device was not configured.
4885 */
4886 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)4887 qla2x00_configure_loop(scsi_qla_host_t *vha)
4888 {
4889 int rval;
4890 unsigned long flags, save_flags;
4891 struct qla_hw_data *ha = vha->hw;
4892
4893 rval = QLA_SUCCESS;
4894
4895 /* Get Initiator ID */
4896 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4897 rval = qla2x00_configure_hba(vha);
4898 if (rval != QLA_SUCCESS) {
4899 ql_dbg(ql_dbg_disc, vha, 0x2013,
4900 "Unable to configure HBA.\n");
4901 return (rval);
4902 }
4903 }
4904
4905 save_flags = flags = vha->dpc_flags;
4906 ql_dbg(ql_dbg_disc, vha, 0x2014,
4907 "Configure loop -- dpc flags = 0x%lx.\n", flags);
4908
4909 /*
4910 * If we have both an RSCN and PORT UPDATE pending then handle them
4911 * both at the same time.
4912 */
4913 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4914 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4915
4916 qla2x00_get_data_rate(vha);
4917
4918 /* Determine what we need to do */
4919 if (ha->current_topology == ISP_CFG_FL &&
4920 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4921
4922 set_bit(RSCN_UPDATE, &flags);
4923
4924 } else if (ha->current_topology == ISP_CFG_F &&
4925 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4926
4927 set_bit(RSCN_UPDATE, &flags);
4928 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4929
4930 } else if (ha->current_topology == ISP_CFG_NL ||
4931 ha->current_topology == ISP_CFG_N) {
4932 clear_bit(RSCN_UPDATE, &flags);
4933 set_bit(LOCAL_LOOP_UPDATE, &flags);
4934 } else if (!vha->flags.online ||
4935 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
4936 set_bit(RSCN_UPDATE, &flags);
4937 set_bit(LOCAL_LOOP_UPDATE, &flags);
4938 }
4939
4940 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
4941 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4942 ql_dbg(ql_dbg_disc, vha, 0x2015,
4943 "Loop resync needed, failing.\n");
4944 rval = QLA_FUNCTION_FAILED;
4945 } else
4946 rval = qla2x00_configure_local_loop(vha);
4947 }
4948
4949 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
4950 if (LOOP_TRANSITION(vha)) {
4951 ql_dbg(ql_dbg_disc, vha, 0x2099,
4952 "Needs RSCN update and loop transition.\n");
4953 rval = QLA_FUNCTION_FAILED;
4954 }
4955 else
4956 rval = qla2x00_configure_fabric(vha);
4957 }
4958
4959 if (rval == QLA_SUCCESS) {
4960 if (atomic_read(&vha->loop_down_timer) ||
4961 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4962 rval = QLA_FUNCTION_FAILED;
4963 } else {
4964 atomic_set(&vha->loop_state, LOOP_READY);
4965 ql_dbg(ql_dbg_disc, vha, 0x2069,
4966 "LOOP READY.\n");
4967 ha->flags.fw_init_done = 1;
4968
4969 /*
4970 * Process any ATIO queue entries that came in
4971 * while we weren't online.
4972 */
4973 if (qla_tgt_mode_enabled(vha) ||
4974 qla_dual_mode_enabled(vha)) {
4975 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
4976 qlt_24xx_process_atio_queue(vha, 0);
4977 spin_unlock_irqrestore(&ha->tgt.atio_lock,
4978 flags);
4979 }
4980 }
4981 }
4982
4983 if (rval) {
4984 ql_dbg(ql_dbg_disc, vha, 0x206a,
4985 "%s *** FAILED ***.\n", __func__);
4986 } else {
4987 ql_dbg(ql_dbg_disc, vha, 0x206b,
4988 "%s: exiting normally.\n", __func__);
4989 }
4990
4991 /* Restore state if a resync event occurred during processing */
4992 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4993 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
4994 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4995 if (test_bit(RSCN_UPDATE, &save_flags)) {
4996 set_bit(RSCN_UPDATE, &vha->dpc_flags);
4997 }
4998 }
4999
5000 return (rval);
5001 }
5002
5003 /*
5004 * qla2x00_configure_local_loop
5005 * Updates Fibre Channel Device Database with local loop devices.
5006 *
5007 * Input:
5008 * ha = adapter block pointer.
5009 *
5010 * Returns:
5011 * 0 = success.
5012 */
5013 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)5014 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5015 {
5016 int rval, rval2;
5017 int found_devs;
5018 int found;
5019 fc_port_t *fcport, *new_fcport;
5020
5021 uint16_t index;
5022 uint16_t entries;
5023 struct gid_list_info *gid;
5024 uint16_t loop_id;
5025 uint8_t domain, area, al_pa;
5026 struct qla_hw_data *ha = vha->hw;
5027 unsigned long flags;
5028
5029 /* Inititae N2N login. */
5030 if (N2N_TOPO(ha)) {
5031 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
5032 /* borrowing */
5033 u32 *bp, i, sz;
5034
5035 memset(ha->init_cb, 0, ha->init_cb_size);
5036 sz = min_t(int, sizeof(struct els_plogi_payload),
5037 ha->init_cb_size);
5038 rval = qla24xx_get_port_login_templ(vha,
5039 ha->init_cb_dma, (void *)ha->init_cb, sz);
5040 if (rval == QLA_SUCCESS) {
5041 bp = (uint32_t *)ha->init_cb;
5042 for (i = 0; i < sz/4 ; i++, bp++)
5043 *bp = cpu_to_be32(*bp);
5044
5045 memcpy(&ha->plogi_els_payld.data,
5046 (void *)ha->init_cb,
5047 sizeof(ha->plogi_els_payld.data));
5048 } else {
5049 ql_dbg(ql_dbg_init, vha, 0x00d1,
5050 "PLOGI ELS param read fail.\n");
5051 goto skip_login;
5052 }
5053 }
5054
5055 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5056 if (fcport->n2n_flag) {
5057 qla24xx_fcport_handle_login(vha, fcport);
5058 return QLA_SUCCESS;
5059 }
5060 }
5061 skip_login:
5062 spin_lock_irqsave(&vha->work_lock, flags);
5063 vha->scan.scan_retry++;
5064 spin_unlock_irqrestore(&vha->work_lock, flags);
5065
5066 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5067 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5068 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5069 }
5070 }
5071
5072 found_devs = 0;
5073 new_fcport = NULL;
5074 entries = MAX_FIBRE_DEVICES_LOOP;
5075
5076 /* Get list of logged in devices. */
5077 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5078 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5079 &entries);
5080 if (rval != QLA_SUCCESS)
5081 goto cleanup_allocation;
5082
5083 ql_dbg(ql_dbg_disc, vha, 0x2011,
5084 "Entries in ID list (%d).\n", entries);
5085 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5086 ha->gid_list, entries * sizeof(*ha->gid_list));
5087
5088 if (entries == 0) {
5089 spin_lock_irqsave(&vha->work_lock, flags);
5090 vha->scan.scan_retry++;
5091 spin_unlock_irqrestore(&vha->work_lock, flags);
5092
5093 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5094 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5095 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5096 }
5097 } else {
5098 vha->scan.scan_retry = 0;
5099 }
5100
5101 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5102 fcport->scan_state = QLA_FCPORT_SCAN;
5103 }
5104
5105 /* Allocate temporary fcport for any new fcports discovered. */
5106 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5107 if (new_fcport == NULL) {
5108 ql_log(ql_log_warn, vha, 0x2012,
5109 "Memory allocation failed for fcport.\n");
5110 rval = QLA_MEMORY_ALLOC_FAILED;
5111 goto cleanup_allocation;
5112 }
5113 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5114
5115 /* Add devices to port list. */
5116 gid = ha->gid_list;
5117 for (index = 0; index < entries; index++) {
5118 domain = gid->domain;
5119 area = gid->area;
5120 al_pa = gid->al_pa;
5121 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5122 loop_id = gid->loop_id_2100;
5123 else
5124 loop_id = le16_to_cpu(gid->loop_id);
5125 gid = (void *)gid + ha->gid_list_info_size;
5126
5127 /* Bypass reserved domain fields. */
5128 if ((domain & 0xf0) == 0xf0)
5129 continue;
5130
5131 /* Bypass if not same domain and area of adapter. */
5132 if (area && domain && ((area != vha->d_id.b.area) ||
5133 (domain != vha->d_id.b.domain)) &&
5134 (ha->current_topology == ISP_CFG_NL))
5135 continue;
5136
5137
5138 /* Bypass invalid local loop ID. */
5139 if (loop_id > LAST_LOCAL_LOOP_ID)
5140 continue;
5141
5142 memset(new_fcport->port_name, 0, WWN_SIZE);
5143
5144 /* Fill in member data. */
5145 new_fcport->d_id.b.domain = domain;
5146 new_fcport->d_id.b.area = area;
5147 new_fcport->d_id.b.al_pa = al_pa;
5148 new_fcport->loop_id = loop_id;
5149 new_fcport->scan_state = QLA_FCPORT_FOUND;
5150
5151 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5152 if (rval2 != QLA_SUCCESS) {
5153 ql_dbg(ql_dbg_disc, vha, 0x2097,
5154 "Failed to retrieve fcport information "
5155 "-- get_port_database=%x, loop_id=0x%04x.\n",
5156 rval2, new_fcport->loop_id);
5157 /* Skip retry if N2N */
5158 if (ha->current_topology != ISP_CFG_N) {
5159 ql_dbg(ql_dbg_disc, vha, 0x2105,
5160 "Scheduling resync.\n");
5161 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5162 continue;
5163 }
5164 }
5165
5166 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5167 /* Check for matching device in port list. */
5168 found = 0;
5169 fcport = NULL;
5170 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5171 if (memcmp(new_fcport->port_name, fcport->port_name,
5172 WWN_SIZE))
5173 continue;
5174
5175 fcport->flags &= ~FCF_FABRIC_DEVICE;
5176 fcport->loop_id = new_fcport->loop_id;
5177 fcport->port_type = new_fcport->port_type;
5178 fcport->d_id.b24 = new_fcport->d_id.b24;
5179 memcpy(fcport->node_name, new_fcport->node_name,
5180 WWN_SIZE);
5181 fcport->scan_state = QLA_FCPORT_FOUND;
5182 found++;
5183 break;
5184 }
5185
5186 if (!found) {
5187 /* New device, add to fcports list. */
5188 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5189
5190 /* Allocate a new replacement fcport. */
5191 fcport = new_fcport;
5192
5193 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5194
5195 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5196
5197 if (new_fcport == NULL) {
5198 ql_log(ql_log_warn, vha, 0xd031,
5199 "Failed to allocate memory for fcport.\n");
5200 rval = QLA_MEMORY_ALLOC_FAILED;
5201 goto cleanup_allocation;
5202 }
5203 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5204 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5205 }
5206
5207 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5208
5209 /* Base iIDMA settings on HBA port speed. */
5210 fcport->fp_speed = ha->link_data_rate;
5211
5212 found_devs++;
5213 }
5214
5215 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5216 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5217 break;
5218
5219 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5220 if ((qla_dual_mode_enabled(vha) ||
5221 qla_ini_mode_enabled(vha)) &&
5222 atomic_read(&fcport->state) == FCS_ONLINE) {
5223 qla2x00_mark_device_lost(vha, fcport,
5224 ql2xplogiabsentdevice, 0);
5225 if (fcport->loop_id != FC_NO_LOOP_ID &&
5226 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5227 fcport->port_type != FCT_INITIATOR &&
5228 fcport->port_type != FCT_BROADCAST) {
5229 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5230 "%s %d %8phC post del sess\n",
5231 __func__, __LINE__,
5232 fcport->port_name);
5233
5234 qlt_schedule_sess_for_deletion(fcport);
5235 continue;
5236 }
5237 }
5238 }
5239
5240 if (fcport->scan_state == QLA_FCPORT_FOUND)
5241 qla24xx_fcport_handle_login(vha, fcport);
5242 }
5243
5244 cleanup_allocation:
5245 kfree(new_fcport);
5246
5247 if (rval != QLA_SUCCESS) {
5248 ql_dbg(ql_dbg_disc, vha, 0x2098,
5249 "Configure local loop error exit: rval=%x.\n", rval);
5250 }
5251
5252 return (rval);
5253 }
5254
5255 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5256 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5257 {
5258 int rval;
5259 uint16_t mb[MAILBOX_REGISTER_COUNT];
5260 struct qla_hw_data *ha = vha->hw;
5261
5262 if (!IS_IIDMA_CAPABLE(ha))
5263 return;
5264
5265 if (atomic_read(&fcport->state) != FCS_ONLINE)
5266 return;
5267
5268 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5269 fcport->fp_speed > ha->link_data_rate ||
5270 !ha->flags.gpsc_supported)
5271 return;
5272
5273 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5274 mb);
5275 if (rval != QLA_SUCCESS) {
5276 ql_dbg(ql_dbg_disc, vha, 0x2004,
5277 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5278 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5279 } else {
5280 ql_dbg(ql_dbg_disc, vha, 0x2005,
5281 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5282 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5283 fcport->fp_speed, fcport->port_name);
5284 }
5285 }
5286
qla_do_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5287 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5288 {
5289 qla2x00_iidma_fcport(vha, fcport);
5290 qla24xx_update_fcport_fcp_prio(vha, fcport);
5291 }
5292
qla_post_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5293 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5294 {
5295 struct qla_work_evt *e;
5296
5297 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5298 if (!e)
5299 return QLA_FUNCTION_FAILED;
5300
5301 e->u.fcport.fcport = fcport;
5302 return qla2x00_post_work(vha, e);
5303 }
5304
5305 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5306 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)5307 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5308 {
5309 struct fc_rport_identifiers rport_ids;
5310 struct fc_rport *rport;
5311 unsigned long flags;
5312
5313 if (atomic_read(&fcport->state) == FCS_ONLINE)
5314 return;
5315
5316 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5317 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5318 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5319 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5320 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5321 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5322 if (!rport) {
5323 ql_log(ql_log_warn, vha, 0x2006,
5324 "Unable to allocate fc remote port.\n");
5325 return;
5326 }
5327
5328 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5329 *((fc_port_t **)rport->dd_data) = fcport;
5330 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5331
5332 rport->supported_classes = fcport->supported_classes;
5333
5334 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5335 if (fcport->port_type == FCT_INITIATOR)
5336 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5337 if (fcport->port_type == FCT_TARGET)
5338 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5339 if (fcport->port_type & FCT_NVME_INITIATOR)
5340 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5341 if (fcport->port_type & FCT_NVME_TARGET)
5342 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5343 if (fcport->port_type & FCT_NVME_DISCOVERY)
5344 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5345
5346 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5347 "%s %8phN. rport %p is %s mode\n",
5348 __func__, fcport->port_name, rport,
5349 (fcport->port_type == FCT_TARGET) ? "tgt" :
5350 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5351
5352 fc_remote_port_rolechg(rport, rport_ids.roles);
5353 }
5354
5355 /*
5356 * qla2x00_update_fcport
5357 * Updates device on list.
5358 *
5359 * Input:
5360 * ha = adapter block pointer.
5361 * fcport = port structure pointer.
5362 *
5363 * Return:
5364 * 0 - Success
5365 * BIT_0 - error
5366 *
5367 * Context:
5368 * Kernel context.
5369 */
5370 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5371 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5372 {
5373 if (IS_SW_RESV_ADDR(fcport->d_id))
5374 return;
5375
5376 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5377 __func__, fcport->port_name);
5378
5379 fcport->disc_state = DSC_UPD_FCPORT;
5380 fcport->login_retry = vha->hw->login_retry_count;
5381 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5382 fcport->deleted = 0;
5383 fcport->logout_on_delete = 1;
5384 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5385
5386 switch (vha->hw->current_topology) {
5387 case ISP_CFG_N:
5388 case ISP_CFG_NL:
5389 fcport->keep_nport_handle = 1;
5390 break;
5391 default:
5392 break;
5393 }
5394
5395 qla2x00_iidma_fcport(vha, fcport);
5396
5397 if (fcport->fc4f_nvme) {
5398 qla_nvme_register_remote(vha, fcport);
5399 fcport->disc_state = DSC_LOGIN_COMPLETE;
5400 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5401 return;
5402 }
5403
5404 qla24xx_update_fcport_fcp_prio(vha, fcport);
5405
5406 switch (vha->host->active_mode) {
5407 case MODE_INITIATOR:
5408 qla2x00_reg_remote_port(vha, fcport);
5409 break;
5410 case MODE_TARGET:
5411 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5412 !vha->vha_tgt.qla_tgt->tgt_stopped)
5413 qlt_fc_port_added(vha, fcport);
5414 break;
5415 case MODE_DUAL:
5416 qla2x00_reg_remote_port(vha, fcport);
5417 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5418 !vha->vha_tgt.qla_tgt->tgt_stopped)
5419 qlt_fc_port_added(vha, fcport);
5420 break;
5421 default:
5422 break;
5423 }
5424
5425 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5426
5427 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5428 if (fcport->id_changed) {
5429 fcport->id_changed = 0;
5430 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5431 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5432 __func__, __LINE__, fcport->port_name,
5433 vha->fcport_count);
5434 qla24xx_post_gfpnid_work(vha, fcport);
5435 } else {
5436 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5437 "%s %d %8phC post gpsc fcp_cnt %d\n",
5438 __func__, __LINE__, fcport->port_name,
5439 vha->fcport_count);
5440 qla24xx_post_gpsc_work(vha, fcport);
5441 }
5442 }
5443
5444 fcport->disc_state = DSC_LOGIN_COMPLETE;
5445 }
5446
qla_register_fcport_fn(struct work_struct * work)5447 void qla_register_fcport_fn(struct work_struct *work)
5448 {
5449 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5450 u32 rscn_gen = fcport->rscn_gen;
5451 u16 data[2];
5452
5453 if (IS_SW_RESV_ADDR(fcport->d_id))
5454 return;
5455
5456 qla2x00_update_fcport(fcport->vha, fcport);
5457
5458 if (rscn_gen != fcport->rscn_gen) {
5459 /* RSCN(s) came in while registration */
5460 switch (fcport->next_disc_state) {
5461 case DSC_DELETE_PEND:
5462 qlt_schedule_sess_for_deletion(fcport);
5463 break;
5464 case DSC_ADISC:
5465 data[0] = data[1] = 0;
5466 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5467 data);
5468 break;
5469 default:
5470 break;
5471 }
5472 }
5473 }
5474
5475 /*
5476 * qla2x00_configure_fabric
5477 * Setup SNS devices with loop ID's.
5478 *
5479 * Input:
5480 * ha = adapter block pointer.
5481 *
5482 * Returns:
5483 * 0 = success.
5484 * BIT_0 = error
5485 */
5486 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)5487 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5488 {
5489 int rval;
5490 fc_port_t *fcport;
5491 uint16_t mb[MAILBOX_REGISTER_COUNT];
5492 uint16_t loop_id;
5493 LIST_HEAD(new_fcports);
5494 struct qla_hw_data *ha = vha->hw;
5495 int discovery_gen;
5496
5497 /* If FL port exists, then SNS is present */
5498 if (IS_FWI2_CAPABLE(ha))
5499 loop_id = NPH_F_PORT;
5500 else
5501 loop_id = SNS_FL_PORT;
5502 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5503 if (rval != QLA_SUCCESS) {
5504 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5505 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5506
5507 vha->device_flags &= ~SWITCH_FOUND;
5508 return (QLA_SUCCESS);
5509 }
5510 vha->device_flags |= SWITCH_FOUND;
5511
5512
5513 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5514 rval = qla2x00_send_change_request(vha, 0x3, 0);
5515 if (rval != QLA_SUCCESS)
5516 ql_log(ql_log_warn, vha, 0x121,
5517 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5518 rval);
5519 }
5520
5521
5522 do {
5523 qla2x00_mgmt_svr_login(vha);
5524
5525 /* FDMI support. */
5526 if (ql2xfdmienable &&
5527 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5528 qla2x00_fdmi_register(vha);
5529
5530 /* Ensure we are logged into the SNS. */
5531 loop_id = NPH_SNS_LID(ha);
5532 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5533 0xfc, mb, BIT_1|BIT_0);
5534 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5535 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5536 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5537 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5538 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5539 return rval;
5540 }
5541 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5542 if (qla2x00_rft_id(vha)) {
5543 /* EMPTY */
5544 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5545 "Register FC-4 TYPE failed.\n");
5546 if (test_bit(LOOP_RESYNC_NEEDED,
5547 &vha->dpc_flags))
5548 break;
5549 }
5550 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5551 /* EMPTY */
5552 ql_dbg(ql_dbg_disc, vha, 0x209a,
5553 "Register FC-4 Features failed.\n");
5554 if (test_bit(LOOP_RESYNC_NEEDED,
5555 &vha->dpc_flags))
5556 break;
5557 }
5558 if (vha->flags.nvme_enabled) {
5559 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5560 ql_dbg(ql_dbg_disc, vha, 0x2049,
5561 "Register NVME FC Type Features failed.\n");
5562 }
5563 }
5564 if (qla2x00_rnn_id(vha)) {
5565 /* EMPTY */
5566 ql_dbg(ql_dbg_disc, vha, 0x2104,
5567 "Register Node Name failed.\n");
5568 if (test_bit(LOOP_RESYNC_NEEDED,
5569 &vha->dpc_flags))
5570 break;
5571 } else if (qla2x00_rsnn_nn(vha)) {
5572 /* EMPTY */
5573 ql_dbg(ql_dbg_disc, vha, 0x209b,
5574 "Register Symbolic Node Name failed.\n");
5575 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5576 break;
5577 }
5578 }
5579
5580
5581 /* Mark the time right before querying FW for connected ports.
5582 * This process is long, asynchronous and by the time it's done,
5583 * collected information might not be accurate anymore. E.g.
5584 * disconnected port might have re-connected and a brand new
5585 * session has been created. In this case session's generation
5586 * will be newer than discovery_gen. */
5587 qlt_do_generation_tick(vha, &discovery_gen);
5588
5589 if (USE_ASYNC_SCAN(ha)) {
5590 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5591 NULL);
5592 if (rval)
5593 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5594 } else {
5595 list_for_each_entry(fcport, &vha->vp_fcports, list)
5596 fcport->scan_state = QLA_FCPORT_SCAN;
5597
5598 rval = qla2x00_find_all_fabric_devs(vha);
5599 }
5600 if (rval != QLA_SUCCESS)
5601 break;
5602 } while (0);
5603
5604 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5605 qla_nvme_register_hba(vha);
5606
5607 if (rval)
5608 ql_dbg(ql_dbg_disc, vha, 0x2068,
5609 "Configure fabric error exit rval=%d.\n", rval);
5610
5611 return (rval);
5612 }
5613
5614 /*
5615 * qla2x00_find_all_fabric_devs
5616 *
5617 * Input:
5618 * ha = adapter block pointer.
5619 * dev = database device entry pointer.
5620 *
5621 * Returns:
5622 * 0 = success.
5623 *
5624 * Context:
5625 * Kernel context.
5626 */
5627 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha)5628 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5629 {
5630 int rval;
5631 uint16_t loop_id;
5632 fc_port_t *fcport, *new_fcport;
5633 int found;
5634
5635 sw_info_t *swl;
5636 int swl_idx;
5637 int first_dev, last_dev;
5638 port_id_t wrap = {}, nxt_d_id;
5639 struct qla_hw_data *ha = vha->hw;
5640 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5641 unsigned long flags;
5642
5643 rval = QLA_SUCCESS;
5644
5645 /* Try GID_PT to get device list, else GAN. */
5646 if (!ha->swl)
5647 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5648 GFP_KERNEL);
5649 swl = ha->swl;
5650 if (!swl) {
5651 /*EMPTY*/
5652 ql_dbg(ql_dbg_disc, vha, 0x209c,
5653 "GID_PT allocations failed, fallback on GA_NXT.\n");
5654 } else {
5655 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5656 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5657 swl = NULL;
5658 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5659 return rval;
5660 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5661 swl = NULL;
5662 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5663 return rval;
5664 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5665 swl = NULL;
5666 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5667 return rval;
5668 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5669 swl = NULL;
5670 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5671 return rval;
5672 }
5673
5674 /* If other queries succeeded probe for FC-4 type */
5675 if (swl) {
5676 qla2x00_gff_id(vha, swl);
5677 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5678 return rval;
5679 }
5680 }
5681 swl_idx = 0;
5682
5683 /* Allocate temporary fcport for any new fcports discovered. */
5684 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5685 if (new_fcport == NULL) {
5686 ql_log(ql_log_warn, vha, 0x209d,
5687 "Failed to allocate memory for fcport.\n");
5688 return (QLA_MEMORY_ALLOC_FAILED);
5689 }
5690 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5691 /* Set start port ID scan at adapter ID. */
5692 first_dev = 1;
5693 last_dev = 0;
5694
5695 /* Starting free loop ID. */
5696 loop_id = ha->min_external_loopid;
5697 for (; loop_id <= ha->max_loop_id; loop_id++) {
5698 if (qla2x00_is_reserved_id(vha, loop_id))
5699 continue;
5700
5701 if (ha->current_topology == ISP_CFG_FL &&
5702 (atomic_read(&vha->loop_down_timer) ||
5703 LOOP_TRANSITION(vha))) {
5704 atomic_set(&vha->loop_down_timer, 0);
5705 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5706 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5707 break;
5708 }
5709
5710 if (swl != NULL) {
5711 if (last_dev) {
5712 wrap.b24 = new_fcport->d_id.b24;
5713 } else {
5714 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5715 memcpy(new_fcport->node_name,
5716 swl[swl_idx].node_name, WWN_SIZE);
5717 memcpy(new_fcport->port_name,
5718 swl[swl_idx].port_name, WWN_SIZE);
5719 memcpy(new_fcport->fabric_port_name,
5720 swl[swl_idx].fabric_port_name, WWN_SIZE);
5721 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5722 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5723
5724 new_fcport->nvme_flag = 0;
5725 new_fcport->fc4f_nvme = 0;
5726 if (vha->flags.nvme_enabled &&
5727 swl[swl_idx].fc4f_nvme) {
5728 new_fcport->fc4f_nvme =
5729 swl[swl_idx].fc4f_nvme;
5730 ql_log(ql_log_info, vha, 0x2131,
5731 "FOUND: NVME port %8phC as FC Type 28h\n",
5732 new_fcport->port_name);
5733 }
5734
5735 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5736 last_dev = 1;
5737 }
5738 swl_idx++;
5739 }
5740 } else {
5741 /* Send GA_NXT to the switch */
5742 rval = qla2x00_ga_nxt(vha, new_fcport);
5743 if (rval != QLA_SUCCESS) {
5744 ql_log(ql_log_warn, vha, 0x209e,
5745 "SNS scan failed -- assuming "
5746 "zero-entry result.\n");
5747 rval = QLA_SUCCESS;
5748 break;
5749 }
5750 }
5751
5752 /* If wrap on switch device list, exit. */
5753 if (first_dev) {
5754 wrap.b24 = new_fcport->d_id.b24;
5755 first_dev = 0;
5756 } else if (new_fcport->d_id.b24 == wrap.b24) {
5757 ql_dbg(ql_dbg_disc, vha, 0x209f,
5758 "Device wrap (%02x%02x%02x).\n",
5759 new_fcport->d_id.b.domain,
5760 new_fcport->d_id.b.area,
5761 new_fcport->d_id.b.al_pa);
5762 break;
5763 }
5764
5765 /* Bypass if same physical adapter. */
5766 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5767 continue;
5768
5769 /* Bypass virtual ports of the same host. */
5770 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5771 continue;
5772
5773 /* Bypass if same domain and area of adapter. */
5774 if (((new_fcport->d_id.b24 & 0xffff00) ==
5775 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5776 ISP_CFG_FL)
5777 continue;
5778
5779 /* Bypass reserved domain fields. */
5780 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5781 continue;
5782
5783 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
5784 if (ql2xgffidenable &&
5785 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5786 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
5787 continue;
5788
5789 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5790
5791 /* Locate matching device in database. */
5792 found = 0;
5793 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5794 if (memcmp(new_fcport->port_name, fcport->port_name,
5795 WWN_SIZE))
5796 continue;
5797
5798 fcport->scan_state = QLA_FCPORT_FOUND;
5799
5800 found++;
5801
5802 /* Update port state. */
5803 memcpy(fcport->fabric_port_name,
5804 new_fcport->fabric_port_name, WWN_SIZE);
5805 fcport->fp_speed = new_fcport->fp_speed;
5806
5807 /*
5808 * If address the same and state FCS_ONLINE
5809 * (or in target mode), nothing changed.
5810 */
5811 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5812 (atomic_read(&fcport->state) == FCS_ONLINE ||
5813 (vha->host->active_mode == MODE_TARGET))) {
5814 break;
5815 }
5816
5817 /*
5818 * If device was not a fabric device before.
5819 */
5820 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5821 fcport->d_id.b24 = new_fcport->d_id.b24;
5822 qla2x00_clear_loop_id(fcport);
5823 fcport->flags |= (FCF_FABRIC_DEVICE |
5824 FCF_LOGIN_NEEDED);
5825 break;
5826 }
5827
5828 /*
5829 * Port ID changed or device was marked to be updated;
5830 * Log it out if still logged in and mark it for
5831 * relogin later.
5832 */
5833 if (qla_tgt_mode_enabled(base_vha)) {
5834 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5835 "port changed FC ID, %8phC"
5836 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5837 fcport->port_name,
5838 fcport->d_id.b.domain,
5839 fcport->d_id.b.area,
5840 fcport->d_id.b.al_pa,
5841 fcport->loop_id,
5842 new_fcport->d_id.b.domain,
5843 new_fcport->d_id.b.area,
5844 new_fcport->d_id.b.al_pa);
5845 fcport->d_id.b24 = new_fcport->d_id.b24;
5846 break;
5847 }
5848
5849 fcport->d_id.b24 = new_fcport->d_id.b24;
5850 fcport->flags |= FCF_LOGIN_NEEDED;
5851 break;
5852 }
5853
5854 if (fcport->fc4f_nvme) {
5855 if (fcport->disc_state == DSC_DELETE_PEND) {
5856 fcport->disc_state = DSC_GNL;
5857 vha->fcport_count--;
5858 fcport->login_succ = 0;
5859 }
5860 }
5861
5862 if (found) {
5863 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5864 continue;
5865 }
5866 /* If device was not in our fcports list, then add it. */
5867 new_fcport->scan_state = QLA_FCPORT_FOUND;
5868 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5869
5870 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5871
5872
5873 /* Allocate a new replacement fcport. */
5874 nxt_d_id.b24 = new_fcport->d_id.b24;
5875 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5876 if (new_fcport == NULL) {
5877 ql_log(ql_log_warn, vha, 0xd032,
5878 "Memory allocation failed for fcport.\n");
5879 return (QLA_MEMORY_ALLOC_FAILED);
5880 }
5881 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5882 new_fcport->d_id.b24 = nxt_d_id.b24;
5883 }
5884
5885 qla2x00_free_fcport(new_fcport);
5886
5887 /*
5888 * Logout all previous fabric dev marked lost, except FCP2 devices.
5889 */
5890 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5891 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5892 break;
5893
5894 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
5895 continue;
5896
5897 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5898 if ((qla_dual_mode_enabled(vha) ||
5899 qla_ini_mode_enabled(vha)) &&
5900 atomic_read(&fcport->state) == FCS_ONLINE) {
5901 qla2x00_mark_device_lost(vha, fcport,
5902 ql2xplogiabsentdevice, 0);
5903 if (fcport->loop_id != FC_NO_LOOP_ID &&
5904 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5905 fcport->port_type != FCT_INITIATOR &&
5906 fcport->port_type != FCT_BROADCAST) {
5907 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5908 "%s %d %8phC post del sess\n",
5909 __func__, __LINE__,
5910 fcport->port_name);
5911 qlt_schedule_sess_for_deletion(fcport);
5912 continue;
5913 }
5914 }
5915 }
5916
5917 if (fcport->scan_state == QLA_FCPORT_FOUND &&
5918 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
5919 qla24xx_fcport_handle_login(vha, fcport);
5920 }
5921 return (rval);
5922 }
5923
5924 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
5925 int
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t * vha)5926 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
5927 {
5928 int loop_id = FC_NO_LOOP_ID;
5929 int lid = NPH_MGMT_SERVER - vha->vp_idx;
5930 unsigned long flags;
5931 struct qla_hw_data *ha = vha->hw;
5932
5933 if (vha->vp_idx == 0) {
5934 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
5935 return NPH_MGMT_SERVER;
5936 }
5937
5938 /* pick id from high and work down to low */
5939 spin_lock_irqsave(&ha->vport_slock, flags);
5940 for (; lid > 0; lid--) {
5941 if (!test_bit(lid, vha->hw->loop_id_map)) {
5942 set_bit(lid, vha->hw->loop_id_map);
5943 loop_id = lid;
5944 break;
5945 }
5946 }
5947 spin_unlock_irqrestore(&ha->vport_slock, flags);
5948
5949 return loop_id;
5950 }
5951
5952 /*
5953 * qla2x00_fabric_login
5954 * Issue fabric login command.
5955 *
5956 * Input:
5957 * ha = adapter block pointer.
5958 * device = pointer to FC device type structure.
5959 *
5960 * Returns:
5961 * 0 - Login successfully
5962 * 1 - Login failed
5963 * 2 - Initiator device
5964 * 3 - Fatal error
5965 */
5966 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)5967 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
5968 uint16_t *next_loopid)
5969 {
5970 int rval;
5971 int retry;
5972 uint16_t tmp_loopid;
5973 uint16_t mb[MAILBOX_REGISTER_COUNT];
5974 struct qla_hw_data *ha = vha->hw;
5975
5976 retry = 0;
5977 tmp_loopid = 0;
5978
5979 for (;;) {
5980 ql_dbg(ql_dbg_disc, vha, 0x2000,
5981 "Trying Fabric Login w/loop id 0x%04x for port "
5982 "%02x%02x%02x.\n",
5983 fcport->loop_id, fcport->d_id.b.domain,
5984 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5985
5986 /* Login fcport on switch. */
5987 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
5988 fcport->d_id.b.domain, fcport->d_id.b.area,
5989 fcport->d_id.b.al_pa, mb, BIT_0);
5990 if (rval != QLA_SUCCESS) {
5991 return rval;
5992 }
5993 if (mb[0] == MBS_PORT_ID_USED) {
5994 /*
5995 * Device has another loop ID. The firmware team
5996 * recommends the driver perform an implicit login with
5997 * the specified ID again. The ID we just used is save
5998 * here so we return with an ID that can be tried by
5999 * the next login.
6000 */
6001 retry++;
6002 tmp_loopid = fcport->loop_id;
6003 fcport->loop_id = mb[1];
6004
6005 ql_dbg(ql_dbg_disc, vha, 0x2001,
6006 "Fabric Login: port in use - next loop "
6007 "id=0x%04x, port id= %02x%02x%02x.\n",
6008 fcport->loop_id, fcport->d_id.b.domain,
6009 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6010
6011 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6012 /*
6013 * Login succeeded.
6014 */
6015 if (retry) {
6016 /* A retry occurred before. */
6017 *next_loopid = tmp_loopid;
6018 } else {
6019 /*
6020 * No retry occurred before. Just increment the
6021 * ID value for next login.
6022 */
6023 *next_loopid = (fcport->loop_id + 1);
6024 }
6025
6026 if (mb[1] & BIT_0) {
6027 fcport->port_type = FCT_INITIATOR;
6028 } else {
6029 fcport->port_type = FCT_TARGET;
6030 if (mb[1] & BIT_1) {
6031 fcport->flags |= FCF_FCP2_DEVICE;
6032 }
6033 }
6034
6035 if (mb[10] & BIT_0)
6036 fcport->supported_classes |= FC_COS_CLASS2;
6037 if (mb[10] & BIT_1)
6038 fcport->supported_classes |= FC_COS_CLASS3;
6039
6040 if (IS_FWI2_CAPABLE(ha)) {
6041 if (mb[10] & BIT_7)
6042 fcport->flags |=
6043 FCF_CONF_COMP_SUPPORTED;
6044 }
6045
6046 rval = QLA_SUCCESS;
6047 break;
6048 } else if (mb[0] == MBS_LOOP_ID_USED) {
6049 /*
6050 * Loop ID already used, try next loop ID.
6051 */
6052 fcport->loop_id++;
6053 rval = qla2x00_find_new_loop_id(vha, fcport);
6054 if (rval != QLA_SUCCESS) {
6055 /* Ran out of loop IDs to use */
6056 break;
6057 }
6058 } else if (mb[0] == MBS_COMMAND_ERROR) {
6059 /*
6060 * Firmware possibly timed out during login. If NO
6061 * retries are left to do then the device is declared
6062 * dead.
6063 */
6064 *next_loopid = fcport->loop_id;
6065 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6066 fcport->d_id.b.domain, fcport->d_id.b.area,
6067 fcport->d_id.b.al_pa);
6068 qla2x00_mark_device_lost(vha, fcport, 1, 0);
6069
6070 rval = 1;
6071 break;
6072 } else {
6073 /*
6074 * unrecoverable / not handled error
6075 */
6076 ql_dbg(ql_dbg_disc, vha, 0x2002,
6077 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6078 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6079 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6080 fcport->loop_id, jiffies);
6081
6082 *next_loopid = fcport->loop_id;
6083 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6084 fcport->d_id.b.domain, fcport->d_id.b.area,
6085 fcport->d_id.b.al_pa);
6086 qla2x00_clear_loop_id(fcport);
6087 fcport->login_retry = 0;
6088
6089 rval = 3;
6090 break;
6091 }
6092 }
6093
6094 return (rval);
6095 }
6096
6097 /*
6098 * qla2x00_local_device_login
6099 * Issue local device login command.
6100 *
6101 * Input:
6102 * ha = adapter block pointer.
6103 * loop_id = loop id of device to login to.
6104 *
6105 * Returns (Where's the #define!!!!):
6106 * 0 - Login successfully
6107 * 1 - Login failed
6108 * 3 - Fatal error
6109 */
6110 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)6111 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6112 {
6113 int rval;
6114 uint16_t mb[MAILBOX_REGISTER_COUNT];
6115
6116 memset(mb, 0, sizeof(mb));
6117 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6118 if (rval == QLA_SUCCESS) {
6119 /* Interrogate mailbox registers for any errors */
6120 if (mb[0] == MBS_COMMAND_ERROR)
6121 rval = 1;
6122 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6123 /* device not in PCB table */
6124 rval = 3;
6125 }
6126
6127 return (rval);
6128 }
6129
6130 /*
6131 * qla2x00_loop_resync
6132 * Resync with fibre channel devices.
6133 *
6134 * Input:
6135 * ha = adapter block pointer.
6136 *
6137 * Returns:
6138 * 0 = success
6139 */
6140 int
qla2x00_loop_resync(scsi_qla_host_t * vha)6141 qla2x00_loop_resync(scsi_qla_host_t *vha)
6142 {
6143 int rval = QLA_SUCCESS;
6144 uint32_t wait_time;
6145
6146 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6147 if (vha->flags.online) {
6148 if (!(rval = qla2x00_fw_ready(vha))) {
6149 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6150 wait_time = 256;
6151 do {
6152 if (!IS_QLAFX00(vha->hw)) {
6153 /*
6154 * Issue a marker after FW becomes
6155 * ready.
6156 */
6157 qla2x00_marker(vha, vha->hw->base_qpair,
6158 0, 0, MK_SYNC_ALL);
6159 vha->marker_needed = 0;
6160 }
6161
6162 /* Remap devices on Loop. */
6163 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6164
6165 if (IS_QLAFX00(vha->hw))
6166 qlafx00_configure_devices(vha);
6167 else
6168 qla2x00_configure_loop(vha);
6169
6170 wait_time--;
6171 } while (!atomic_read(&vha->loop_down_timer) &&
6172 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6173 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6174 &vha->dpc_flags)));
6175 }
6176 }
6177
6178 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6179 return (QLA_FUNCTION_FAILED);
6180
6181 if (rval)
6182 ql_dbg(ql_dbg_disc, vha, 0x206c,
6183 "%s *** FAILED ***.\n", __func__);
6184
6185 return (rval);
6186 }
6187
6188 /*
6189 * qla2x00_perform_loop_resync
6190 * Description: This function will set the appropriate flags and call
6191 * qla2x00_loop_resync. If successful loop will be resynced
6192 * Arguments : scsi_qla_host_t pointer
6193 * returm : Success or Failure
6194 */
6195
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)6196 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6197 {
6198 int32_t rval = 0;
6199
6200 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6201 /*Configure the flags so that resync happens properly*/
6202 atomic_set(&ha->loop_down_timer, 0);
6203 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6204 atomic_set(&ha->loop_state, LOOP_UP);
6205 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6206 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6207 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6208
6209 rval = qla2x00_loop_resync(ha);
6210 } else
6211 atomic_set(&ha->loop_state, LOOP_DEAD);
6212
6213 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6214 }
6215
6216 return rval;
6217 }
6218
6219 void
qla2x00_update_fcports(scsi_qla_host_t * base_vha)6220 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6221 {
6222 fc_port_t *fcport;
6223 struct scsi_qla_host *vha;
6224 struct qla_hw_data *ha = base_vha->hw;
6225 unsigned long flags;
6226
6227 spin_lock_irqsave(&ha->vport_slock, flags);
6228 /* Go with deferred removal of rport references. */
6229 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6230 atomic_inc(&vha->vref_count);
6231 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6232 if (fcport->drport &&
6233 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6234 spin_unlock_irqrestore(&ha->vport_slock, flags);
6235 qla2x00_rport_del(fcport);
6236
6237 spin_lock_irqsave(&ha->vport_slock, flags);
6238 }
6239 }
6240 atomic_dec(&vha->vref_count);
6241 wake_up(&vha->vref_waitq);
6242 }
6243 spin_unlock_irqrestore(&ha->vport_slock, flags);
6244 }
6245
6246 /* Assumes idc_lock always held on entry */
6247 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)6248 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6249 {
6250 struct qla_hw_data *ha = vha->hw;
6251 uint32_t drv_presence, drv_presence_mask;
6252 uint32_t dev_part_info1, dev_part_info2, class_type;
6253 uint32_t class_type_mask = 0x3;
6254 uint16_t fcoe_other_function = 0xffff, i;
6255
6256 if (IS_QLA8044(ha)) {
6257 drv_presence = qla8044_rd_direct(vha,
6258 QLA8044_CRB_DRV_ACTIVE_INDEX);
6259 dev_part_info1 = qla8044_rd_direct(vha,
6260 QLA8044_CRB_DEV_PART_INFO_INDEX);
6261 dev_part_info2 = qla8044_rd_direct(vha,
6262 QLA8044_CRB_DEV_PART_INFO2);
6263 } else {
6264 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6265 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6266 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6267 }
6268 for (i = 0; i < 8; i++) {
6269 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6270 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6271 (i != ha->portnum)) {
6272 fcoe_other_function = i;
6273 break;
6274 }
6275 }
6276 if (fcoe_other_function == 0xffff) {
6277 for (i = 0; i < 8; i++) {
6278 class_type = ((dev_part_info2 >> (i * 4)) &
6279 class_type_mask);
6280 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6281 ((i + 8) != ha->portnum)) {
6282 fcoe_other_function = i + 8;
6283 break;
6284 }
6285 }
6286 }
6287 /*
6288 * Prepare drv-presence mask based on fcoe functions present.
6289 * However consider only valid physical fcoe function numbers (0-15).
6290 */
6291 drv_presence_mask = ~((1 << (ha->portnum)) |
6292 ((fcoe_other_function == 0xffff) ?
6293 0 : (1 << (fcoe_other_function))));
6294
6295 /* We are the reset owner iff:
6296 * - No other protocol drivers present.
6297 * - This is the lowest among fcoe functions. */
6298 if (!(drv_presence & drv_presence_mask) &&
6299 (ha->portnum < fcoe_other_function)) {
6300 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6301 "This host is Reset owner.\n");
6302 ha->flags.nic_core_reset_owner = 1;
6303 }
6304 }
6305
6306 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)6307 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6308 {
6309 int rval = QLA_SUCCESS;
6310 struct qla_hw_data *ha = vha->hw;
6311 uint32_t drv_ack;
6312
6313 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6314 if (rval == QLA_SUCCESS) {
6315 drv_ack |= (1 << ha->portnum);
6316 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6317 }
6318
6319 return rval;
6320 }
6321
6322 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)6323 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6324 {
6325 int rval = QLA_SUCCESS;
6326 struct qla_hw_data *ha = vha->hw;
6327 uint32_t drv_ack;
6328
6329 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6330 if (rval == QLA_SUCCESS) {
6331 drv_ack &= ~(1 << ha->portnum);
6332 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6333 }
6334
6335 return rval;
6336 }
6337
6338 static const char *
qla83xx_dev_state_to_string(uint32_t dev_state)6339 qla83xx_dev_state_to_string(uint32_t dev_state)
6340 {
6341 switch (dev_state) {
6342 case QLA8XXX_DEV_COLD:
6343 return "COLD/RE-INIT";
6344 case QLA8XXX_DEV_INITIALIZING:
6345 return "INITIALIZING";
6346 case QLA8XXX_DEV_READY:
6347 return "READY";
6348 case QLA8XXX_DEV_NEED_RESET:
6349 return "NEED RESET";
6350 case QLA8XXX_DEV_NEED_QUIESCENT:
6351 return "NEED QUIESCENT";
6352 case QLA8XXX_DEV_FAILED:
6353 return "FAILED";
6354 case QLA8XXX_DEV_QUIESCENT:
6355 return "QUIESCENT";
6356 default:
6357 return "Unknown";
6358 }
6359 }
6360
6361 /* Assumes idc-lock always held on entry */
6362 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)6363 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6364 {
6365 struct qla_hw_data *ha = vha->hw;
6366 uint32_t idc_audit_reg = 0, duration_secs = 0;
6367
6368 switch (audit_type) {
6369 case IDC_AUDIT_TIMESTAMP:
6370 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6371 idc_audit_reg = (ha->portnum) |
6372 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6373 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6374 break;
6375
6376 case IDC_AUDIT_COMPLETION:
6377 duration_secs = ((jiffies_to_msecs(jiffies) -
6378 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6379 idc_audit_reg = (ha->portnum) |
6380 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6381 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6382 break;
6383
6384 default:
6385 ql_log(ql_log_warn, vha, 0xb078,
6386 "Invalid audit type specified.\n");
6387 break;
6388 }
6389 }
6390
6391 /* Assumes idc_lock always held on entry */
6392 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)6393 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6394 {
6395 struct qla_hw_data *ha = vha->hw;
6396 uint32_t idc_control, dev_state;
6397
6398 __qla83xx_get_idc_control(vha, &idc_control);
6399 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6400 ql_log(ql_log_info, vha, 0xb080,
6401 "NIC Core reset has been disabled. idc-control=0x%x\n",
6402 idc_control);
6403 return QLA_FUNCTION_FAILED;
6404 }
6405
6406 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6407 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6408 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6409 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6410 QLA8XXX_DEV_NEED_RESET);
6411 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6412 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6413 } else {
6414 const char *state = qla83xx_dev_state_to_string(dev_state);
6415
6416 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6417
6418 /* SV: XXX: Is timeout required here? */
6419 /* Wait for IDC state change READY -> NEED_RESET */
6420 while (dev_state == QLA8XXX_DEV_READY) {
6421 qla83xx_idc_unlock(vha, 0);
6422 msleep(200);
6423 qla83xx_idc_lock(vha, 0);
6424 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6425 }
6426 }
6427
6428 /* Send IDC ack by writing to drv-ack register */
6429 __qla83xx_set_drv_ack(vha);
6430
6431 return QLA_SUCCESS;
6432 }
6433
6434 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)6435 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6436 {
6437 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6438 }
6439
6440 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)6441 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6442 {
6443 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6444 }
6445
6446 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)6447 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6448 {
6449 uint32_t drv_presence = 0;
6450 struct qla_hw_data *ha = vha->hw;
6451
6452 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6453 if (drv_presence & (1 << ha->portnum))
6454 return QLA_SUCCESS;
6455 else
6456 return QLA_TEST_FAILED;
6457 }
6458
6459 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)6460 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6461 {
6462 int rval = QLA_SUCCESS;
6463 struct qla_hw_data *ha = vha->hw;
6464
6465 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6466 "Entered %s().\n", __func__);
6467
6468 if (vha->device_flags & DFLG_DEV_FAILED) {
6469 ql_log(ql_log_warn, vha, 0xb059,
6470 "Device in unrecoverable FAILED state.\n");
6471 return QLA_FUNCTION_FAILED;
6472 }
6473
6474 qla83xx_idc_lock(vha, 0);
6475
6476 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6477 ql_log(ql_log_warn, vha, 0xb05a,
6478 "Function=0x%x has been removed from IDC participation.\n",
6479 ha->portnum);
6480 rval = QLA_FUNCTION_FAILED;
6481 goto exit;
6482 }
6483
6484 qla83xx_reset_ownership(vha);
6485
6486 rval = qla83xx_initiating_reset(vha);
6487
6488 /*
6489 * Perform reset if we are the reset-owner,
6490 * else wait till IDC state changes to READY/FAILED.
6491 */
6492 if (rval == QLA_SUCCESS) {
6493 rval = qla83xx_idc_state_handler(vha);
6494
6495 if (rval == QLA_SUCCESS)
6496 ha->flags.nic_core_hung = 0;
6497 __qla83xx_clear_drv_ack(vha);
6498 }
6499
6500 exit:
6501 qla83xx_idc_unlock(vha, 0);
6502
6503 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6504
6505 return rval;
6506 }
6507
6508 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)6509 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6510 {
6511 struct qla_hw_data *ha = vha->hw;
6512 int rval = QLA_FUNCTION_FAILED;
6513
6514 if (!IS_MCTP_CAPABLE(ha)) {
6515 /* This message can be removed from the final version */
6516 ql_log(ql_log_info, vha, 0x506d,
6517 "This board is not MCTP capable\n");
6518 return rval;
6519 }
6520
6521 if (!ha->mctp_dump) {
6522 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6523 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6524
6525 if (!ha->mctp_dump) {
6526 ql_log(ql_log_warn, vha, 0x506e,
6527 "Failed to allocate memory for mctp dump\n");
6528 return rval;
6529 }
6530 }
6531
6532 #define MCTP_DUMP_STR_ADDR 0x00000000
6533 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6534 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6535 if (rval != QLA_SUCCESS) {
6536 ql_log(ql_log_warn, vha, 0x506f,
6537 "Failed to capture mctp dump\n");
6538 } else {
6539 ql_log(ql_log_info, vha, 0x5070,
6540 "Mctp dump capture for host (%ld/%p).\n",
6541 vha->host_no, ha->mctp_dump);
6542 ha->mctp_dumped = 1;
6543 }
6544
6545 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6546 ha->flags.nic_core_reset_hdlr_active = 1;
6547 rval = qla83xx_restart_nic_firmware(vha);
6548 if (rval)
6549 /* NIC Core reset failed. */
6550 ql_log(ql_log_warn, vha, 0x5071,
6551 "Failed to restart nic firmware\n");
6552 else
6553 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6554 "Restarted NIC firmware successfully.\n");
6555 ha->flags.nic_core_reset_hdlr_active = 0;
6556 }
6557
6558 return rval;
6559
6560 }
6561
6562 /*
6563 * qla2x00_quiesce_io
6564 * Description: This function will block the new I/Os
6565 * Its not aborting any I/Os as context
6566 * is not destroyed during quiescence
6567 * Arguments: scsi_qla_host_t
6568 * return : void
6569 */
6570 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)6571 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6572 {
6573 struct qla_hw_data *ha = vha->hw;
6574 struct scsi_qla_host *vp;
6575
6576 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6577 "Quiescing I/O - ha=%p.\n", ha);
6578
6579 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6580 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6581 atomic_set(&vha->loop_state, LOOP_DOWN);
6582 qla2x00_mark_all_devices_lost(vha, 0);
6583 list_for_each_entry(vp, &ha->vp_list, list)
6584 qla2x00_mark_all_devices_lost(vp, 0);
6585 } else {
6586 if (!atomic_read(&vha->loop_down_timer))
6587 atomic_set(&vha->loop_down_timer,
6588 LOOP_DOWN_TIME);
6589 }
6590 /* Wait for pending cmds to complete */
6591 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
6592 != QLA_SUCCESS);
6593 }
6594
6595 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)6596 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6597 {
6598 struct qla_hw_data *ha = vha->hw;
6599 struct scsi_qla_host *vp;
6600 unsigned long flags;
6601 fc_port_t *fcport;
6602 u16 i;
6603
6604 /* For ISP82XX, driver waits for completion of the commands.
6605 * online flag should be set.
6606 */
6607 if (!(IS_P3P_TYPE(ha)))
6608 vha->flags.online = 0;
6609 ha->flags.chip_reset_done = 0;
6610 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6611 vha->qla_stats.total_isp_aborts++;
6612
6613 ql_log(ql_log_info, vha, 0x00af,
6614 "Performing ISP error recovery - ha=%p.\n", ha);
6615
6616 ha->flags.purge_mbox = 1;
6617 /* For ISP82XX, reset_chip is just disabling interrupts.
6618 * Driver waits for the completion of the commands.
6619 * the interrupts need to be enabled.
6620 */
6621 if (!(IS_P3P_TYPE(ha)))
6622 ha->isp_ops->reset_chip(vha);
6623
6624 ha->link_data_rate = PORT_SPEED_UNKNOWN;
6625 SAVE_TOPO(ha);
6626 ha->flags.rida_fmt2 = 0;
6627 ha->flags.n2n_ae = 0;
6628 ha->flags.lip_ae = 0;
6629 ha->current_topology = 0;
6630 ha->flags.fw_started = 0;
6631 ha->flags.fw_init_done = 0;
6632 ha->chip_reset++;
6633 ha->base_qpair->chip_reset = ha->chip_reset;
6634 for (i = 0; i < ha->max_qpairs; i++) {
6635 if (ha->queue_pair_map[i])
6636 ha->queue_pair_map[i]->chip_reset =
6637 ha->base_qpair->chip_reset;
6638 }
6639
6640 /* purge MBox commands */
6641 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6642 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6643 complete(&ha->mbx_intr_comp);
6644 }
6645
6646 i = 0;
6647 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6648 atomic_read(&ha->num_pend_mbx_stage2) ||
6649 atomic_read(&ha->num_pend_mbx_stage1)) {
6650 msleep(20);
6651 i++;
6652 if (i > 50)
6653 break;
6654 }
6655 ha->flags.purge_mbox = 0;
6656
6657 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6658 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6659 atomic_set(&vha->loop_state, LOOP_DOWN);
6660 qla2x00_mark_all_devices_lost(vha, 0);
6661
6662 spin_lock_irqsave(&ha->vport_slock, flags);
6663 list_for_each_entry(vp, &ha->vp_list, list) {
6664 atomic_inc(&vp->vref_count);
6665 spin_unlock_irqrestore(&ha->vport_slock, flags);
6666
6667 qla2x00_mark_all_devices_lost(vp, 0);
6668
6669 spin_lock_irqsave(&ha->vport_slock, flags);
6670 atomic_dec(&vp->vref_count);
6671 }
6672 spin_unlock_irqrestore(&ha->vport_slock, flags);
6673 } else {
6674 if (!atomic_read(&vha->loop_down_timer))
6675 atomic_set(&vha->loop_down_timer,
6676 LOOP_DOWN_TIME);
6677 }
6678
6679 /* Clear all async request states across all VPs. */
6680 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6681 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6682 fcport->scan_state = 0;
6683 }
6684 spin_lock_irqsave(&ha->vport_slock, flags);
6685 list_for_each_entry(vp, &ha->vp_list, list) {
6686 atomic_inc(&vp->vref_count);
6687 spin_unlock_irqrestore(&ha->vport_slock, flags);
6688
6689 list_for_each_entry(fcport, &vp->vp_fcports, list)
6690 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6691
6692 spin_lock_irqsave(&ha->vport_slock, flags);
6693 atomic_dec(&vp->vref_count);
6694 }
6695 spin_unlock_irqrestore(&ha->vport_slock, flags);
6696
6697 if (!ha->flags.eeh_busy) {
6698 /* Make sure for ISP 82XX IO DMA is complete */
6699 if (IS_P3P_TYPE(ha)) {
6700 qla82xx_chip_reset_cleanup(vha);
6701 ql_log(ql_log_info, vha, 0x00b4,
6702 "Done chip reset cleanup.\n");
6703
6704 /* Done waiting for pending commands.
6705 * Reset the online flag.
6706 */
6707 vha->flags.online = 0;
6708 }
6709
6710 /* Requeue all commands in outstanding command list. */
6711 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6712 }
6713 /* memory barrier */
6714 wmb();
6715 }
6716
6717 /*
6718 * qla2x00_abort_isp
6719 * Resets ISP and aborts all outstanding commands.
6720 *
6721 * Input:
6722 * ha = adapter block pointer.
6723 *
6724 * Returns:
6725 * 0 = success
6726 */
6727 int
qla2x00_abort_isp(scsi_qla_host_t * vha)6728 qla2x00_abort_isp(scsi_qla_host_t *vha)
6729 {
6730 int rval;
6731 uint8_t status = 0;
6732 struct qla_hw_data *ha = vha->hw;
6733 struct scsi_qla_host *vp;
6734 struct req_que *req = ha->req_q_map[0];
6735 unsigned long flags;
6736
6737 if (vha->flags.online) {
6738 qla2x00_abort_isp_cleanup(vha);
6739
6740 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
6741 ha->flags.chip_reset_done = 1;
6742 vha->flags.online = 1;
6743 status = 0;
6744 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6745 return status;
6746 }
6747
6748 if (IS_QLA8031(ha)) {
6749 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6750 "Clearing fcoe driver presence.\n");
6751 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6752 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6753 "Error while clearing DRV-Presence.\n");
6754 }
6755
6756 if (unlikely(pci_channel_offline(ha->pdev) &&
6757 ha->flags.pci_channel_io_perm_failure)) {
6758 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6759 status = 0;
6760 return status;
6761 }
6762
6763 switch (vha->qlini_mode) {
6764 case QLA2XXX_INI_MODE_DISABLED:
6765 if (!qla_tgt_mode_enabled(vha))
6766 return 0;
6767 break;
6768 case QLA2XXX_INI_MODE_DUAL:
6769 if (!qla_dual_mode_enabled(vha))
6770 return 0;
6771 break;
6772 case QLA2XXX_INI_MODE_ENABLED:
6773 default:
6774 break;
6775 }
6776
6777 ha->isp_ops->get_flash_version(vha, req->ring);
6778
6779 ha->isp_ops->nvram_config(vha);
6780
6781 if (!qla2x00_restart_isp(vha)) {
6782 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6783
6784 if (!atomic_read(&vha->loop_down_timer)) {
6785 /*
6786 * Issue marker command only when we are going
6787 * to start the I/O .
6788 */
6789 vha->marker_needed = 1;
6790 }
6791
6792 vha->flags.online = 1;
6793
6794 ha->isp_ops->enable_intrs(ha);
6795
6796 ha->isp_abort_cnt = 0;
6797 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6798
6799 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6800 qla2x00_get_fw_version(vha);
6801 if (ha->fce) {
6802 ha->flags.fce_enabled = 1;
6803 memset(ha->fce, 0,
6804 fce_calc_size(ha->fce_bufs));
6805 rval = qla2x00_enable_fce_trace(vha,
6806 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6807 &ha->fce_bufs);
6808 if (rval) {
6809 ql_log(ql_log_warn, vha, 0x8033,
6810 "Unable to reinitialize FCE "
6811 "(%d).\n", rval);
6812 ha->flags.fce_enabled = 0;
6813 }
6814 }
6815
6816 if (ha->eft) {
6817 memset(ha->eft, 0, EFT_SIZE);
6818 rval = qla2x00_enable_eft_trace(vha,
6819 ha->eft_dma, EFT_NUM_BUFFERS);
6820 if (rval) {
6821 ql_log(ql_log_warn, vha, 0x8034,
6822 "Unable to reinitialize EFT "
6823 "(%d).\n", rval);
6824 }
6825 }
6826 } else { /* failed the ISP abort */
6827 vha->flags.online = 1;
6828 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6829 if (ha->isp_abort_cnt == 0) {
6830 ql_log(ql_log_fatal, vha, 0x8035,
6831 "ISP error recover failed - "
6832 "board disabled.\n");
6833 /*
6834 * The next call disables the board
6835 * completely.
6836 */
6837 qla2x00_abort_isp_cleanup(vha);
6838 vha->flags.online = 0;
6839 clear_bit(ISP_ABORT_RETRY,
6840 &vha->dpc_flags);
6841 status = 0;
6842 } else { /* schedule another ISP abort */
6843 ha->isp_abort_cnt--;
6844 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6845 "ISP abort - retry remaining %d.\n",
6846 ha->isp_abort_cnt);
6847 status = 1;
6848 }
6849 } else {
6850 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6851 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6852 "ISP error recovery - retrying (%d) "
6853 "more times.\n", ha->isp_abort_cnt);
6854 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6855 status = 1;
6856 }
6857 }
6858
6859 }
6860
6861 if (!status) {
6862 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6863 qla2x00_configure_hba(vha);
6864 spin_lock_irqsave(&ha->vport_slock, flags);
6865 list_for_each_entry(vp, &ha->vp_list, list) {
6866 if (vp->vp_idx) {
6867 atomic_inc(&vp->vref_count);
6868 spin_unlock_irqrestore(&ha->vport_slock, flags);
6869
6870 qla2x00_vp_abort_isp(vp);
6871
6872 spin_lock_irqsave(&ha->vport_slock, flags);
6873 atomic_dec(&vp->vref_count);
6874 }
6875 }
6876 spin_unlock_irqrestore(&ha->vport_slock, flags);
6877
6878 if (IS_QLA8031(ha)) {
6879 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6880 "Setting back fcoe driver presence.\n");
6881 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6882 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6883 "Error while setting DRV-Presence.\n");
6884 }
6885 } else {
6886 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6887 __func__);
6888 }
6889
6890 return(status);
6891 }
6892
6893 /*
6894 * qla2x00_restart_isp
6895 * restarts the ISP after a reset
6896 *
6897 * Input:
6898 * ha = adapter block pointer.
6899 *
6900 * Returns:
6901 * 0 = success
6902 */
6903 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)6904 qla2x00_restart_isp(scsi_qla_host_t *vha)
6905 {
6906 int status = 0;
6907 struct qla_hw_data *ha = vha->hw;
6908
6909 /* If firmware needs to be loaded */
6910 if (qla2x00_isp_firmware(vha)) {
6911 vha->flags.online = 0;
6912 status = ha->isp_ops->chip_diag(vha);
6913 if (!status)
6914 status = qla2x00_setup_chip(vha);
6915 }
6916
6917 if (!status && !(status = qla2x00_init_rings(vha))) {
6918 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6919 ha->flags.chip_reset_done = 1;
6920
6921 /* Initialize the queues in use */
6922 qla25xx_init_queues(ha);
6923
6924 status = qla2x00_fw_ready(vha);
6925 if (!status) {
6926 /* Issue a marker after FW becomes ready. */
6927 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
6928 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6929 }
6930
6931 /* if no cable then assume it's good */
6932 if ((vha->device_flags & DFLG_NO_CABLE))
6933 status = 0;
6934 }
6935 return (status);
6936 }
6937
6938 static int
qla25xx_init_queues(struct qla_hw_data * ha)6939 qla25xx_init_queues(struct qla_hw_data *ha)
6940 {
6941 struct rsp_que *rsp = NULL;
6942 struct req_que *req = NULL;
6943 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6944 int ret = -1;
6945 int i;
6946
6947 for (i = 1; i < ha->max_rsp_queues; i++) {
6948 rsp = ha->rsp_q_map[i];
6949 if (rsp && test_bit(i, ha->rsp_qid_map)) {
6950 rsp->options &= ~BIT_0;
6951 ret = qla25xx_init_rsp_que(base_vha, rsp);
6952 if (ret != QLA_SUCCESS)
6953 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6954 "%s Rsp que: %d init failed.\n",
6955 __func__, rsp->id);
6956 else
6957 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6958 "%s Rsp que: %d inited.\n",
6959 __func__, rsp->id);
6960 }
6961 }
6962 for (i = 1; i < ha->max_req_queues; i++) {
6963 req = ha->req_q_map[i];
6964 if (req && test_bit(i, ha->req_qid_map)) {
6965 /* Clear outstanding commands array. */
6966 req->options &= ~BIT_0;
6967 ret = qla25xx_init_req_que(base_vha, req);
6968 if (ret != QLA_SUCCESS)
6969 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6970 "%s Req que: %d init failed.\n",
6971 __func__, req->id);
6972 else
6973 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6974 "%s Req que: %d inited.\n",
6975 __func__, req->id);
6976 }
6977 }
6978 return ret;
6979 }
6980
6981 /*
6982 * qla2x00_reset_adapter
6983 * Reset adapter.
6984 *
6985 * Input:
6986 * ha = adapter block pointer.
6987 */
6988 int
qla2x00_reset_adapter(scsi_qla_host_t * vha)6989 qla2x00_reset_adapter(scsi_qla_host_t *vha)
6990 {
6991 unsigned long flags = 0;
6992 struct qla_hw_data *ha = vha->hw;
6993 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6994
6995 vha->flags.online = 0;
6996 ha->isp_ops->disable_intrs(ha);
6997
6998 spin_lock_irqsave(&ha->hardware_lock, flags);
6999 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
7000 RD_REG_WORD(®->hccr); /* PCI Posting. */
7001 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
7002 RD_REG_WORD(®->hccr); /* PCI Posting. */
7003 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7004
7005 return QLA_SUCCESS;
7006 }
7007
7008 int
qla24xx_reset_adapter(scsi_qla_host_t * vha)7009 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7010 {
7011 unsigned long flags = 0;
7012 struct qla_hw_data *ha = vha->hw;
7013 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7014 int rval = QLA_SUCCESS;
7015
7016 if (IS_P3P_TYPE(ha))
7017 return rval;
7018
7019 vha->flags.online = 0;
7020 ha->isp_ops->disable_intrs(ha);
7021
7022 spin_lock_irqsave(&ha->hardware_lock, flags);
7023 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
7024 RD_REG_DWORD(®->hccr);
7025 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
7026 RD_REG_DWORD(®->hccr);
7027 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7028
7029 if (IS_NOPOLLING_TYPE(ha))
7030 ha->isp_ops->enable_intrs(ha);
7031
7032 return rval;
7033 }
7034
7035 /* On sparc systems, obtain port and node WWN from firmware
7036 * properties.
7037 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)7038 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7039 struct nvram_24xx *nv)
7040 {
7041 #ifdef CONFIG_SPARC
7042 struct qla_hw_data *ha = vha->hw;
7043 struct pci_dev *pdev = ha->pdev;
7044 struct device_node *dp = pci_device_to_OF_node(pdev);
7045 const u8 *val;
7046 int len;
7047
7048 val = of_get_property(dp, "port-wwn", &len);
7049 if (val && len >= WWN_SIZE)
7050 memcpy(nv->port_name, val, WWN_SIZE);
7051
7052 val = of_get_property(dp, "node-wwn", &len);
7053 if (val && len >= WWN_SIZE)
7054 memcpy(nv->node_name, val, WWN_SIZE);
7055 #endif
7056 }
7057
7058 int
qla24xx_nvram_config(scsi_qla_host_t * vha)7059 qla24xx_nvram_config(scsi_qla_host_t *vha)
7060 {
7061 int rval;
7062 struct init_cb_24xx *icb;
7063 struct nvram_24xx *nv;
7064 uint32_t *dptr;
7065 uint8_t *dptr1, *dptr2;
7066 uint32_t chksum;
7067 uint16_t cnt;
7068 struct qla_hw_data *ha = vha->hw;
7069
7070 rval = QLA_SUCCESS;
7071 icb = (struct init_cb_24xx *)ha->init_cb;
7072 nv = ha->nvram;
7073
7074 /* Determine NVRAM starting address. */
7075 if (ha->port_no == 0) {
7076 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7077 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7078 } else {
7079 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7080 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7081 }
7082
7083 ha->nvram_size = sizeof(*nv);
7084 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7085
7086 /* Get VPD data into cache */
7087 ha->vpd = ha->nvram + VPD_OFFSET;
7088 ha->isp_ops->read_nvram(vha, ha->vpd,
7089 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7090
7091 /* Get NVRAM data into cache and calculate checksum. */
7092 dptr = (uint32_t *)nv;
7093 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7094 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7095 chksum += le32_to_cpu(*dptr);
7096
7097 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7098 "Contents of NVRAM\n");
7099 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7100 nv, ha->nvram_size);
7101
7102 /* Bad NVRAM data, set defaults parameters. */
7103 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7104 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7105 /* Reset NVRAM data. */
7106 ql_log(ql_log_warn, vha, 0x006b,
7107 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7108 chksum, nv->id, nv->nvram_version);
7109 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7110 ql_log(ql_log_warn, vha, 0x006c,
7111 "Falling back to functioning (yet invalid -- WWPN) "
7112 "defaults.\n");
7113
7114 /*
7115 * Set default initialization control block.
7116 */
7117 memset(nv, 0, ha->nvram_size);
7118 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7119 nv->version = cpu_to_le16(ICB_VERSION);
7120 nv->frame_payload_size = 2048;
7121 nv->execution_throttle = cpu_to_le16(0xFFFF);
7122 nv->exchange_count = cpu_to_le16(0);
7123 nv->hard_address = cpu_to_le16(124);
7124 nv->port_name[0] = 0x21;
7125 nv->port_name[1] = 0x00 + ha->port_no + 1;
7126 nv->port_name[2] = 0x00;
7127 nv->port_name[3] = 0xe0;
7128 nv->port_name[4] = 0x8b;
7129 nv->port_name[5] = 0x1c;
7130 nv->port_name[6] = 0x55;
7131 nv->port_name[7] = 0x86;
7132 nv->node_name[0] = 0x20;
7133 nv->node_name[1] = 0x00;
7134 nv->node_name[2] = 0x00;
7135 nv->node_name[3] = 0xe0;
7136 nv->node_name[4] = 0x8b;
7137 nv->node_name[5] = 0x1c;
7138 nv->node_name[6] = 0x55;
7139 nv->node_name[7] = 0x86;
7140 qla24xx_nvram_wwn_from_ofw(vha, nv);
7141 nv->login_retry_count = cpu_to_le16(8);
7142 nv->interrupt_delay_timer = cpu_to_le16(0);
7143 nv->login_timeout = cpu_to_le16(0);
7144 nv->firmware_options_1 =
7145 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7146 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7147 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7148 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7149 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7150 nv->efi_parameters = cpu_to_le32(0);
7151 nv->reset_delay = 5;
7152 nv->max_luns_per_target = cpu_to_le16(128);
7153 nv->port_down_retry_count = cpu_to_le16(30);
7154 nv->link_down_timeout = cpu_to_le16(30);
7155
7156 rval = 1;
7157 }
7158
7159 if (qla_tgt_mode_enabled(vha)) {
7160 /* Don't enable full login after initial LIP */
7161 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7162 /* Don't enable LIP full login for initiator */
7163 nv->host_p &= cpu_to_le32(~BIT_10);
7164 }
7165
7166 qlt_24xx_config_nvram_stage1(vha, nv);
7167
7168 /* Reset Initialization control block */
7169 memset(icb, 0, ha->init_cb_size);
7170
7171 /* Copy 1st segment. */
7172 dptr1 = (uint8_t *)icb;
7173 dptr2 = (uint8_t *)&nv->version;
7174 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7175 while (cnt--)
7176 *dptr1++ = *dptr2++;
7177
7178 icb->login_retry_count = nv->login_retry_count;
7179 icb->link_down_on_nos = nv->link_down_on_nos;
7180
7181 /* Copy 2nd segment. */
7182 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7183 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7184 cnt = (uint8_t *)&icb->reserved_3 -
7185 (uint8_t *)&icb->interrupt_delay_timer;
7186 while (cnt--)
7187 *dptr1++ = *dptr2++;
7188 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7189 /*
7190 * Setup driver NVRAM options.
7191 */
7192 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7193 "QLA2462");
7194
7195 qlt_24xx_config_nvram_stage2(vha, icb);
7196
7197 if (nv->host_p & cpu_to_le32(BIT_15)) {
7198 /* Use alternate WWN? */
7199 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7200 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7201 }
7202
7203 /* Prepare nodename */
7204 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7205 /*
7206 * Firmware will apply the following mask if the nodename was
7207 * not provided.
7208 */
7209 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7210 icb->node_name[0] &= 0xF0;
7211 }
7212
7213 /* Set host adapter parameters. */
7214 ha->flags.disable_risc_code_load = 0;
7215 ha->flags.enable_lip_reset = 0;
7216 ha->flags.enable_lip_full_login =
7217 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7218 ha->flags.enable_target_reset =
7219 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7220 ha->flags.enable_led_scheme = 0;
7221 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7222
7223 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7224 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7225
7226 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7227 sizeof(ha->fw_seriallink_options24));
7228
7229 /* save HBA serial number */
7230 ha->serial0 = icb->port_name[5];
7231 ha->serial1 = icb->port_name[6];
7232 ha->serial2 = icb->port_name[7];
7233 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7234 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7235
7236 icb->execution_throttle = cpu_to_le16(0xFFFF);
7237
7238 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7239
7240 /* Set minimum login_timeout to 4 seconds. */
7241 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7242 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7243 if (le16_to_cpu(nv->login_timeout) < 4)
7244 nv->login_timeout = cpu_to_le16(4);
7245 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7246
7247 /* Set minimum RATOV to 100 tenths of a second. */
7248 ha->r_a_tov = 100;
7249
7250 ha->loop_reset_delay = nv->reset_delay;
7251
7252 /* Link Down Timeout = 0:
7253 *
7254 * When Port Down timer expires we will start returning
7255 * I/O's to OS with "DID_NO_CONNECT".
7256 *
7257 * Link Down Timeout != 0:
7258 *
7259 * The driver waits for the link to come up after link down
7260 * before returning I/Os to OS with "DID_NO_CONNECT".
7261 */
7262 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7263 ha->loop_down_abort_time =
7264 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7265 } else {
7266 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7267 ha->loop_down_abort_time =
7268 (LOOP_DOWN_TIME - ha->link_down_timeout);
7269 }
7270
7271 /* Need enough time to try and get the port back. */
7272 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7273 if (qlport_down_retry)
7274 ha->port_down_retry_count = qlport_down_retry;
7275
7276 /* Set login_retry_count */
7277 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7278 if (ha->port_down_retry_count ==
7279 le16_to_cpu(nv->port_down_retry_count) &&
7280 ha->port_down_retry_count > 3)
7281 ha->login_retry_count = ha->port_down_retry_count;
7282 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7283 ha->login_retry_count = ha->port_down_retry_count;
7284 if (ql2xloginretrycount)
7285 ha->login_retry_count = ql2xloginretrycount;
7286
7287 /* N2N: driver will initiate Login instead of FW */
7288 icb->firmware_options_3 |= BIT_8;
7289
7290 /* Enable ZIO. */
7291 if (!vha->flags.init_done) {
7292 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7293 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7294 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7295 le16_to_cpu(icb->interrupt_delay_timer) : 2;
7296 }
7297 icb->firmware_options_2 &= cpu_to_le32(
7298 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7299 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7300 ha->zio_mode = QLA_ZIO_MODE_6;
7301
7302 ql_log(ql_log_info, vha, 0x006f,
7303 "ZIO mode %d enabled; timer delay (%d us).\n",
7304 ha->zio_mode, ha->zio_timer * 100);
7305
7306 icb->firmware_options_2 |= cpu_to_le32(
7307 (uint32_t)ha->zio_mode);
7308 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7309 }
7310
7311 if (rval) {
7312 ql_log(ql_log_warn, vha, 0x0070,
7313 "NVRAM configuration failed.\n");
7314 }
7315 return (rval);
7316 }
7317
7318 static void
qla27xx_print_image(struct scsi_qla_host * vha,char * name,struct qla27xx_image_status * image_status)7319 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7320 struct qla27xx_image_status *image_status)
7321 {
7322 ql_dbg(ql_dbg_init, vha, 0x018b,
7323 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7324 name, "status",
7325 image_status->image_status_mask,
7326 le16_to_cpu(image_status->generation),
7327 image_status->ver_major,
7328 image_status->ver_minor,
7329 image_status->bitmap,
7330 le32_to_cpu(image_status->checksum),
7331 le32_to_cpu(image_status->signature));
7332 }
7333
7334 static bool
qla28xx_check_aux_image_status_signature(struct qla27xx_image_status * image_status)7335 qla28xx_check_aux_image_status_signature(
7336 struct qla27xx_image_status *image_status)
7337 {
7338 ulong signature = le32_to_cpu(image_status->signature);
7339
7340 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7341 }
7342
7343 static bool
qla27xx_check_image_status_signature(struct qla27xx_image_status * image_status)7344 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7345 {
7346 ulong signature = le32_to_cpu(image_status->signature);
7347
7348 return
7349 signature != QLA27XX_IMG_STATUS_SIGN &&
7350 signature != QLA28XX_IMG_STATUS_SIGN;
7351 }
7352
7353 static ulong
qla27xx_image_status_checksum(struct qla27xx_image_status * image_status)7354 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7355 {
7356 uint32_t *p = (void *)image_status;
7357 uint n = sizeof(*image_status) / sizeof(*p);
7358 uint32_t sum = 0;
7359
7360 for ( ; n--; p++)
7361 sum += le32_to_cpup(p);
7362
7363 return sum;
7364 }
7365
7366 static inline uint
qla28xx_component_bitmask(struct qla27xx_image_status * aux,uint bitmask)7367 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7368 {
7369 return aux->bitmap & bitmask ?
7370 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7371 }
7372
7373 static void
qla28xx_component_status(struct active_regions * active_regions,struct qla27xx_image_status * aux)7374 qla28xx_component_status(
7375 struct active_regions *active_regions, struct qla27xx_image_status *aux)
7376 {
7377 active_regions->aux.board_config =
7378 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7379
7380 active_regions->aux.vpd_nvram =
7381 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7382
7383 active_regions->aux.npiv_config_0_1 =
7384 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7385
7386 active_regions->aux.npiv_config_2_3 =
7387 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7388 }
7389
7390 static int
qla27xx_compare_image_generation(struct qla27xx_image_status * pri_image_status,struct qla27xx_image_status * sec_image_status)7391 qla27xx_compare_image_generation(
7392 struct qla27xx_image_status *pri_image_status,
7393 struct qla27xx_image_status *sec_image_status)
7394 {
7395 /* calculate generation delta as uint16 (this accounts for wrap) */
7396 int16_t delta =
7397 le16_to_cpu(pri_image_status->generation) -
7398 le16_to_cpu(sec_image_status->generation);
7399
7400 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7401
7402 return delta;
7403 }
7404
7405 void
qla28xx_get_aux_images(struct scsi_qla_host * vha,struct active_regions * active_regions)7406 qla28xx_get_aux_images(
7407 struct scsi_qla_host *vha, struct active_regions *active_regions)
7408 {
7409 struct qla_hw_data *ha = vha->hw;
7410 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7411 bool valid_pri_image = false, valid_sec_image = false;
7412 bool active_pri_image = false, active_sec_image = false;
7413
7414 if (!ha->flt_region_aux_img_status_pri) {
7415 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7416 goto check_sec_image;
7417 }
7418
7419 qla24xx_read_flash_data(vha, (void *)&pri_aux_image_status,
7420 ha->flt_region_aux_img_status_pri,
7421 sizeof(pri_aux_image_status) >> 2);
7422 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7423
7424 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7425 ql_dbg(ql_dbg_init, vha, 0x018b,
7426 "Primary aux image signature (%#x) not valid\n",
7427 le32_to_cpu(pri_aux_image_status.signature));
7428 goto check_sec_image;
7429 }
7430
7431 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7432 ql_dbg(ql_dbg_init, vha, 0x018c,
7433 "Primary aux image checksum failed\n");
7434 goto check_sec_image;
7435 }
7436
7437 valid_pri_image = true;
7438
7439 if (pri_aux_image_status.image_status_mask & 1) {
7440 ql_dbg(ql_dbg_init, vha, 0x018d,
7441 "Primary aux image is active\n");
7442 active_pri_image = true;
7443 }
7444
7445 check_sec_image:
7446 if (!ha->flt_region_aux_img_status_sec) {
7447 ql_dbg(ql_dbg_init, vha, 0x018a,
7448 "Secondary aux image not addressed\n");
7449 goto check_valid_image;
7450 }
7451
7452 qla24xx_read_flash_data(vha, (void *)&sec_aux_image_status,
7453 ha->flt_region_aux_img_status_sec,
7454 sizeof(sec_aux_image_status) >> 2);
7455 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
7456
7457 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
7458 ql_dbg(ql_dbg_init, vha, 0x018b,
7459 "Secondary aux image signature (%#x) not valid\n",
7460 le32_to_cpu(sec_aux_image_status.signature));
7461 goto check_valid_image;
7462 }
7463
7464 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
7465 ql_dbg(ql_dbg_init, vha, 0x018c,
7466 "Secondary aux image checksum failed\n");
7467 goto check_valid_image;
7468 }
7469
7470 valid_sec_image = true;
7471
7472 if (sec_aux_image_status.image_status_mask & 1) {
7473 ql_dbg(ql_dbg_init, vha, 0x018d,
7474 "Secondary aux image is active\n");
7475 active_sec_image = true;
7476 }
7477
7478 check_valid_image:
7479 if (valid_pri_image && active_pri_image &&
7480 valid_sec_image && active_sec_image) {
7481 if (qla27xx_compare_image_generation(&pri_aux_image_status,
7482 &sec_aux_image_status) >= 0) {
7483 qla28xx_component_status(active_regions,
7484 &pri_aux_image_status);
7485 } else {
7486 qla28xx_component_status(active_regions,
7487 &sec_aux_image_status);
7488 }
7489 } else if (valid_pri_image && active_pri_image) {
7490 qla28xx_component_status(active_regions, &pri_aux_image_status);
7491 } else if (valid_sec_image && active_sec_image) {
7492 qla28xx_component_status(active_regions, &sec_aux_image_status);
7493 }
7494
7495 ql_dbg(ql_dbg_init, vha, 0x018f,
7496 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
7497 active_regions->aux.board_config,
7498 active_regions->aux.vpd_nvram,
7499 active_regions->aux.npiv_config_0_1,
7500 active_regions->aux.npiv_config_2_3);
7501 }
7502
7503 void
qla27xx_get_active_image(struct scsi_qla_host * vha,struct active_regions * active_regions)7504 qla27xx_get_active_image(struct scsi_qla_host *vha,
7505 struct active_regions *active_regions)
7506 {
7507 struct qla_hw_data *ha = vha->hw;
7508 struct qla27xx_image_status pri_image_status, sec_image_status;
7509 bool valid_pri_image = false, valid_sec_image = false;
7510 bool active_pri_image = false, active_sec_image = false;
7511
7512 if (!ha->flt_region_img_status_pri) {
7513 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7514 goto check_sec_image;
7515 }
7516
7517 if (qla24xx_read_flash_data(vha, (void *)(&pri_image_status),
7518 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
7519 QLA_SUCCESS) {
7520 WARN_ON_ONCE(true);
7521 goto check_sec_image;
7522 }
7523 qla27xx_print_image(vha, "Primary image", &pri_image_status);
7524
7525 if (qla27xx_check_image_status_signature(&pri_image_status)) {
7526 ql_dbg(ql_dbg_init, vha, 0x018b,
7527 "Primary image signature (%#x) not valid\n",
7528 le32_to_cpu(pri_image_status.signature));
7529 goto check_sec_image;
7530 }
7531
7532 if (qla27xx_image_status_checksum(&pri_image_status)) {
7533 ql_dbg(ql_dbg_init, vha, 0x018c,
7534 "Primary image checksum failed\n");
7535 goto check_sec_image;
7536 }
7537
7538 valid_pri_image = true;
7539
7540 if (pri_image_status.image_status_mask & 1) {
7541 ql_dbg(ql_dbg_init, vha, 0x018d,
7542 "Primary image is active\n");
7543 active_pri_image = true;
7544 }
7545
7546 check_sec_image:
7547 if (!ha->flt_region_img_status_sec) {
7548 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7549 goto check_valid_image;
7550 }
7551
7552 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7553 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
7554 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7555
7556 if (qla27xx_check_image_status_signature(&sec_image_status)) {
7557 ql_dbg(ql_dbg_init, vha, 0x018b,
7558 "Secondary image signature (%#x) not valid\n",
7559 le32_to_cpu(sec_image_status.signature));
7560 goto check_valid_image;
7561 }
7562
7563 if (qla27xx_image_status_checksum(&sec_image_status)) {
7564 ql_dbg(ql_dbg_init, vha, 0x018c,
7565 "Secondary image checksum failed\n");
7566 goto check_valid_image;
7567 }
7568
7569 valid_sec_image = true;
7570
7571 if (sec_image_status.image_status_mask & 1) {
7572 ql_dbg(ql_dbg_init, vha, 0x018d,
7573 "Secondary image is active\n");
7574 active_sec_image = true;
7575 }
7576
7577 check_valid_image:
7578 if (valid_pri_image && active_pri_image)
7579 active_regions->global = QLA27XX_PRIMARY_IMAGE;
7580
7581 if (valid_sec_image && active_sec_image) {
7582 if (!active_regions->global ||
7583 qla27xx_compare_image_generation(
7584 &pri_image_status, &sec_image_status) < 0) {
7585 active_regions->global = QLA27XX_SECONDARY_IMAGE;
7586 }
7587 }
7588
7589 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
7590 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
7591 "default (boot/fw)" :
7592 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
7593 "primary" :
7594 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
7595 "secondary" : "invalid",
7596 active_regions->global);
7597 }
7598
qla24xx_risc_firmware_invalid(uint32_t * dword)7599 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
7600 {
7601 return
7602 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
7603 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
7604 }
7605
7606 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)7607 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7608 uint32_t faddr)
7609 {
7610 int rval;
7611 uint templates, segments, fragment;
7612 ulong i;
7613 uint j;
7614 ulong dlen;
7615 uint32_t *dcode;
7616 uint32_t risc_addr, risc_size, risc_attr = 0;
7617 struct qla_hw_data *ha = vha->hw;
7618 struct req_que *req = ha->req_q_map[0];
7619 struct fwdt *fwdt = ha->fwdt;
7620
7621 ql_dbg(ql_dbg_init, vha, 0x008b,
7622 "FW: Loading firmware from flash (%x).\n", faddr);
7623
7624 dcode = (void *)req->ring;
7625 qla24xx_read_flash_data(vha, dcode, faddr, 8);
7626 if (qla24xx_risc_firmware_invalid(dcode)) {
7627 ql_log(ql_log_fatal, vha, 0x008c,
7628 "Unable to verify the integrity of flash firmware "
7629 "image.\n");
7630 ql_log(ql_log_fatal, vha, 0x008d,
7631 "Firmware data: %08x %08x %08x %08x.\n",
7632 dcode[0], dcode[1], dcode[2], dcode[3]);
7633
7634 return QLA_FUNCTION_FAILED;
7635 }
7636
7637 dcode = (void *)req->ring;
7638 *srisc_addr = 0;
7639 segments = FA_RISC_CODE_SEGMENTS;
7640 for (j = 0; j < segments; j++) {
7641 ql_dbg(ql_dbg_init, vha, 0x008d,
7642 "-> Loading segment %u...\n", j);
7643 qla24xx_read_flash_data(vha, dcode, faddr, 10);
7644 risc_addr = be32_to_cpu(dcode[2]);
7645 risc_size = be32_to_cpu(dcode[3]);
7646 if (!*srisc_addr) {
7647 *srisc_addr = risc_addr;
7648 risc_attr = be32_to_cpu(dcode[9]);
7649 }
7650
7651 dlen = ha->fw_transfer_size >> 2;
7652 for (fragment = 0; risc_size; fragment++) {
7653 if (dlen > risc_size)
7654 dlen = risc_size;
7655
7656 ql_dbg(ql_dbg_init, vha, 0x008e,
7657 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
7658 fragment, risc_addr, faddr, dlen);
7659 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7660 for (i = 0; i < dlen; i++)
7661 dcode[i] = swab32(dcode[i]);
7662
7663 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7664 if (rval) {
7665 ql_log(ql_log_fatal, vha, 0x008f,
7666 "-> Failed load firmware fragment %u.\n",
7667 fragment);
7668 return QLA_FUNCTION_FAILED;
7669 }
7670
7671 faddr += dlen;
7672 risc_addr += dlen;
7673 risc_size -= dlen;
7674 }
7675 }
7676
7677 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7678 return QLA_SUCCESS;
7679
7680 templates = (risc_attr & BIT_9) ? 2 : 1;
7681 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
7682 for (j = 0; j < templates; j++, fwdt++) {
7683 if (fwdt->template)
7684 vfree(fwdt->template);
7685 fwdt->template = NULL;
7686 fwdt->length = 0;
7687
7688 dcode = (void *)req->ring;
7689 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7690 risc_size = be32_to_cpu(dcode[2]);
7691 ql_dbg(ql_dbg_init, vha, 0x0161,
7692 "-> fwdt%u template array at %#x (%#x dwords)\n",
7693 j, faddr, risc_size);
7694 if (!risc_size || !~risc_size) {
7695 ql_dbg(ql_dbg_init, vha, 0x0162,
7696 "-> fwdt%u failed to read array\n", j);
7697 goto failed;
7698 }
7699
7700 /* skip header and ignore checksum */
7701 faddr += 7;
7702 risc_size -= 8;
7703
7704 ql_dbg(ql_dbg_init, vha, 0x0163,
7705 "-> fwdt%u template allocate template %#x words...\n",
7706 j, risc_size);
7707 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7708 if (!fwdt->template) {
7709 ql_log(ql_log_warn, vha, 0x0164,
7710 "-> fwdt%u failed allocate template.\n", j);
7711 goto failed;
7712 }
7713
7714 dcode = fwdt->template;
7715 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7716
7717 if (!qla27xx_fwdt_template_valid(dcode)) {
7718 ql_log(ql_log_warn, vha, 0x0165,
7719 "-> fwdt%u failed template validate\n", j);
7720 goto failed;
7721 }
7722
7723 dlen = qla27xx_fwdt_template_size(dcode);
7724 ql_dbg(ql_dbg_init, vha, 0x0166,
7725 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
7726 j, dlen, dlen / sizeof(*dcode));
7727 if (dlen > risc_size * sizeof(*dcode)) {
7728 ql_log(ql_log_warn, vha, 0x0167,
7729 "-> fwdt%u template exceeds array (%-lu bytes)\n",
7730 j, dlen - risc_size * sizeof(*dcode));
7731 goto failed;
7732 }
7733
7734 fwdt->length = dlen;
7735 ql_dbg(ql_dbg_init, vha, 0x0168,
7736 "-> fwdt%u loaded template ok\n", j);
7737
7738 faddr += risc_size + 1;
7739 }
7740
7741 return QLA_SUCCESS;
7742
7743 failed:
7744 if (fwdt->template)
7745 vfree(fwdt->template);
7746 fwdt->template = NULL;
7747 fwdt->length = 0;
7748
7749 return QLA_SUCCESS;
7750 }
7751
7752 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7753
7754 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)7755 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7756 {
7757 int rval;
7758 int i, fragment;
7759 uint16_t *wcode, *fwcode;
7760 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7761 struct fw_blob *blob;
7762 struct qla_hw_data *ha = vha->hw;
7763 struct req_que *req = ha->req_q_map[0];
7764
7765 /* Load firmware blob. */
7766 blob = qla2x00_request_firmware(vha);
7767 if (!blob) {
7768 ql_log(ql_log_info, vha, 0x0083,
7769 "Firmware image unavailable.\n");
7770 ql_log(ql_log_info, vha, 0x0084,
7771 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7772 return QLA_FUNCTION_FAILED;
7773 }
7774
7775 rval = QLA_SUCCESS;
7776
7777 wcode = (uint16_t *)req->ring;
7778 *srisc_addr = 0;
7779 fwcode = (uint16_t *)blob->fw->data;
7780 fwclen = 0;
7781
7782 /* Validate firmware image by checking version. */
7783 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7784 ql_log(ql_log_fatal, vha, 0x0085,
7785 "Unable to verify integrity of firmware image (%zd).\n",
7786 blob->fw->size);
7787 goto fail_fw_integrity;
7788 }
7789 for (i = 0; i < 4; i++)
7790 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7791 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7792 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7793 wcode[2] == 0 && wcode[3] == 0)) {
7794 ql_log(ql_log_fatal, vha, 0x0086,
7795 "Unable to verify integrity of firmware image.\n");
7796 ql_log(ql_log_fatal, vha, 0x0087,
7797 "Firmware data: %04x %04x %04x %04x.\n",
7798 wcode[0], wcode[1], wcode[2], wcode[3]);
7799 goto fail_fw_integrity;
7800 }
7801
7802 seg = blob->segs;
7803 while (*seg && rval == QLA_SUCCESS) {
7804 risc_addr = *seg;
7805 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7806 risc_size = be16_to_cpu(fwcode[3]);
7807
7808 /* Validate firmware image size. */
7809 fwclen += risc_size * sizeof(uint16_t);
7810 if (blob->fw->size < fwclen) {
7811 ql_log(ql_log_fatal, vha, 0x0088,
7812 "Unable to verify integrity of firmware image "
7813 "(%zd).\n", blob->fw->size);
7814 goto fail_fw_integrity;
7815 }
7816
7817 fragment = 0;
7818 while (risc_size > 0 && rval == QLA_SUCCESS) {
7819 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7820 if (wlen > risc_size)
7821 wlen = risc_size;
7822 ql_dbg(ql_dbg_init, vha, 0x0089,
7823 "Loading risc segment@ risc addr %x number of "
7824 "words 0x%x.\n", risc_addr, wlen);
7825
7826 for (i = 0; i < wlen; i++)
7827 wcode[i] = swab16(fwcode[i]);
7828
7829 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7830 wlen);
7831 if (rval) {
7832 ql_log(ql_log_fatal, vha, 0x008a,
7833 "Failed to load segment %d of firmware.\n",
7834 fragment);
7835 break;
7836 }
7837
7838 fwcode += wlen;
7839 risc_addr += wlen;
7840 risc_size -= wlen;
7841 fragment++;
7842 }
7843
7844 /* Next segment. */
7845 seg++;
7846 }
7847 return rval;
7848
7849 fail_fw_integrity:
7850 return QLA_FUNCTION_FAILED;
7851 }
7852
7853 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)7854 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7855 {
7856 int rval;
7857 uint templates, segments, fragment;
7858 uint32_t *dcode;
7859 ulong dlen;
7860 uint32_t risc_addr, risc_size, risc_attr = 0;
7861 ulong i;
7862 uint j;
7863 struct fw_blob *blob;
7864 uint32_t *fwcode;
7865 struct qla_hw_data *ha = vha->hw;
7866 struct req_que *req = ha->req_q_map[0];
7867 struct fwdt *fwdt = ha->fwdt;
7868
7869 ql_dbg(ql_dbg_init, vha, 0x0090,
7870 "-> FW: Loading via request-firmware.\n");
7871
7872 blob = qla2x00_request_firmware(vha);
7873 if (!blob) {
7874 ql_log(ql_log_warn, vha, 0x0092,
7875 "-> Firmware file not found.\n");
7876
7877 return QLA_FUNCTION_FAILED;
7878 }
7879
7880 fwcode = (void *)blob->fw->data;
7881 dcode = fwcode;
7882 if (qla24xx_risc_firmware_invalid(dcode)) {
7883 ql_log(ql_log_fatal, vha, 0x0093,
7884 "Unable to verify integrity of firmware image (%zd).\n",
7885 blob->fw->size);
7886 ql_log(ql_log_fatal, vha, 0x0095,
7887 "Firmware data: %08x %08x %08x %08x.\n",
7888 dcode[0], dcode[1], dcode[2], dcode[3]);
7889 return QLA_FUNCTION_FAILED;
7890 }
7891
7892 dcode = (void *)req->ring;
7893 *srisc_addr = 0;
7894 segments = FA_RISC_CODE_SEGMENTS;
7895 for (j = 0; j < segments; j++) {
7896 ql_dbg(ql_dbg_init, vha, 0x0096,
7897 "-> Loading segment %u...\n", j);
7898 risc_addr = be32_to_cpu(fwcode[2]);
7899 risc_size = be32_to_cpu(fwcode[3]);
7900
7901 if (!*srisc_addr) {
7902 *srisc_addr = risc_addr;
7903 risc_attr = be32_to_cpu(fwcode[9]);
7904 }
7905
7906 dlen = ha->fw_transfer_size >> 2;
7907 for (fragment = 0; risc_size; fragment++) {
7908 if (dlen > risc_size)
7909 dlen = risc_size;
7910
7911 ql_dbg(ql_dbg_init, vha, 0x0097,
7912 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
7913 fragment, risc_addr,
7914 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
7915 dlen);
7916
7917 for (i = 0; i < dlen; i++)
7918 dcode[i] = swab32(fwcode[i]);
7919
7920 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7921 if (rval) {
7922 ql_log(ql_log_fatal, vha, 0x0098,
7923 "-> Failed load firmware fragment %u.\n",
7924 fragment);
7925 return QLA_FUNCTION_FAILED;
7926 }
7927
7928 fwcode += dlen;
7929 risc_addr += dlen;
7930 risc_size -= dlen;
7931 }
7932 }
7933
7934 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7935 return QLA_SUCCESS;
7936
7937 templates = (risc_attr & BIT_9) ? 2 : 1;
7938 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
7939 for (j = 0; j < templates; j++, fwdt++) {
7940 if (fwdt->template)
7941 vfree(fwdt->template);
7942 fwdt->template = NULL;
7943 fwdt->length = 0;
7944
7945 risc_size = be32_to_cpu(fwcode[2]);
7946 ql_dbg(ql_dbg_init, vha, 0x0171,
7947 "-> fwdt%u template array at %#x (%#x dwords)\n",
7948 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
7949 risc_size);
7950 if (!risc_size || !~risc_size) {
7951 ql_dbg(ql_dbg_init, vha, 0x0172,
7952 "-> fwdt%u failed to read array\n", j);
7953 goto failed;
7954 }
7955
7956 /* skip header and ignore checksum */
7957 fwcode += 7;
7958 risc_size -= 8;
7959
7960 ql_dbg(ql_dbg_init, vha, 0x0173,
7961 "-> fwdt%u template allocate template %#x words...\n",
7962 j, risc_size);
7963 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7964 if (!fwdt->template) {
7965 ql_log(ql_log_warn, vha, 0x0174,
7966 "-> fwdt%u failed allocate template.\n", j);
7967 goto failed;
7968 }
7969
7970 dcode = fwdt->template;
7971 for (i = 0; i < risc_size; i++)
7972 dcode[i] = fwcode[i];
7973
7974 if (!qla27xx_fwdt_template_valid(dcode)) {
7975 ql_log(ql_log_warn, vha, 0x0175,
7976 "-> fwdt%u failed template validate\n", j);
7977 goto failed;
7978 }
7979
7980 dlen = qla27xx_fwdt_template_size(dcode);
7981 ql_dbg(ql_dbg_init, vha, 0x0176,
7982 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
7983 j, dlen, dlen / sizeof(*dcode));
7984 if (dlen > risc_size * sizeof(*dcode)) {
7985 ql_log(ql_log_warn, vha, 0x0177,
7986 "-> fwdt%u template exceeds array (%-lu bytes)\n",
7987 j, dlen - risc_size * sizeof(*dcode));
7988 goto failed;
7989 }
7990
7991 fwdt->length = dlen;
7992 ql_dbg(ql_dbg_init, vha, 0x0178,
7993 "-> fwdt%u loaded template ok\n", j);
7994
7995 fwcode += risc_size + 1;
7996 }
7997
7998 return QLA_SUCCESS;
7999
8000 failed:
8001 if (fwdt->template)
8002 vfree(fwdt->template);
8003 fwdt->template = NULL;
8004 fwdt->length = 0;
8005
8006 return QLA_SUCCESS;
8007 }
8008
8009 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8010 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8011 {
8012 int rval;
8013
8014 if (ql2xfwloadbin == 1)
8015 return qla81xx_load_risc(vha, srisc_addr);
8016
8017 /*
8018 * FW Load priority:
8019 * 1) Firmware via request-firmware interface (.bin file).
8020 * 2) Firmware residing in flash.
8021 */
8022 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8023 if (rval == QLA_SUCCESS)
8024 return rval;
8025
8026 return qla24xx_load_risc_flash(vha, srisc_addr,
8027 vha->hw->flt_region_fw);
8028 }
8029
8030 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8031 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8032 {
8033 int rval;
8034 struct qla_hw_data *ha = vha->hw;
8035 struct active_regions active_regions = { };
8036
8037 if (ql2xfwloadbin == 2)
8038 goto try_blob_fw;
8039
8040 /* FW Load priority:
8041 * 1) Firmware residing in flash.
8042 * 2) Firmware via request-firmware interface (.bin file).
8043 * 3) Golden-Firmware residing in flash -- (limited operation).
8044 */
8045
8046 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8047 goto try_primary_fw;
8048
8049 qla27xx_get_active_image(vha, &active_regions);
8050
8051 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8052 goto try_primary_fw;
8053
8054 ql_dbg(ql_dbg_init, vha, 0x008b,
8055 "Loading secondary firmware image.\n");
8056 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8057 if (!rval)
8058 return rval;
8059
8060 try_primary_fw:
8061 ql_dbg(ql_dbg_init, vha, 0x008b,
8062 "Loading primary firmware image.\n");
8063 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8064 if (!rval)
8065 return rval;
8066
8067 try_blob_fw:
8068 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8069 if (!rval || !ha->flt_region_gold_fw)
8070 return rval;
8071
8072 ql_log(ql_log_info, vha, 0x0099,
8073 "Attempting to fallback to golden firmware.\n");
8074 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8075 if (rval)
8076 return rval;
8077
8078 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8079 ha->flags.running_gold_fw = 1;
8080 return rval;
8081 }
8082
8083 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)8084 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8085 {
8086 int ret, retries;
8087 struct qla_hw_data *ha = vha->hw;
8088
8089 if (ha->flags.pci_channel_io_perm_failure)
8090 return;
8091 if (!IS_FWI2_CAPABLE(ha))
8092 return;
8093 if (!ha->fw_major_version)
8094 return;
8095 if (!ha->flags.fw_started)
8096 return;
8097
8098 ret = qla2x00_stop_firmware(vha);
8099 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8100 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8101 ha->isp_ops->reset_chip(vha);
8102 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8103 continue;
8104 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8105 continue;
8106 ql_log(ql_log_info, vha, 0x8015,
8107 "Attempting retry of stop-firmware command.\n");
8108 ret = qla2x00_stop_firmware(vha);
8109 }
8110
8111 QLA_FW_STOPPED(ha);
8112 ha->flags.fw_init_done = 0;
8113 }
8114
8115 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)8116 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8117 {
8118 int rval = QLA_SUCCESS;
8119 int rval2;
8120 uint16_t mb[MAILBOX_REGISTER_COUNT];
8121 struct qla_hw_data *ha = vha->hw;
8122 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8123
8124 if (!vha->vp_idx)
8125 return -EINVAL;
8126
8127 rval = qla2x00_fw_ready(base_vha);
8128
8129 if (rval == QLA_SUCCESS) {
8130 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8131 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8132 }
8133
8134 vha->flags.management_server_logged_in = 0;
8135
8136 /* Login to SNS first */
8137 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8138 BIT_1);
8139 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8140 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8141 ql_dbg(ql_dbg_init, vha, 0x0120,
8142 "Failed SNS login: loop_id=%x, rval2=%d\n",
8143 NPH_SNS, rval2);
8144 else
8145 ql_dbg(ql_dbg_init, vha, 0x0103,
8146 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8147 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8148 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8149 return (QLA_FUNCTION_FAILED);
8150 }
8151
8152 atomic_set(&vha->loop_down_timer, 0);
8153 atomic_set(&vha->loop_state, LOOP_UP);
8154 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8155 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8156 rval = qla2x00_loop_resync(base_vha);
8157
8158 return rval;
8159 }
8160
8161 /* 84XX Support **************************************************************/
8162
8163 static LIST_HEAD(qla_cs84xx_list);
8164 static DEFINE_MUTEX(qla_cs84xx_mutex);
8165
8166 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)8167 qla84xx_get_chip(struct scsi_qla_host *vha)
8168 {
8169 struct qla_chip_state_84xx *cs84xx;
8170 struct qla_hw_data *ha = vha->hw;
8171
8172 mutex_lock(&qla_cs84xx_mutex);
8173
8174 /* Find any shared 84xx chip. */
8175 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8176 if (cs84xx->bus == ha->pdev->bus) {
8177 kref_get(&cs84xx->kref);
8178 goto done;
8179 }
8180 }
8181
8182 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8183 if (!cs84xx)
8184 goto done;
8185
8186 kref_init(&cs84xx->kref);
8187 spin_lock_init(&cs84xx->access_lock);
8188 mutex_init(&cs84xx->fw_update_mutex);
8189 cs84xx->bus = ha->pdev->bus;
8190
8191 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8192 done:
8193 mutex_unlock(&qla_cs84xx_mutex);
8194 return cs84xx;
8195 }
8196
8197 static void
__qla84xx_chip_release(struct kref * kref)8198 __qla84xx_chip_release(struct kref *kref)
8199 {
8200 struct qla_chip_state_84xx *cs84xx =
8201 container_of(kref, struct qla_chip_state_84xx, kref);
8202
8203 mutex_lock(&qla_cs84xx_mutex);
8204 list_del(&cs84xx->list);
8205 mutex_unlock(&qla_cs84xx_mutex);
8206 kfree(cs84xx);
8207 }
8208
8209 void
qla84xx_put_chip(struct scsi_qla_host * vha)8210 qla84xx_put_chip(struct scsi_qla_host *vha)
8211 {
8212 struct qla_hw_data *ha = vha->hw;
8213
8214 if (ha->cs84xx)
8215 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8216 }
8217
8218 static int
qla84xx_init_chip(scsi_qla_host_t * vha)8219 qla84xx_init_chip(scsi_qla_host_t *vha)
8220 {
8221 int rval;
8222 uint16_t status[2];
8223 struct qla_hw_data *ha = vha->hw;
8224
8225 mutex_lock(&ha->cs84xx->fw_update_mutex);
8226
8227 rval = qla84xx_verify_chip(vha, status);
8228
8229 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8230
8231 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8232 QLA_SUCCESS;
8233 }
8234
8235 /* 81XX Support **************************************************************/
8236
8237 int
qla81xx_nvram_config(scsi_qla_host_t * vha)8238 qla81xx_nvram_config(scsi_qla_host_t *vha)
8239 {
8240 int rval;
8241 struct init_cb_81xx *icb;
8242 struct nvram_81xx *nv;
8243 uint32_t *dptr;
8244 uint8_t *dptr1, *dptr2;
8245 uint32_t chksum;
8246 uint16_t cnt;
8247 struct qla_hw_data *ha = vha->hw;
8248 uint32_t faddr;
8249 struct active_regions active_regions = { };
8250
8251 rval = QLA_SUCCESS;
8252 icb = (struct init_cb_81xx *)ha->init_cb;
8253 nv = ha->nvram;
8254
8255 /* Determine NVRAM starting address. */
8256 ha->nvram_size = sizeof(*nv);
8257 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8258 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8259 ha->vpd_size = FA_VPD_SIZE_82XX;
8260
8261 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8262 qla28xx_get_aux_images(vha, &active_regions);
8263
8264 /* Get VPD data into cache */
8265 ha->vpd = ha->nvram + VPD_OFFSET;
8266
8267 faddr = ha->flt_region_vpd;
8268 if (IS_QLA28XX(ha)) {
8269 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8270 faddr = ha->flt_region_vpd_sec;
8271 ql_dbg(ql_dbg_init, vha, 0x0110,
8272 "Loading %s nvram image.\n",
8273 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8274 "primary" : "secondary");
8275 }
8276 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8277
8278 /* Get NVRAM data into cache and calculate checksum. */
8279 faddr = ha->flt_region_nvram;
8280 if (IS_QLA28XX(ha)) {
8281 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8282 faddr = ha->flt_region_nvram_sec;
8283 }
8284 ql_dbg(ql_dbg_init, vha, 0x0110,
8285 "Loading %s nvram image.\n",
8286 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8287 "primary" : "secondary");
8288 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
8289
8290 dptr = (uint32_t *)nv;
8291 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8292 chksum += le32_to_cpu(*dptr);
8293
8294 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8295 "Contents of NVRAM:\n");
8296 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8297 nv, ha->nvram_size);
8298
8299 /* Bad NVRAM data, set defaults parameters. */
8300 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8301 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8302 /* Reset NVRAM data. */
8303 ql_log(ql_log_info, vha, 0x0073,
8304 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8305 chksum, nv->id, le16_to_cpu(nv->nvram_version));
8306 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8307 ql_log(ql_log_info, vha, 0x0074,
8308 "Falling back to functioning (yet invalid -- WWPN) "
8309 "defaults.\n");
8310
8311 /*
8312 * Set default initialization control block.
8313 */
8314 memset(nv, 0, ha->nvram_size);
8315 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8316 nv->version = cpu_to_le16(ICB_VERSION);
8317 nv->frame_payload_size = 2048;
8318 nv->execution_throttle = cpu_to_le16(0xFFFF);
8319 nv->exchange_count = cpu_to_le16(0);
8320 nv->port_name[0] = 0x21;
8321 nv->port_name[1] = 0x00 + ha->port_no + 1;
8322 nv->port_name[2] = 0x00;
8323 nv->port_name[3] = 0xe0;
8324 nv->port_name[4] = 0x8b;
8325 nv->port_name[5] = 0x1c;
8326 nv->port_name[6] = 0x55;
8327 nv->port_name[7] = 0x86;
8328 nv->node_name[0] = 0x20;
8329 nv->node_name[1] = 0x00;
8330 nv->node_name[2] = 0x00;
8331 nv->node_name[3] = 0xe0;
8332 nv->node_name[4] = 0x8b;
8333 nv->node_name[5] = 0x1c;
8334 nv->node_name[6] = 0x55;
8335 nv->node_name[7] = 0x86;
8336 nv->login_retry_count = cpu_to_le16(8);
8337 nv->interrupt_delay_timer = cpu_to_le16(0);
8338 nv->login_timeout = cpu_to_le16(0);
8339 nv->firmware_options_1 =
8340 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8341 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8342 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8343 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8344 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8345 nv->efi_parameters = cpu_to_le32(0);
8346 nv->reset_delay = 5;
8347 nv->max_luns_per_target = cpu_to_le16(128);
8348 nv->port_down_retry_count = cpu_to_le16(30);
8349 nv->link_down_timeout = cpu_to_le16(180);
8350 nv->enode_mac[0] = 0x00;
8351 nv->enode_mac[1] = 0xC0;
8352 nv->enode_mac[2] = 0xDD;
8353 nv->enode_mac[3] = 0x04;
8354 nv->enode_mac[4] = 0x05;
8355 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8356
8357 rval = 1;
8358 }
8359
8360 if (IS_T10_PI_CAPABLE(ha))
8361 nv->frame_payload_size &= ~7;
8362
8363 qlt_81xx_config_nvram_stage1(vha, nv);
8364
8365 /* Reset Initialization control block */
8366 memset(icb, 0, ha->init_cb_size);
8367
8368 /* Copy 1st segment. */
8369 dptr1 = (uint8_t *)icb;
8370 dptr2 = (uint8_t *)&nv->version;
8371 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8372 while (cnt--)
8373 *dptr1++ = *dptr2++;
8374
8375 icb->login_retry_count = nv->login_retry_count;
8376
8377 /* Copy 2nd segment. */
8378 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8379 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8380 cnt = (uint8_t *)&icb->reserved_5 -
8381 (uint8_t *)&icb->interrupt_delay_timer;
8382 while (cnt--)
8383 *dptr1++ = *dptr2++;
8384
8385 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8386 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8387 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8388 icb->enode_mac[0] = 0x00;
8389 icb->enode_mac[1] = 0xC0;
8390 icb->enode_mac[2] = 0xDD;
8391 icb->enode_mac[3] = 0x04;
8392 icb->enode_mac[4] = 0x05;
8393 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8394 }
8395
8396 /* Use extended-initialization control block. */
8397 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8398 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8399 /*
8400 * Setup driver NVRAM options.
8401 */
8402 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8403 "QLE8XXX");
8404
8405 qlt_81xx_config_nvram_stage2(vha, icb);
8406
8407 /* Use alternate WWN? */
8408 if (nv->host_p & cpu_to_le32(BIT_15)) {
8409 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8410 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8411 }
8412
8413 /* Prepare nodename */
8414 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8415 /*
8416 * Firmware will apply the following mask if the nodename was
8417 * not provided.
8418 */
8419 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8420 icb->node_name[0] &= 0xF0;
8421 }
8422
8423 /* Set host adapter parameters. */
8424 ha->flags.disable_risc_code_load = 0;
8425 ha->flags.enable_lip_reset = 0;
8426 ha->flags.enable_lip_full_login =
8427 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8428 ha->flags.enable_target_reset =
8429 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8430 ha->flags.enable_led_scheme = 0;
8431 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8432
8433 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8434 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8435
8436 /* save HBA serial number */
8437 ha->serial0 = icb->port_name[5];
8438 ha->serial1 = icb->port_name[6];
8439 ha->serial2 = icb->port_name[7];
8440 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8441 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8442
8443 icb->execution_throttle = cpu_to_le16(0xFFFF);
8444
8445 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8446
8447 /* Set minimum login_timeout to 4 seconds. */
8448 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8449 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8450 if (le16_to_cpu(nv->login_timeout) < 4)
8451 nv->login_timeout = cpu_to_le16(4);
8452 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8453
8454 /* Set minimum RATOV to 100 tenths of a second. */
8455 ha->r_a_tov = 100;
8456
8457 ha->loop_reset_delay = nv->reset_delay;
8458
8459 /* Link Down Timeout = 0:
8460 *
8461 * When Port Down timer expires we will start returning
8462 * I/O's to OS with "DID_NO_CONNECT".
8463 *
8464 * Link Down Timeout != 0:
8465 *
8466 * The driver waits for the link to come up after link down
8467 * before returning I/Os to OS with "DID_NO_CONNECT".
8468 */
8469 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8470 ha->loop_down_abort_time =
8471 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8472 } else {
8473 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8474 ha->loop_down_abort_time =
8475 (LOOP_DOWN_TIME - ha->link_down_timeout);
8476 }
8477
8478 /* Need enough time to try and get the port back. */
8479 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8480 if (qlport_down_retry)
8481 ha->port_down_retry_count = qlport_down_retry;
8482
8483 /* Set login_retry_count */
8484 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8485 if (ha->port_down_retry_count ==
8486 le16_to_cpu(nv->port_down_retry_count) &&
8487 ha->port_down_retry_count > 3)
8488 ha->login_retry_count = ha->port_down_retry_count;
8489 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8490 ha->login_retry_count = ha->port_down_retry_count;
8491 if (ql2xloginretrycount)
8492 ha->login_retry_count = ql2xloginretrycount;
8493
8494 /* if not running MSI-X we need handshaking on interrupts */
8495 if (!vha->hw->flags.msix_enabled &&
8496 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
8497 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8498
8499 /* Enable ZIO. */
8500 if (!vha->flags.init_done) {
8501 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8502 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8503 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8504 le16_to_cpu(icb->interrupt_delay_timer) : 2;
8505 }
8506 icb->firmware_options_2 &= cpu_to_le32(
8507 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8508 vha->flags.process_response_queue = 0;
8509 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8510 ha->zio_mode = QLA_ZIO_MODE_6;
8511
8512 ql_log(ql_log_info, vha, 0x0075,
8513 "ZIO mode %d enabled; timer delay (%d us).\n",
8514 ha->zio_mode,
8515 ha->zio_timer * 100);
8516
8517 icb->firmware_options_2 |= cpu_to_le32(
8518 (uint32_t)ha->zio_mode);
8519 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8520 vha->flags.process_response_queue = 1;
8521 }
8522
8523 /* enable RIDA Format2 */
8524 icb->firmware_options_3 |= BIT_0;
8525
8526 /* N2N: driver will initiate Login instead of FW */
8527 icb->firmware_options_3 |= BIT_8;
8528
8529 if (rval) {
8530 ql_log(ql_log_warn, vha, 0x0076,
8531 "NVRAM configuration failed.\n");
8532 }
8533 return (rval);
8534 }
8535
8536 int
qla82xx_restart_isp(scsi_qla_host_t * vha)8537 qla82xx_restart_isp(scsi_qla_host_t *vha)
8538 {
8539 int status, rval;
8540 struct qla_hw_data *ha = vha->hw;
8541 struct scsi_qla_host *vp;
8542 unsigned long flags;
8543
8544 status = qla2x00_init_rings(vha);
8545 if (!status) {
8546 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8547 ha->flags.chip_reset_done = 1;
8548
8549 status = qla2x00_fw_ready(vha);
8550 if (!status) {
8551 /* Issue a marker after FW becomes ready. */
8552 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8553 vha->flags.online = 1;
8554 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8555 }
8556
8557 /* if no cable then assume it's good */
8558 if ((vha->device_flags & DFLG_NO_CABLE))
8559 status = 0;
8560 }
8561
8562 if (!status) {
8563 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8564
8565 if (!atomic_read(&vha->loop_down_timer)) {
8566 /*
8567 * Issue marker command only when we are going
8568 * to start the I/O .
8569 */
8570 vha->marker_needed = 1;
8571 }
8572
8573 ha->isp_ops->enable_intrs(ha);
8574
8575 ha->isp_abort_cnt = 0;
8576 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8577
8578 /* Update the firmware version */
8579 status = qla82xx_check_md_needed(vha);
8580
8581 if (ha->fce) {
8582 ha->flags.fce_enabled = 1;
8583 memset(ha->fce, 0,
8584 fce_calc_size(ha->fce_bufs));
8585 rval = qla2x00_enable_fce_trace(vha,
8586 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8587 &ha->fce_bufs);
8588 if (rval) {
8589 ql_log(ql_log_warn, vha, 0x8001,
8590 "Unable to reinitialize FCE (%d).\n",
8591 rval);
8592 ha->flags.fce_enabled = 0;
8593 }
8594 }
8595
8596 if (ha->eft) {
8597 memset(ha->eft, 0, EFT_SIZE);
8598 rval = qla2x00_enable_eft_trace(vha,
8599 ha->eft_dma, EFT_NUM_BUFFERS);
8600 if (rval) {
8601 ql_log(ql_log_warn, vha, 0x8010,
8602 "Unable to reinitialize EFT (%d).\n",
8603 rval);
8604 }
8605 }
8606 }
8607
8608 if (!status) {
8609 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8610 "qla82xx_restart_isp succeeded.\n");
8611
8612 spin_lock_irqsave(&ha->vport_slock, flags);
8613 list_for_each_entry(vp, &ha->vp_list, list) {
8614 if (vp->vp_idx) {
8615 atomic_inc(&vp->vref_count);
8616 spin_unlock_irqrestore(&ha->vport_slock, flags);
8617
8618 qla2x00_vp_abort_isp(vp);
8619
8620 spin_lock_irqsave(&ha->vport_slock, flags);
8621 atomic_dec(&vp->vref_count);
8622 }
8623 }
8624 spin_unlock_irqrestore(&ha->vport_slock, flags);
8625
8626 } else {
8627 ql_log(ql_log_warn, vha, 0x8016,
8628 "qla82xx_restart_isp **** FAILED ****.\n");
8629 }
8630
8631 return status;
8632 }
8633
8634 void
qla81xx_update_fw_options(scsi_qla_host_t * vha)8635 qla81xx_update_fw_options(scsi_qla_host_t *vha)
8636 {
8637 struct qla_hw_data *ha = vha->hw;
8638
8639 /* Hold status IOCBs until ABTS response received. */
8640 if (ql2xfwholdabts)
8641 ha->fw_options[3] |= BIT_12;
8642
8643 /* Set Retry FLOGI in case of P2P connection */
8644 if (ha->operating_mode == P2P) {
8645 ha->fw_options[2] |= BIT_3;
8646 ql_dbg(ql_dbg_disc, vha, 0x2103,
8647 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8648 __func__, ha->fw_options[2]);
8649 }
8650
8651 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8652 if (ql2xmvasynctoatio) {
8653 if (qla_tgt_mode_enabled(vha) ||
8654 qla_dual_mode_enabled(vha))
8655 ha->fw_options[2] |= BIT_11;
8656 else
8657 ha->fw_options[2] &= ~BIT_11;
8658 }
8659
8660 if (qla_tgt_mode_enabled(vha) ||
8661 qla_dual_mode_enabled(vha)) {
8662 /* FW auto send SCSI status during */
8663 ha->fw_options[1] |= BIT_8;
8664 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8665
8666 /* FW perform Exchange validation */
8667 ha->fw_options[2] |= BIT_4;
8668 } else {
8669 ha->fw_options[1] &= ~BIT_8;
8670 ha->fw_options[10] &= 0x00ff;
8671
8672 ha->fw_options[2] &= ~BIT_4;
8673 }
8674
8675 if (ql2xetsenable) {
8676 /* Enable ETS Burst. */
8677 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8678 ha->fw_options[2] |= BIT_9;
8679 }
8680
8681 ql_dbg(ql_dbg_init, vha, 0x00e9,
8682 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8683 __func__, ha->fw_options[1], ha->fw_options[2],
8684 ha->fw_options[3], vha->host->active_mode);
8685
8686 qla2x00_set_fw_options(vha, ha->fw_options);
8687 }
8688
8689 /*
8690 * qla24xx_get_fcp_prio
8691 * Gets the fcp cmd priority value for the logged in port.
8692 * Looks for a match of the port descriptors within
8693 * each of the fcp prio config entries. If a match is found,
8694 * the tag (priority) value is returned.
8695 *
8696 * Input:
8697 * vha = scsi host structure pointer.
8698 * fcport = port structure pointer.
8699 *
8700 * Return:
8701 * non-zero (if found)
8702 * -1 (if not found)
8703 *
8704 * Context:
8705 * Kernel context
8706 */
8707 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8708 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8709 {
8710 int i, entries;
8711 uint8_t pid_match, wwn_match;
8712 int priority;
8713 uint32_t pid1, pid2;
8714 uint64_t wwn1, wwn2;
8715 struct qla_fcp_prio_entry *pri_entry;
8716 struct qla_hw_data *ha = vha->hw;
8717
8718 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8719 return -1;
8720
8721 priority = -1;
8722 entries = ha->fcp_prio_cfg->num_entries;
8723 pri_entry = &ha->fcp_prio_cfg->entry[0];
8724
8725 for (i = 0; i < entries; i++) {
8726 pid_match = wwn_match = 0;
8727
8728 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8729 pri_entry++;
8730 continue;
8731 }
8732
8733 /* check source pid for a match */
8734 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8735 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8736 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8737 if (pid1 == INVALID_PORT_ID)
8738 pid_match++;
8739 else if (pid1 == pid2)
8740 pid_match++;
8741 }
8742
8743 /* check destination pid for a match */
8744 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8745 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8746 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8747 if (pid1 == INVALID_PORT_ID)
8748 pid_match++;
8749 else if (pid1 == pid2)
8750 pid_match++;
8751 }
8752
8753 /* check source WWN for a match */
8754 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8755 wwn1 = wwn_to_u64(vha->port_name);
8756 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8757 if (wwn2 == (uint64_t)-1)
8758 wwn_match++;
8759 else if (wwn1 == wwn2)
8760 wwn_match++;
8761 }
8762
8763 /* check destination WWN for a match */
8764 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8765 wwn1 = wwn_to_u64(fcport->port_name);
8766 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8767 if (wwn2 == (uint64_t)-1)
8768 wwn_match++;
8769 else if (wwn1 == wwn2)
8770 wwn_match++;
8771 }
8772
8773 if (pid_match == 2 || wwn_match == 2) {
8774 /* Found a matching entry */
8775 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8776 priority = pri_entry->tag;
8777 break;
8778 }
8779
8780 pri_entry++;
8781 }
8782
8783 return priority;
8784 }
8785
8786 /*
8787 * qla24xx_update_fcport_fcp_prio
8788 * Activates fcp priority for the logged in fc port
8789 *
8790 * Input:
8791 * vha = scsi host structure pointer.
8792 * fcp = port structure pointer.
8793 *
8794 * Return:
8795 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8796 *
8797 * Context:
8798 * Kernel context.
8799 */
8800 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8801 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8802 {
8803 int ret;
8804 int priority;
8805 uint16_t mb[5];
8806
8807 if (fcport->port_type != FCT_TARGET ||
8808 fcport->loop_id == FC_NO_LOOP_ID)
8809 return QLA_FUNCTION_FAILED;
8810
8811 priority = qla24xx_get_fcp_prio(vha, fcport);
8812 if (priority < 0)
8813 return QLA_FUNCTION_FAILED;
8814
8815 if (IS_P3P_TYPE(vha->hw)) {
8816 fcport->fcp_prio = priority & 0xf;
8817 return QLA_SUCCESS;
8818 }
8819
8820 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8821 if (ret == QLA_SUCCESS) {
8822 if (fcport->fcp_prio != priority)
8823 ql_dbg(ql_dbg_user, vha, 0x709e,
8824 "Updated FCP_CMND priority - value=%d loop_id=%d "
8825 "port_id=%02x%02x%02x.\n", priority,
8826 fcport->loop_id, fcport->d_id.b.domain,
8827 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8828 fcport->fcp_prio = priority & 0xf;
8829 } else
8830 ql_dbg(ql_dbg_user, vha, 0x704f,
8831 "Unable to update FCP_CMND priority - ret=0x%x for "
8832 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8833 fcport->d_id.b.domain, fcport->d_id.b.area,
8834 fcport->d_id.b.al_pa);
8835 return ret;
8836 }
8837
8838 /*
8839 * qla24xx_update_all_fcp_prio
8840 * Activates fcp priority for all the logged in ports
8841 *
8842 * Input:
8843 * ha = adapter block pointer.
8844 *
8845 * Return:
8846 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8847 *
8848 * Context:
8849 * Kernel context.
8850 */
8851 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)8852 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8853 {
8854 int ret;
8855 fc_port_t *fcport;
8856
8857 ret = QLA_FUNCTION_FAILED;
8858 /* We need to set priority for all logged in ports */
8859 list_for_each_entry(fcport, &vha->vp_fcports, list)
8860 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8861
8862 return ret;
8863 }
8864
qla2xxx_create_qpair(struct scsi_qla_host * vha,int qos,int vp_idx,bool startqp)8865 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8866 int vp_idx, bool startqp)
8867 {
8868 int rsp_id = 0;
8869 int req_id = 0;
8870 int i;
8871 struct qla_hw_data *ha = vha->hw;
8872 uint16_t qpair_id = 0;
8873 struct qla_qpair *qpair = NULL;
8874 struct qla_msix_entry *msix;
8875
8876 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8877 ql_log(ql_log_warn, vha, 0x00181,
8878 "FW/Driver is not multi-queue capable.\n");
8879 return NULL;
8880 }
8881
8882 if (ql2xmqsupport || ql2xnvmeenable) {
8883 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8884 if (qpair == NULL) {
8885 ql_log(ql_log_warn, vha, 0x0182,
8886 "Failed to allocate memory for queue pair.\n");
8887 return NULL;
8888 }
8889
8890 qpair->hw = vha->hw;
8891 qpair->vha = vha;
8892 qpair->qp_lock_ptr = &qpair->qp_lock;
8893 spin_lock_init(&qpair->qp_lock);
8894 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8895
8896 /* Assign available que pair id */
8897 mutex_lock(&ha->mq_lock);
8898 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
8899 if (ha->num_qpairs >= ha->max_qpairs) {
8900 mutex_unlock(&ha->mq_lock);
8901 ql_log(ql_log_warn, vha, 0x0183,
8902 "No resources to create additional q pair.\n");
8903 goto fail_qid_map;
8904 }
8905 ha->num_qpairs++;
8906 set_bit(qpair_id, ha->qpair_qid_map);
8907 ha->queue_pair_map[qpair_id] = qpair;
8908 qpair->id = qpair_id;
8909 qpair->vp_idx = vp_idx;
8910 qpair->fw_started = ha->flags.fw_started;
8911 INIT_LIST_HEAD(&qpair->hints_list);
8912 qpair->chip_reset = ha->base_qpair->chip_reset;
8913 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8914 qpair->enable_explicit_conf =
8915 ha->base_qpair->enable_explicit_conf;
8916
8917 for (i = 0; i < ha->msix_count; i++) {
8918 msix = &ha->msix_entries[i];
8919 if (msix->in_use)
8920 continue;
8921 qpair->msix = msix;
8922 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
8923 "Vector %x selected for qpair\n", msix->vector);
8924 break;
8925 }
8926 if (!qpair->msix) {
8927 ql_log(ql_log_warn, vha, 0x0184,
8928 "Out of MSI-X vectors!.\n");
8929 goto fail_msix;
8930 }
8931
8932 qpair->msix->in_use = 1;
8933 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8934 qpair->pdev = ha->pdev;
8935 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
8936 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8937
8938 mutex_unlock(&ha->mq_lock);
8939
8940 /* Create response queue first */
8941 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
8942 if (!rsp_id) {
8943 ql_log(ql_log_warn, vha, 0x0185,
8944 "Failed to create response queue.\n");
8945 goto fail_rsp;
8946 }
8947
8948 qpair->rsp = ha->rsp_q_map[rsp_id];
8949
8950 /* Create request queue */
8951 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8952 startqp);
8953 if (!req_id) {
8954 ql_log(ql_log_warn, vha, 0x0186,
8955 "Failed to create request queue.\n");
8956 goto fail_req;
8957 }
8958
8959 qpair->req = ha->req_q_map[req_id];
8960 qpair->rsp->req = qpair->req;
8961 qpair->rsp->qpair = qpair;
8962 /* init qpair to this cpu. Will adjust at run time. */
8963 qla_cpu_update(qpair, smp_processor_id());
8964
8965 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8966 if (ha->fw_attributes & BIT_4)
8967 qpair->difdix_supported = 1;
8968 }
8969
8970 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8971 if (!qpair->srb_mempool) {
8972 ql_log(ql_log_warn, vha, 0xd036,
8973 "Failed to create srb mempool for qpair %d\n",
8974 qpair->id);
8975 goto fail_mempool;
8976 }
8977
8978 /* Mark as online */
8979 qpair->online = 1;
8980
8981 if (!vha->flags.qpairs_available)
8982 vha->flags.qpairs_available = 1;
8983
8984 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8985 "Request/Response queue pair created, id %d\n",
8986 qpair->id);
8987 ql_dbg(ql_dbg_init, vha, 0x0187,
8988 "Request/Response queue pair created, id %d\n",
8989 qpair->id);
8990 }
8991 return qpair;
8992
8993 fail_mempool:
8994 fail_req:
8995 qla25xx_delete_rsp_que(vha, qpair->rsp);
8996 fail_rsp:
8997 mutex_lock(&ha->mq_lock);
8998 qpair->msix->in_use = 0;
8999 list_del(&qpair->qp_list_elem);
9000 if (list_empty(&vha->qp_list))
9001 vha->flags.qpairs_available = 0;
9002 fail_msix:
9003 ha->queue_pair_map[qpair_id] = NULL;
9004 clear_bit(qpair_id, ha->qpair_qid_map);
9005 ha->num_qpairs--;
9006 mutex_unlock(&ha->mq_lock);
9007 fail_qid_map:
9008 kfree(qpair);
9009 return NULL;
9010 }
9011
qla2xxx_delete_qpair(struct scsi_qla_host * vha,struct qla_qpair * qpair)9012 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9013 {
9014 int ret = QLA_FUNCTION_FAILED;
9015 struct qla_hw_data *ha = qpair->hw;
9016
9017 qpair->delete_in_progress = 1;
9018
9019 ret = qla25xx_delete_req_que(vha, qpair->req);
9020 if (ret != QLA_SUCCESS)
9021 goto fail;
9022
9023 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9024 if (ret != QLA_SUCCESS)
9025 goto fail;
9026
9027 mutex_lock(&ha->mq_lock);
9028 ha->queue_pair_map[qpair->id] = NULL;
9029 clear_bit(qpair->id, ha->qpair_qid_map);
9030 ha->num_qpairs--;
9031 list_del(&qpair->qp_list_elem);
9032 if (list_empty(&vha->qp_list)) {
9033 vha->flags.qpairs_available = 0;
9034 vha->flags.qpairs_req_created = 0;
9035 vha->flags.qpairs_rsp_created = 0;
9036 }
9037 mempool_destroy(qpair->srb_mempool);
9038 kfree(qpair);
9039 mutex_unlock(&ha->mq_lock);
9040
9041 return QLA_SUCCESS;
9042 fail:
9043 return ret;
9044 }
9045